Re: [PATCH 2/5] drm/syncobj: add sync obj wait interface. (v2)

On Fri, May 12, 2017 at 10:34:54AM +1000, Dave Airlie wrote: > From: Dave Airlie > > This interface will allow sync object to be used to back > Vulkan fences. This API is pretty much the vulkan fence waiting > API, and I've ported the code from amdgpu. > > v2: accept

Re: [PATCH 2/5] drm/syncobj: add sync obj wait interface. (v2)

On Fri, May 12, 2017 at 10:34:54AM +1000, Dave Airlie wrote: > +static int drm_syncobj_wait_all_fences(struct drm_device *dev, > +struct drm_file *file_private, > +struct drm_syncobj_wait *wait, > +

Re: [PATCH libdrm v2 1/1] amdgpu: move asic id table to a separate file

On Fri, May 12, 2017 at 12:19 AM, Samuel Li wrote: > From: Xiaojie Yuan > > v2: fix an off by one error and leading white spaces > > Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9 > Reviewed-by: Junwei Zhang > Signed-off-by:

[PATCH umr] Add raven family to GFX sensors

Signed-off-by: Tom St Denis --- src/app/top.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/app/top.c b/src/app/top.c index a4d3aa8e699d..09ab5f40de0b 100644 --- a/src/app/top.c +++ b/src/app/top.c @@ -813,8 +813,8 @@ static void

[PATCH xf86-video-amdgpu] Simplify tracking of PRIME scanout pixmap

From: Michel Dänzer Remember the shared pixmap passed to drmmode_set_scanout_pixmap for each CRTC, and just compare against that. Fixes leaving stale entries in ScreenRec::pixmap_dirty_list under some circumstances, which would usually result in use-after-free and a

Re: [PATCH 0/3] GPU-DRM-Radeon: Fine-tuning for three function implementations

Hi Christian, On Wednesday 10 May 2017 13:30:37 Christian König wrote: > Am 10.05.2017 um 02:23 schrieb Michel Dänzer: > > On 03/05/17 09:46 PM, Christian König wrote: > >> Am 02.05.2017 um 22:04 schrieb SF Markus Elfring: > >>> From: Markus Elfring > >>> Date:

Re: [PATCH 0/5] GFX9 KIQ

On 11/05/17 07:33 PM, Tom St Denis wrote: On 11/05/17 02:35 PM, Alex Deucher wrote: These are the laste of the gfx9 KIQ patches that haven't landed yet. Can someone with gfx9 capable hw test this (vega10 or raven)? This is needed to enable powergating on gfx9. Thanks, If nobody gets to it

Re: [PATCH] drm/amdgpu: correct wptr initialization for sdma

Am 12.05.2017 um 11:18 schrieb Yintian Tao: If doorbell is used for wptr update, we also need to use it to initialize wptr to 0. Change-Id: Ieb31a6726a9ac8d45e51f0370ef5f77dc5ec7c06 Signed-off-by: Yintian Tao Reviewed-by: Christian König ---

[PATCH] drm/amdgpu: correct wptr initialization for sdma

If doorbell is used for wptr update, we also need to use it to initialize wptr to 0. Change-Id: Ieb31a6726a9ac8d45e51f0370ef5f77dc5ec7c06 Signed-off-by: Yintian Tao --- drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git

[PATCH] drm/amdgpu: fix sem list soft lockup issue

sem should be delete from the previous sem list then add to the new sem list. If adding sem to the list which is same as previous one, it will cause endless loop when traverses the sem list. [ 264.133878] NMI watchdog: BUG: soft lockup - CPU#5 stuck for 22s! ... [ 264.133928] task:

Re: Support for amdgpu VM update via CPU on large-bar systems

Am 12.05.2017 um 10:37 schrieb zhoucm1: On 2017年05月12日 16:33, Christian König wrote: Am 12.05.2017 um 10:25 schrieb zhoucm1: On 2017年05月10日 05:47, Kasiviswanathan, Harish wrote: Hi, Please review the patch set that supports amdgpu VM update via CPU. This feature provides improved

Re: [PATCH] drm: fourcc byteorder: brings header file comments in line with reality.

On Thu, May 11, 2017 at 11:23:11PM +0200, Pavel Machek wrote: > On Fri 2017-04-21 14:08:04, Ville Syrjälä wrote: > > On Fri, Apr 21, 2017 at 11:50:18AM +0200, Gerd Hoffmann wrote: > > > On Fr, 2017-04-21 at 12:25 +0300, Ville Syrjälä wrote: > > > > On Fri, Apr 21, 2017 at 09:58:24AM +0200, Gerd

Re: [PATCH 5/5] amdgpu: use drm sync objects for shared semaphores (v4)

Am 12.05.2017 um 02:34 schrieb Dave Airlie: From: Dave Airlie This creates a new command submission chunk for amdgpu to add in and out sync objects around the submission. Sync objects are managed via the drm syncobj ioctls. The command submission interface is enhanced

Re: Support for amdgpu VM update via CPU on large-bar systems

On 2017年05月12日 16:43, Christian König wrote: Am 12.05.2017 um 10:37 schrieb zhoucm1: On 2017年05月12日 16:33, Christian König wrote: Am 12.05.2017 um 10:25 schrieb zhoucm1: On 2017年05月10日 05:47, Kasiviswanathan, Harish wrote: Hi, Please review the patch set that supports amdgpu VM update

Re: [PATCH 3/5] drm/syncobj: add sync_file interaction.

On Fri, May 12, 2017 at 10:34:55AM +1000, Dave Airlie wrote: > From: Dave Airlie > > This interface allows importing the fence from a sync_file into > an existing drm sync object, or exporting the fence attached to > an existing drm sync object into a new sync file object. >

Re: [PATCH 4/4] drm/amdgpu: Support page table update via CPU

Am 12.05.2017 um 04:39 schrieb Harish Kasiviswanathan: Signed-off-by: Harish Kasiviswanathan --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 82 +- 1 file changed, 81 insertions(+), 1 deletion(-) diff --git

[PATCH] drm/amdgpu: correct wptr initialization for sdma

If doorbell is used for wptr update, we also need to use it to initialize wptr to 0. Change-Id: Ieb31a6726a9ac8d45e51f0370ef5f77dc5ec7c06 Signed-off-by: Yintian Tao --- drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git

Re: [PATCH 3/4] drm/amdgpu: Support page directory update via CPU

Am 12.05.2017 um 04:39 schrieb Harish Kasiviswanathan: If amdgpu.vm_update_context param is set to use CPU, then Page Directories will be updated by CPU instead of SDMA Signed-off-by: Harish Kasiviswanathan --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 141

Re: Support for amdgpu VM update via CPU on large-bar systems

On 2017年05月10日 05:47, Kasiviswanathan, Harish wrote: Hi, Please review the patch set that supports amdgpu VM update via CPU. This feature provides improved performance for compute (HSA) where mapping / unmapping is carried out (by Kernel) independent of command submissions (done directly by

Re: [PATCH 2/4] drm/amdgpu: Add vm context module param

Am 12.05.2017 um 04:39 schrieb Harish Kasiviswanathan: Add VM context module param (amdgpu.vm_update_context) that can used to control how the VM pde/pte are updated for Graphics and Compute. BIT0 controls Graphics and BIT1 Compute. BIT0 [= 0] Graphics updated by SDMA [= 1] by CPU BIT1 [=

Re: Support for amdgpu VM update via CPU on large-bar systems

On 2017年05月12日 16:33, Christian König wrote: Am 12.05.2017 um 10:25 schrieb zhoucm1: On 2017年05月10日 05:47, Kasiviswanathan, Harish wrote: Hi, Please review the patch set that supports amdgpu VM update via CPU. This feature provides improved performance for compute (HSA) where mapping /

Re: [PATCH 2/5] drm/syncobj: add sync obj wait interface. (v2)

Am 12.05.2017 um 10:49 schrieb Chris Wilson: On Fri, May 12, 2017 at 10:34:54AM +1000, Dave Airlie wrote: +static int drm_syncobj_wait_all_fences(struct drm_device *dev, + struct drm_file *file_private, + struct

Re: [PATCH 1/5] drm: introduce sync objects (v2)

On Fri, May 12, 2017 at 10:34:53AM +1000, Dave Airlie wrote: > From: Dave Airlie > > Sync objects are new toplevel drm object, that contain a > pointer to a fence. This fence can be updated via command > submission ioctls via drivers. > > There is also a generic wait obj API

Re: [PATCH 3/5] drm/syncobj: add sync_file interaction.

On Fri, May 12, 2017 at 10:34:55AM +1000, Dave Airlie wrote: > From: Dave Airlie > > This interface allows importing the fence from a sync_file into > an existing drm sync object, or exporting the fence attached to > an existing drm sync object into a new sync file object. >

Re: [PATCH 2/5] drm/syncobj: add sync obj wait interface. (v2)

On Fri, May 12, 2017 at 10:34:54AM +1000, Dave Airlie wrote: > From: Dave Airlie > > This interface will allow sync object to be used to back > Vulkan fences. This API is pretty much the vulkan fence waiting > API, and I've ported the code from amdgpu. > > v2: accept

[PATCH 13/31] drm/amd/display: Continue with stream enable if DP link training fails.

From: Ken Chalmers Not necessarily a fatal problem - some monitors will recover and show the stream anyway if link training fails. Change-Id: I9c6245066c3a8b80b8c40155086fe3c330752208 Signed-off-by: Ken Chalmers Reviewed-by: Tony Cheng

[PATCH 25/31] drm/amd/display: Move output transfer function to stream updates

From: Amy Zhang Change-Id: I110d0986279259a912c3b44545fbde52091b4690 Signed-off-by: Amy Zhang Reviewed-by: Anthony Koo Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/core/dc.c | 46

[PATCH 24/31] drm/amd/display: fix freesync not working on raven

From: Corbin McElhanney Change-Id: I4e62756222da304a8ba378c2436ca8cda626273e Signed-off-by: Corbin McElhanney Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 20/31] drm/amd/display: Add 64KB_S_T and 64KB_D_T swizzle mode.

From: Yongqiang Sun Change-Id: I7e8bdb19296bb703e47d906c5213e7ad6e187cf4 Signed-off-by: Yongqiang Sun Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 28/31] drm/amd/display: fix scaling calculation for proper surface input format

From: Dmytro Laktyushkin Change-Id: Icc68c0d9e6fc589492148a2bd122d34ada78555b Signed-off-by: Dmytro Laktyushkin Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 09/31] drm/amd/display: Allow MPO on Raven

From: Leon Elazar Change-Id: Ib83bcc1d2cb23b409af8765b725f82d5ec5ca574 Signed-off-by: Leon Elazar Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c |

[PATCH 12/31] drm/amd/display: do not set_mpc_tree if tree is already setup

From: Tony Cheng Change-Id: I7140155a62c2a25ba888cb02e93ecff5df54f61e Signed-off-by: Tony Cheng Reviewed-by: Yongqiang Sun Acked-by: Harry Wentland --- .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c |

[PATCH 26/31] drm/amd/display: Add mem_input header to non-DCN builds

Change-Id: I0446e77334b14287614b21fe847afe44e4c5bac4 Signed-off-by: Harry Wentland Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/inc/core_types.h | 2 +- 1 file changed, 1 insertion(+), 1

[PATCH 04/31] drm/amd/display: DP aux Remove link index.

From: Andrey Grodzovsky Header change for DAL change under same name. Signed-off-by: Andrey Grodzovsky --- drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH 30/31] drm/amd/display: fix scaling info based surface update type check

From: Dmytro Laktyushkin Change-Id: I8747a1bb298e57824515f126990429dbbca05ecd Signed-off-by: Dmytro Laktyushkin Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 11/31] drm/amd/display: use signal type to decide whether to set backlight

From: Anthony Koo Change-Id: Ie7955fcbbd19540fee0cb656a8bae5cace7bc4aa Signed-off-by: Anthony Koo Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 +- 1

[PATCH 10/31] drm/amd/display: Reverting locks around updating freesync property

From: Sun peng Li Revert "SWDEV-114487 - dm/amdgpu: Add lock around updating freesync property" This reverts commit b54fd07f238a01f1155c9e2b378e148e5df2c548. Change-Id: Id0e10630bfc730eddcd964bdb654a9445d498032 Reviewed-by: Jordan Lazare Acked-by:

[PATCH 18/31] drm/amd/display: refactor bw related variable structure in val_ctx

From: Dmytro Laktyushkin Change-Id: I69c6358b9dd01f4cb399b017d4b23ffc67bb710a Signed-off-by: Dmytro Laktyushkin Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 08/31] drm/amd/display: Only apply ctx for specific surface.

From: Yongqiang Sun Change-Id: Ifcf2bba5d0ac0200ae406e27407afdf237d13aa2 Signed-off-by: Yongqiang Sun Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 19/31] drm/amd/display: switch to using calc_clk and cur_clk for dcn bw setting

From: Dmytro Laktyushkin Change-Id: I9da890ac9e52292092f8579449550b8e79c8f1fb Signed-off-by: Dmytro Laktyushkin Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 05/31] drm/amd/display: Keep DVI_SINGLE_LINK signal if low clk

If user is using DVI->HDMI dongle dual link signal might pose a problem. Keep single link signal type if clk is lower than max tmds clk. Change-Id: I6ad1009bb195e0d1ba91a9801c6125778419f739 Signed-off-by: Harry Wentland ---

[PATCH 23/31] drm/amd/display: enable watermark range reporting to pplib

From: Dmytro Laktyushkin Change-Id: I3ebf4168ab6669017c593d43707d812d20c4163b Signed-off-by: Dmytro Laktyushkin Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 31/31] drm/amd/display: add explanation for surface_update_type

From: Dmytro Laktyushkin Change-Id: I7ce6668c865e9f8542a3bf5cc15d7474c0578eb5 Signed-off-by: Dmytro Laktyushkin Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 07/31] drm/amd/display: bw debug options now apply to dml as well

From: Dmytro Laktyushkin Change-Id: I998aadaee02116230951c3899e784708487225e5 Signed-off-by: Dmytro Laktyushkin Reviewed-by: Dmytro Laktyushkin Acked-by: Harry Wentland ---

[PATCH 06/31] drm/amd/display: i2c/aux Remove link index.

From: Andrey Grodzovsky Link index is an unnecessery level of inderection when calling from kernel i2c/aux transfer into DAL. Change-Id: I3413e46e12a8134f6be521a39884688f6caa1b56 Signed-off-by: Andrey Grodzovsky Change-Id:

[PATCH 21/31] drm/amd/display: Use MED update type if clip position changes

Change-Id: I62c019ec028d66339dea98dbbae00da07873aa92 Signed-off-by: Harry Wentland Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/core/dc.c | 7 +++ 1 file changed, 3 insertions(+), 4

[PATCH 15/31] drm/amd/display: ifdef some code only needed for DCN

Change-Id: Ia910c1f4467c5bdbc7d1ee28ed9265c090cc184e Signed-off-by: Harry Wentland Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/inc/core_types.h | 4

[PATCH 00/31] DC Patches May 12, 2017

* Fix deadlock when plugging MST display * Fix DVI->HDMI dongles * Bunch of raven bandwidth changes * Some more cleanup for i2c/aux Amy Zhang (1): drm/amd/display: Move output transfer function to stream updates Andrey Grodzovsky (4): drm/amd/display: i2c Remove link index.

[PATCH 03/31] drm/amd/display: i2c Remove link index.

From: Andrey Grodzovsky Header change for DAL change under same name. Signed-off-by: Andrey Grodzovsky --- drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[PATCH 02/31] drm/amd/display: Don't call PSR func if DMCU is off

Change-Id: I3e5b4f95429a959d0981ba57f23bd4d9fc60a604 Signed-off-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 8 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c| 23 +++

[PATCH 17/31] drm/amd/display: prevent assert on error of 1 in calc_freesync_range

From: Dmytro Laktyushkin Change-Id: I9d88231521821e01f79dc7aa942659ba240d1eac Signed-off-by: Dmytro Laktyushkin Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

RE: [PATCH 1/1] amdgpu: move asic id table to a separate file

My understanding is this is actually a data file. Similar to amdgpu firmware, which is also separate from the kernel source code. Sam -Original Message- From: Michel Dänzer [mailto:mic...@daenzer.net] Sent: Thursday, May 11, 2017 8:50 PM To: Li, Samuel Cc:

Re: [PATCH 00/31] DC Patches May 12, 2017

Yeah, there's still a patch in the queue that should fix it. Just didn't make this push. Harry On 2017-05-12 11:53 AM, Tom St Denis wrote: Still getting noise in dmesg with DCN enabled on my carrizo/vega10 setup. It's otherwise fine. Tom On 12/05/17 11:20 AM, Harry Wentland wrote: *

[PATCH 3/3] drm/amdgpu: cleanup adjust_mc_addr handling

From: Christian König Rename adjust_mc_addr to get_vm_pde, check the address bits in one place and move setting the valid bit in there as well. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 5 +++--

[PATCH 2/3] drm/amdgpu: move adjust adjust_mc_addr into the GFX9 vm_flush functions

From: Christian König That GFX9 needs a PDE in the registers is entirely GFX9 specific. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 5 ++--- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 +

Re: [PATCH 3/3] drm/amdgpu: cleanup adjust_mc_addr handling

Hi Christian, One comment inline [FK]. If this is not a problem, then feel free to add my R-B for the whole series. Kent, when we adopt this change, we need to convert the PDE back to an address, because KFD needs to fill just the page directory base address into the map_process HIQ packet. I

Re: Support for amdgpu VM update via CPU on large-bar systems

On 17-05-12 04:43 AM, Christian König wrote: > Am 12.05.2017 um 10:37 schrieb zhoucm1: >> >> >> >> If the sdma is faster, even they wait for finish, which time is >> shorter than CPU, isn't it? Of course, the precondition is sdma is >> exclusive. They can reserve a sdma for PT updating. >> > > No,

RE: [PATCH libdrm v2 1/1] amdgpu: move asic id table to a separate file

> If you add this here, you should add the ids file itself and make libdrm > install it too... ? Here the ids file is separate from libdrm. It is passed during compilation so that libdrm knows where to get it. > You can't use strtok() in a library. Any other thread may call strtok() > anytime