RE: [PATCH 3/4] drm/ttm: handle already locked BOs during eviction and swapout.

-Original Message- From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com] Sent: Friday, February 23, 2018 8:06 PM To: He, Roger ; amd-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org; linux-ker...@vger.kernel.org Subject: Re: [PATCH 3/4] drm/ttm:

RE: [PATCH 3/4] drm/ttm: handle already locked BOs during eviction and swapout.

I missed the Per-VM-BO share the reservation object with root bo. So context is not NULL here. So, this patch is: Reviewed-by: Roger He Thanks Roger(Hongbo.He) -Original Message- From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com] Sent: Friday, February

Re: [PATCH] drm/amdgpu/dce6: Use DRM_DEBUG instead of DRM_INFO for HPD IRQ info

On Fri, Feb 23, 2018 at 6:30 AM, Michel Dänzer wrote: > From: Michel Dänzer > > For consistency with other DCE generations. > > HPD IRQs appear to be working fine. > > Signed-off-by: Michel Dänzer > Signed-off-by: Michel Dänzer

Re: [PATCH] drm/radeon: insist on 32-bit DMA for Cedar on PPC64/PPC64LE

Hi Christian, Michel, Alex, et al., I mentioned the HD 5450 purely as a matter of archeological interest. Back to the FirePro 2270 and Embedded Radeon E6465: I've attached text from both "lspci -tv" and "lspci -v." Actually I'm attaching a couple of different "lspci -v" outputs, one with the

Re: [PATCH] drm/radeon: insist on 32-bit DMA for Cedar on PPC64/PPC64LE

Hi Ben, I mentioned the HD 5450 purely as a matter of archeological interest. Ok, in that case looking at the lspci -tv output doesn't tell us anything new. I suspected, but couldn't prove, that the problem might have something to do with the bridge (IBM POWER8 Host Bridge (PHB3)). In

[pull] radeon, amdgpu, ttm drm-next-4.17

Hi Dave, First pull for 4.17. Highlights: - Expose thermal thresholds through hwmon properly - Rework HDP flushing for rings and CPU - Improved dual-link DVI handling in DC - Lots of code clean up - Additional DC clean up - Allow scanout from system memory on CZ/BR/ST - Improved PASID/VM

[PATCH] drm/amdgpu/dce6: Use DRM_DEBUG instead of DRM_INFO for HPD IRQ info

From: Michel Dänzer For consistency with other DCE generations. HPD IRQs appear to be working fine. Signed-off-by: Michel Dänzer Signed-off-by: Michel Dänzer --- drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 2 +- 1 file changed,

Re: [PATCH 3/4] drm/ttm: handle already locked BOs during eviction and swapout.

Am 23.02.2018 um 10:46 schrieb He, Roger: -Original Message- From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of Christian K?nig Sent: Tuesday, February 20, 2018 8:58 PM To: amd-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;

[PATCH 1/6] drm/amd/pp: Add common interface in smu for update dpm setting

it is used for adjust part of dpm settigs to get better performance under different workloads. Change-Id: I6159b8a5849a2e1592fec951cc538dacd9da8c82 Reviewed-by: Alex Deucher Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1

[PATCH 2/6] drm/amd/pp: Add a helper to set field in u32

Change-Id: I2af139a8e197301fe789672fc724e85c2e78c361 Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 16 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 2 ++ 2 files changed, 18 insertions(+) diff --git

[PATCH 3/6] drm/amd/pp: Implement update_dpm_settings on Polaris

v2: lock dpm level when update pptable by SW method use SW method to update DPM settings by updating SRAM directly on Polaris. Change-Id: I90f0cadd60f4e9d62399616e29a254d7c4799597 Reviewed-by: Alex Deucher Signed-off-by: Rex Zhu --- 1.txt

[PATCH 6/6] drm/amd/pp: Implement update_dpm_settings on CI

use SW method to update DPM settings by updating SRAM directly on CI. Change-Id: Ie9ed6c3a0e1c327cc9a9b06bec47b1cede87278d Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c | 97 1 file changed, 97 insertions(+) diff --git

[PATCH 5/6] drm/amd/pp: Implement update_dpm_settings on Tonga

use SW method to update DPM settings by updating SRAM directly on Tonga. Change-Id: I21b1f5caee85587e30ff4d37b040d3ba36b843ee Signed-off-by: Rex Zhu --- .../gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c| 97 ++ 1 file changed, 97 insertions(+) diff --git

[PATCH 4/6] drm/amd/pp: Implement update_dpm_settings on Fiji

use SW method to update DPM settings by updating SRAM directly on Fiji. Change-Id: Ic485e526332a0f1a169d395dfe810d71e5bdfea8 Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c | 97 ++ 1 file changed, 97 insertions(+) diff --git

RE: [PATCH 3/4] drm/ttm: handle already locked BOs during eviction and swapout.

-Original Message- From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of Christian K?nig Sent: Tuesday, February 20, 2018 8:58 PM To: amd-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org; linux-ker...@vger.kernel.org Subject: [PATCH 3/4] drm/ttm:

RE: [PATCH 2/4] drm/amdgpu: use new ww_mutex_is_owned_by function

Reviewed-by: Roger He -Original Message- From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Christian K?nig Sent: Tuesday, February 20, 2018 8:58 PM To: amd-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;

[PATCH 3/4] drm/amd/pp: Fix sclk in highest two levels in compute mode on smu7

For compute workload, fix sclk in highest two levels can get better performance on smu7. user still can change sclk range through sysfs pp_dpm_sclk/mclk. Change-Id: I460f6bb1f94fd5f5d2d653dd1896696b7744bebf Signed-off-by: Rex Zhu ---

[PATCH 2/4] drm/amd/pp: Implement set_power_profile_mode on smu7

User can set smu7 dpm pamameters through sysfs Depending on the workloads, under manual dpm level, user can echo "0/1/2/3/4">pp_power_profile_mode to select 3D_FULL_SCREEN/POWER_SAVING/VIDEO/VR/COMPUTE mode. echo "5 * * * * * * * *">pp_power_profile_mode to config custom mode. "5 * * * * * * *

[PATCH 1/4] drm/amd/pp: Implement get_power_profile_mode on smu7

It show what parameters can be setted on smu7(vi/ci asics) to get better performance. Also show some profiling modes, user can select directly by serial number based on workloads. cat pp_power_profile_mode NUMMODE_NAME SCLK_UP_HYST SCLK_DOWN_HYST SCLK_ACTIVE_LEVEL MCLK_UP_HYST

[PATCH 4/4] drm/amd/pp: Disable power containment on Fiji with compute workload

disable power containment on Fiji in order to get better compute performance it is a temporary workaround. we can adjust power/current limit to satify compute request. Change-Id: I26389a3ff84e1f74e599541b44c0e62ce38a7345 Signed-off-by: Rex Zhu ---

[PATCH] drm/amd/pp: Refine pp_dpm_switch_power_profile exposed to kfd

use pp_set_power_profile_mode to support kfd's gfx/compute profiling mode switch Change-Id: I351cd23a8394c7b0c7945e6875c2ccb29968712e Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 18 ++ 1 file changed, 14 insertions(+), 4

[PATCH] drm/amdgpu: replace iova debugfs file with iomem (v3)

This allows access to pages allocated through the driver with optional IOMMU mapping. v2: Fix number of bytes copied and add write method v3: drop check for kmap return Original-by: Christian König Signed-off-by: Tom St Denis ---