Also, to clarify... if I move it into a regular slot, turn off the eGPU it
works as expected.
Tested with Intel iGPU enabled and disabled, made sure i915 loaded without
error and can connect display to it.
Again, thank you in advance for any time/support offered.
Respectfully,
Daniel S. Moran
I don't think this is the right approach.
TTMPs are really just SGPRs. They're only special because access to them
is restricted to trap handlers.
Note how the index ixSQ_WAVE_TTMP0 is 0x26c. 0x200 is the base for
reading SGPRs, and 0x6c is the operand encoding of TTMP0.
I think umr should
Oh derp, now I get your point (I'm in the middle of making a homebrew
AVR development board from a PCB I designed so I didn't read your
previous email right).
Yup, ok then let's drop the kernel patches and I'll work on umr patches
on Monday.
Sorry for the confusion.
Thanks,
Tom
On 04/07/20
When system uses fw direct loading, then psp context structure won't be
initiliazed. And it is also unable to execute mode reset.
[ 434.601474] amdgpu :0c:00.0: GPU reset begin!
[ 434.694326] amdgpu :0c:00.0: GPU reset
[ 434.743152] BUG: unable to handle kernel NULL pointer dereference
