Re: [4.17-rc4+ regression] X server does not start anymore with segmentation fault in `r600_dri.so`

On 2018-05-14 10:44, Michel Dänzer wrote: On 2018-05-13 11:01 AM, Paul Menzel wrote: Dear Linux AMD folks, There is a regression introduced by a commit after Linux 4.17-rc4 causing the X.Org X server start to fail with the Radeon module loaded on Debian Sid/unstable. The same Linux kernel

RE: iommu/amd: flush IOTLB for specific domains only (v2)

Adding Tom. Hi Joe, My original patch was never accepted. Tom and Joerg worked on another patch series which was supposed to fix the issue in question in addition to do some code cleanups. I believe their patches are already in the mainline. If I remember correctly, one of the patches

[PATCH] drm/amd/amdgpu: Code comments for the amdgpu_ttm.c driver. (v2)

NFC just comments. (v2): Updated based on feedback from Alex Deucher. Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 347 +++- 1 file changed, 340 insertions(+), 7 deletions(-) diff --git

Re: iommu/amd: flush IOTLB for specific domains only (v2)

On 05/15/2018 04:03 AM, Nath, Arindam wrote: > Adding Tom. > > Hi Joe, > > My original patch was never accepted. Tom and Joerg worked on another patch > series which was supposed to fix the issue in question in addition to do some > code cleanups. I believe their patches are already in the

[PATCH 48/57] drm/amdgpu/vg20:Enable the 2nd instance for uvd

From: James Zhu For Vega20, set num of uvd instance to 2, to enble 2nd instance. The IB test build-in registers need update for vega20 2nd instance. Signed-off-by: James Zhu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

[PATCH 46/57] drm/amdgpu/vg20:Restruct uvd.idle_work to support multiple instance (v2)

From: James Zhu Vega20 dual-UVD Hardware need two idle_works, restruct to support multiple instance. v2: squash in indentation fix Signed-off-by: James Zhu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

[PATCH 50/57] drm/amdgpu/vg20:Enable the 2nd instance IRQ for uvd 7.2

From: James Zhu For Vega20, the 2nd instance uvd IRQ using different client id. Enable the 2nd instance IRQ for uvd 7.2 Signed-off-by: James Zhu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

[PATCH 45/57] drm/amdgpu/vg20:Restruct uvd.inst to support multiple instances

From: James Zhu Vega20 has dual-UVD. Need add multiple instances support for uvd. Restruct uvd.inst, using uvd.inst[0] to replace uvd.inst->. Repurpose amdgpu_ring::me for instance index, and initialize to 0. There are no any logical changes here. Signed-off-by: James Zhu

[PATCH 53/57] drm/amdgpu: add df 3.6 headers

Needed for vega20. Signed-off-by: Alex Deucher --- .../drm/amd/include/asic_reg/df/df_3_6_default.h | 26 .../drm/amd/include/asic_reg/df/df_3_6_offset.h| 33 +++ .../drm/amd/include/asic_reg/df/df_3_6_sh_mask.h | 48

[PATCH 55/57] drm/amdgpu: Switch to use df_v3_6_funcs for vega20 (v2)

From: Feifei Xu v2: fix whitespace (Alex) Signed-off-by: Feifei Xu Reviewed-by: Hawking Zhang Reviewed-by: Huang Rui --- drivers/gpu/drm/amd/amdgpu/soc15.c | 6 +- 1 file changed, 5 insertions(+), 1

[PATCH 51/57] drm/amdgpu/vg20:Enable 2nd instance queue maping for uvd 7.2

From: James Zhu Enable 2nd instance uvd queue maping for uvd 7.2. For user, only one UVD instance presents. there is two rings for uvd decode, and 4 rings for uvd encode. Signed-off-by: James Zhu Reviewed-by: Alex Deucher

[PATCH 54/57] drm/amdgpu/df: implement df v3_6 callback functions (v2)

From: Feifei Xu New df helpers for 3.6. v2: switch to using df 3.5 headers. Signed-off-by: Feifei Xu Reviewed-by: Hawking Zhang Reviewed-by: Huang Rui --- drivers/gpu/drm/amd/amdgpu/Makefile | 3 +-

[PATCH 49/57] drm/amdgpu/vg20:Add IH client ID for the 2nd UVD

From: James Zhu For Vega20, there are two UVD hardware. Need add the 2nd IH client ID for the 2nd UVD Hardware. Signed-off-by: James Zhu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher ---

[PATCH 56/57] drm/amdgpu: Add vega20 pci ids

From: Feifei Xu Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 7

[PATCH 57/57] drm/amdgpu: flag Vega20 as experimental

Must set amdgpu.exp_hw_support=1 on the kernel command line in grub to enable support. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git

[PATCH 52/57] drm/amdgpu/vg20:Enable UVD/VCE for Vega20

From: James Zhu Vega20 ucode load type is set to AMDGPU_FW_LOAD_DIRECT for default. So UVD/VCE needn't PSP IP block up. UVD/VCE for Vega20 can be enabled at this moment. Signed-off-by: James Zhu Reviewed-by: Leo Liu Signed-off-by: Alex

[PATCH 0/7] ZFB support for amdgpu

This patch set adds Zero FrameBuffer (ZFB) support to amdgpu. This feature is used for emulators and early silicon before vram is available. System ram is used for "vram". Feifei Xu (6): drm/amdgpu: add new member in amdgpu_mc for zfb support drm/amdgpu: add amdgpu module parameter for zfb

[PATCH 5/7] drm/amdgpu: enable physical transaction for ptd/pde when ZFB is enabled

From: Feifei Xu Signed-off-by: Hawking Zhang Signed-off-by: Feifei Xu Acked-by: John Bridgman Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher ---

[PATCH 7/7] drm/amdgpu: program system bit for pte/pde when ZFB is enabled

From: Feifei Xu Signed-off-by: Hawking Zhang Signed-off-by: Feifei Xu Acked-by: John Bridgman Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher ---

[PATCH 2/7] drm/amdgpu: add amdgpu module parameter for zfb

From: Feifei Xu Users can pass in an array to decide enable/disable Zero Frame Buffer. zfb[0] = zfb_size(MB), zfb[1] = zfb_phys_addr(MB). If zbf_size > 0, zfb is enabled. Otherwise disabled. Usage for example: modprobe amdgpu zfb=256,4096 Signed-off-by: Feifei Xu

[PATCH 6/7] drm/amdgpu: program AGP aperture as frame buffer when ZFB is enabled

From: Hawking Zhang Signed-off-by: Hawking Zhang Acked-by: John Bridgman Reviewed-by: Alex Deucher Signed-off-by: Feifei Xu Signed-off-by: Alex Deucher

[PATCH 3/7] drm/amdgpu: init zfb start address and size

From: Feifei Xu Use module parameter passed from user to initialize zfb start address and size. Signed-off-by: Feifei Xu Signed-off-by: Hawking Zhang Acked-by: John Bridgman Reviewed-by: Alex Deucher

[PATCH 1/7] drm/amdgpu: add new member in amdgpu_mc for zfb support

From: Feifei Xu Signed-off-by: Hawking Zhang Signed-off-by: Feifei Xu Acked-by: John Bridgman Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher ---

[PATCH 4/7] drm/amdgpu: user reserved zfb to init vram base offset and size

From: Feifei Xu Signed-off-by: Feifei Xu Signed-off-by: Hawking Zhang Acked-by: John Bridgman Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher ---

[PATCH 40/57] drm/amd/powerplay: update vega20 cg flags

From: Evan Quan Signed-off-by: Evan Quan Reviewed-by: Huang Rui Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/soc15.c | 19 ++- 1 file changed, 18 insertions(+), 1 deletion(-)

[PATCH 41/57] drm/include: Fix MP1_BASE address for vega20

From: Feifei Xu Signed-off-by: Feifei Xu Reviewed-by: Evan Quan Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/include/vega20_ip_offset.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff

[PATCH 47/57] drm/amdgpu/vg20:increase 3 rings for AMDGPU_MAX_RINGS

From: James Zhu For Vega20, there are two UVD Hardware. One more UVD hardware adds one decode ring and two encode rings. So AMDGPU_MAX_RINGS need increase by 3. Signed-off-by: James Zhu Reviewed-by: Alex Deucher Signed-off-by:

[PATCH 43/57] drm/amdgpu: Disable ip modules that are not ready yet

From: Feifei Xu Please enable above ips on soc15.c when they're available. Signed-off-by: Feifei Xu Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/soc15.c | 14

[PATCH 44/57] drm/amdgpu/vg20:Restruct uvd to support multiple uvds

From: James Zhu Vega20 has dual-UVD. Need Restruct amdgpu_device::uvd to support multiple uvds. There are no any logical changes here. Signed-off-by: James Zhu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

[PATCH 31/57] drm/amd/display: Add Vega20 config. support

From: "Jerry (Fangzhi) Zuo" Signed-off-by: Jerry (Fangzhi) Zuo Reviewed-by: Harry Wentland Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher ---

[PATCH 29/57] drm/amdgpu: Add vega20 to dc support check

From: Feifei Xu Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +

[PATCH 34/57] drm/amd/display: Add harvest IP support for Vega20

From: "Jerry (Fangzhi) Zuo" Retrieve fuses to determine the availability of pipes, and eliminate pipes that cannot be used. Signed-off-by: Jerry (Fangzhi) Zuo Reviewed-by: Hersen Wu Reviewed-by: Tony Cheng

[PATCH 28/57] drm/amd/display/dm: Add vega20 support

From: Feifei Xu Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

[PATCH 35/57] drm/amdgpu/atomfirmware: add new gfx_info data table v2.4 (v2)

Adds additional gfx configuration data. v2: fix typo Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/include/atomfirmware.h | 34 ++ 1 file changed, 34 insertions(+) diff --git

[PATCH 37/57] drm/amdgpu/vg20: fallback to vbios table if gpu info fw is not available (v2)

First try and fetch the gpu info firmware and then fall back to the vbios table if the gpu info firmware is not available. v2: warning fix (Alex) Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++

[PATCH 42/57] drm/amd/include/vg20: adjust VCE_BASE to reuse vce 4.0 header files

From: James Zhu Vega20 uses vce 4.1 engine, all the registers have the same absolute offset with vce 4.0. By adjusting vega20 VCE_BASE, vce 4.1 can reuse vce 4.0 header files. Signed-off-by: James Zhu Reviewed-by: Alex Deucher

[PATCH 32/57] drm/amd/display: Remove COMBO_DISPLAY_PLL0 from Vega20

From: Feifei Xu Signed-off-by: Jerry (Fangzhi) Zuo Reviewed-by: Hersen Wu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher Signed-off-by: Feifei Xu ---

[PATCH 20/57] drm/amdgpu/gfx9: Add support for vega20

From: Feifei Xu Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 ++ 1

[PATCH 19/57] drm/amdgpu/gfx9: Add gfx config for vega20. (v3)

From: Feifei Xu v2: clean up (Alex) v3: additional cleanups (Alex) Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher ---

[PATCH 16/57] drm/amdgpu/sdma4: Add clockgating support for vega20

From: Feifei Xu Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 1 + 1

[PATCH 22/57] drm/amdgpu/soc15:Add vega20 soc15_common_early_init support

From: Feifei Xu Set external_rev_id and disable cg,pg for now. Signed-off-by: Feifei Xu Reviewed-by: Hawking Zhang Reviewed-by: Huang Rui Signed-off-by: Alex Deucher ---

[PATCH 26/57] drm/amdgpu: Add nbio support for vega20 (v2)

From: Feifei Xu Some register offset in nbio v7.4 are different with v7.0. v2: Use nbio7.0 for now. TODO: add a new nbio 7.4 module (Alex) Signed-off-by: Feifei Xu Reviewed-by: Hawking Zhang Reviewed-by: Alex Deucher

[PATCH 30/57] drm/amd: Add dce-12.1 gpio aux registers

From: Roman Li Updating dce12 register headers by adding dc registers required for potential DP LTTPR support. Signed-off-by: Roman Li Acked-by: Alex Deucher Signed-off-by: Alex Deucher ---

[PATCH 25/57] drm/amdgpu/soc15: Add ip blocks for vega20 (v2)

From: Feifei Xu Same as vega10 now. v2: squash in typo fix Signed-off-by: Feifei Xu Reviewed-by: Hawking Zhang Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher ---

[PATCH 24/57] drm/amdgpu/soc15: dynamic initialize ip offset for vega20

From: Feifei Xu Vega20 need a seperate vega20_reg_init.c due to ip base offset difference. Signed-off-by: Feifei Xu Reviewed-by: Hawking Zhang Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

[PATCH 23/57] drm/amdgpu/soc15: Set common clockgating for vega20.

From: Feifei Xu Same as vega10 for now. Signed-off-by: Feifei Xu Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/soc15.c | 1 + 1 file changed, 1 insertion(+) diff

[PATCH 17/57] drm/amdgpu/gfx9: Add support for vega20 firmware

From: Feifei Xu Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10

[PATCH 18/57] drm/amdgpu/gfx9: Add vega20 golden settings (v3)

From: Feifei Xu v2: squash in updates (Alex) v3: squash in more updates (Alex) Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

[PATCH 36/57] drm/amdgpu/atomfirmware: add parser for gfx_info table

Add support for the gfx_info table on boards that use atomfirmware. Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 46 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h | 1 + 2

[PATCH 38/57] drm/amdgpu: drop gpu_info firmware for vega20

No longer required. Reviewed-by: Amber Lin Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 +--- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 8 +++- 2 files changed, 4 insertions(+), 12 deletions(-) diff

[PATCH 39/57] drm/amdgpu: Set vega20 load_type to AMDGPU_FW_LOAD_DIRECT.

From: Feifei Xu Please revert this patch when psp load fw is enabled. Signed-off-by: Feifei Xu Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 3 ++-

[PATCH 33/57] drm/amd/display: Add BIOS smu_info v3_3 support for Vega20

From: "Jerry (Fangzhi) Zuo" Signed-off-by: Jerry (Fangzhi) Zuo Reviewed-by: Hersen Wu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher Signed-off-by: Feifei Xu

[PATCH 2/4] drm/amd/powerplay: new framework to honour DAL clock limits

From: Evan Quan This is needed for vega12 and vega20 which do not support legacy powerstate. With this new framework, the DAL clocks limits can also be honored on these asics. Signed-off-by: Evan Quan Reviewed-by: Alex Deucher

[PATCH 3/4] drm/amd/powerplay: add a framework for perfroming pre display configuration change settings

From: Evan Quan Signed-off-by: Evan Quan Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c | 10 ++

[PATCH 4/4] drm/amdgpu: Drop the unused header files in soc15.c.

From: Feifei Xu Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/soc15.c | 2 -- 1 file changed, 2 deletions(-) diff --git

[PATCH 1/4] drm/amdgpu/gfx9: Update golden setting for gfx9_0.

From: Feifei Xu Update golden_settings_gc_9_0[]. Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 17 + 1

[PATCH 00/57] Vega20 support

This patch set adds initial support for vega20. Alex Deucher (6): drm/amdgpu/atomfirmware: add new gfx_info data table v2.4 (v2) drm/amdgpu/atomfirmware: add parser for gfx_info table drm/amdgpu/vg20: fallback to vbios table if gpu info fw is not available (v2) drm/amdgpu: drop

[PATCH 04/57] drm/amdgpu: set asic family for vega20.

From: Feifei Xu Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +

[PATCH 01/57] drm/amd: Add vega20_ip_offset.h headerfile for vega20.

From: Feifei Xu This headerfile contains vega20's ip base addresses. Signed-off-by: Feifei Xu Reviewed-by: Hawking Zhang Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

[PATCH 02/57] drm/amdgpu: Add vega20 to asic_type enum.

From: Feifei Xu Add vega20 to amd_asic_type enum and amdgpu_asic_name[]. Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

[PATCH 12/57] drm/amdgpu/gmc9: Add vega20 support

From: Feifei Xu Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 +++ 1

[PATCH 13/57] drm/amdgpu/mmhub: Add clockgating support for vega20

From: Feifei Xu Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 1 + 1

[PATCH 09/57] drm/amdgpu: Specify vega20 uvd firmware

From: Feifei Xu Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 5 +

[PATCH 11/57] drm/amdgpu/virtual_dce: Add vega20 support

From: Feifei Xu Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 1 + 1

[PATCH 15/57] drm/amdgpu/sdma4: Add vega20 golden settings (v3)

From: Feifei Xu v2: squash in updates (Alex) v3: squash in more updates (Alex) Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

[PATCH 05/57] drm/amdgpu: Add smu firmware support for vega20

From: Feifei Xu Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 3

[PATCH 06/57] drm/amdgpu/powerplay: Add initial vega20 support v2

From: Feifei Xu Initial powerplay support the same as vega10 for now. Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

[PATCH 03/57] drm/amdgpu: Add gpu_info firmware for vega20.

From: Feifei Xu vega20_gpu_info firmware stores gpu configuration for vega20. Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

[PATCH 08/57] drm/amdgpu: Add vega20 ucode loading method

From: Feifei Xu The same as vega10. Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher ---

Re: [PATCH 2/7] drm/amdgpu: add amdgpu module parameter for zfb

Am 15.05.2018 um 16:50 schrieb Alex Deucher: From: Feifei Xu Users can pass in an array to decide enable/disable Zero Frame Buffer. zfb[0] = zfb_size(MB), zfb[1] = zfb_phys_addr(MB). If zbf_size > 0, zfb is enabled. Otherwise disabled. Usage for example: modprobe amdgpu

Re: iommu/amd: flush IOTLB for specific domains only (v2)

On 5/15/2018 9:47 AM, Joseph Salisbury wrote: > On 05/15/2018 09:08 AM, Tom Lendacky wrote: >> On 5/15/2018 7:34 AM, Nath, Arindam wrote: >>> -Original Message- From: Joseph Salisbury [mailto:joseph.salisb...@canonical.com] Sent: Tuesday, May 15, 2018 5:40 PM To: Nath,

Re: [PATCH 04/21] drm/amdgpu: Add GFXv9 kfd2kgd interface functions

> +static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id, > + uint32_t queue_id, uint32_t __user *wptr, > + uint32_t wptr_shift, uint32_t wptr_mask, > + struct mm_struct *mm) > +{ > + struct amdgpu_device

Re: iommu/amd: flush IOTLB for specific domains only (v2)

On 5/15/2018 7:34 AM, Nath, Arindam wrote: > > >> -Original Message- >> From: Joseph Salisbury [mailto:joseph.salisb...@canonical.com] >> Sent: Tuesday, May 15, 2018 5:40 PM >> To: Nath, Arindam >> Cc: io...@lists.linux-foundation.org; Bridgman, John >>

RE: iommu/amd: flush IOTLB for specific domains only (v2)

> -Original Message- > From: Joseph Salisbury [mailto:joseph.salisb...@canonical.com] > Sent: Tuesday, May 15, 2018 5:40 PM > To: Nath, Arindam > Cc: io...@lists.linux-foundation.org; Bridgman, John > ; j...@8bytes.org; amd- >

[pull] radeon, amdgpu, ttm, and gpu scheduler drm-next-4.18

Hi Dave, Main changes for 4.18. I'd like to do a separate pull for vega20 later this week or next. Highlights: - Reserve pre-OS scanout buffer during init for seemless transition from console to driver - VEGAM support - Improved GPU scheduler documentation - Initial gfxoff support for raven -

Re: [PATCH 1/2] drm/amdgpu: Skip drm_sched_entity realted ops for KIQ ring.

On Tue, May 15, 2018 at 3:31 PM, Andrey Grodzovsky wrote: > Follwoing change 75fbed2 we need to skip KIQ ring when iterating > amdgpu_ctx's scheduler entites. > > Signed-off-by: Andrey Grodzovsky Typo in the title: realted -> related Typo in

Re: [PATCH 2/2] drm/scheduler: Remove obsolete spinlock.

On Tue, May 15, 2018 at 3:31 PM, Andrey Grodzovsky wrote: > Signed-off-by: Andrey Grodzovsky Please provide a better patch description. Alex > --- > drivers/gpu/drm/scheduler/gpu_scheduler.c | 4 > include/drm/gpu_scheduler.h

Re: [PATCH 2/2] drm/scheduler: Remove obsolete spinlock.

Yea, I might need to give another thought to whether this  spinlock can actually be removed. Andrey On 05/15/2018 03:38 PM, Alex Deucher wrote: On Tue, May 15, 2018 at 3:31 PM, Andrey Grodzovsky wrote: Signed-off-by: Andrey Grodzovsky

[PATCH 2/2] drm/scheduler: Remove obsolete spinlock.

Signed-off-by: Andrey Grodzovsky --- drivers/gpu/drm/scheduler/gpu_scheduler.c | 4 include/drm/gpu_scheduler.h | 1 - 2 files changed, 5 deletions(-) diff --git a/drivers/gpu/drm/scheduler/gpu_scheduler.c

[PATCH 1/2] drm/amdgpu: Skip drm_sched_entity realted ops for KIQ ring.

Follwoing change 75fbed2 we need to skip KIQ ring when iterating amdgpu_ctx's scheduler entites. Signed-off-by: Andrey Grodzovsky --- drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 21 ++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git

Re: [PATCH 2/2] drm/scheduler: Remove obsolete spinlock.

On 2018年05月16日 03:31, Andrey Grodzovsky wrote: Signed-off-by: Andrey Grodzovsky --- drivers/gpu/drm/scheduler/gpu_scheduler.c | 4 include/drm/gpu_scheduler.h | 1 - 2 files changed, 5 deletions(-) diff --git

Re: [PATCH 2/2] drm/scheduler: Remove obsolete spinlock.

Yeah, that what I am not sure about... It's lockless in a sense of single producer single consumer but not for multiple concurrent producers... So now I think this spinlock should stay there... It just looked useless to me at first sight... Andrey

Re: [PATCH 04/21] drm/amdgpu: Add GFXv9 kfd2kgd interface functions

On 2018-05-15 05:41 AM, Dave Airlie wrote: >> +static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id, >> + uint32_t queue_id, uint32_t __user *wptr, >> + uint32_t wptr_shift, uint32_t wptr_mask, >> + struct