We want vblank counts and timestamps of flip completion as sent
in pageflip completion events to be consistent with the vblank
count and timestamp of the vblank of flip completion, like in non
VRR mode.
In VRR mode, drm_update_vblank_count() - and thereby vblank
count and timestamp updates - must
From: Hugo Hu
[Why]
When you have a SST branch device the driver, Even no sink device connected,
it also send HPD with a valid EDID. Driver will config it to DP sink.
Therefore, there're two displays in display setting.
DPCD 0x05, DFP_PRESENT = 1 (branch device),
DFP_TYPE = 00 (Display Port)
From: hersen wu
program default output gamma if no user specific gamma
parameters passed.
Change-Id: I909e6d145f8bdc49c405e8ca80839818a7c5d152
Signed-off-by: hersen wu
Reviewed-by: Sun peng Li
Acked-by: Bhawanpreet Lakha
---
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 53
From: Joshua Aberback
Create a functions to return swizzle types for dml
Change-Id: Ieaeb9ce26568ee1ebdb4d2d5ce9a17af07e56c54
Signed-off-by: Joshua Aberback
Reviewed-by: Tony Cheng
Acked-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 88 ++-
From: Aric Cyr
Change-Id: I17892ab59c946d855c262ddbb6711feedbb5a74d
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
From: Dmytro Laktyushkin
Currently only top pipe gets output tf programmed. This change
makes all odm head pipes get output tf programmed.
Change-Id: I7f7c18d79668ba8cf7ffcfa1784a1fee82a108d6
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Nikola Cornij
Acked-by: Bhawanpreet Lakha
---
From: Eric Bernstein
Signed-off-by: Eric Bernstein
Reviewed-by: Dmytro Laktyushkin
Reviewed-by: Nevenko Stupar
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 7 +++
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 3 ++-
Summary of changes
*Program default gamma
*cleanup unused functions
*preferred pipe split logic
Aric Cyr (1):
drm/amd/display: 3.2.24
Dmytro Laktyushkin (1):
drm/amd/display: fix odm output gamma programming
Eric Bernstein (1):
drm/amd/display: use dc_is_virtual instead of ENUM
Eryk
From: Fatemeh Darbehani
[Why]
set_display_requirement, dcn1_pplib_apply_display_requirements
are no longer used and should be removed.
Change-Id: Ie4d61d873d2f3ef2d5587fbc0b38079bdcf93ceb
Signed-off-by: Fatemeh Darbehani
Reviewed-by: Hersen Wu
Acked-by: Bhawanpreet Lakha
---
From: Eryk Brol
Create dccg_init and init_clocks for future use
Change-Id: If0fd1891eebc526d67c3108e74f3d739ba8dfdc4
Signed-off-by: Eryk Brol
Reviewed-by: Jun Lei
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h | 2 ++
From: Nicholas Kazlauskas
[Why]
The actual position for the cursor on the screen is essentially:
x_out = x - x_plane - x_hotspot
y_out = y - y_plane - y_hotspot
The register values for cursor position and cursor hotspot need to be
greater than zero when programmed, but we also need to subtract
From: Nikola Cornij
pass SDP splitting when setting stream attributes for future use
Change-Id: Ida059f1b6bacee097d8abd209aac6b509d27502b
Signed-off-by: Nikola Cornij
Reviewed-by: Tony Cheng
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 3
From: Harry Wentland
[WHY]
The resource constructor currently needs num_virtual_links from
init_data but will need access to other items provided by DM.
[HOW]
Pass init_data into DCN create_resource_pool functions.
Change-Id: I3e250583c1a05c3ee9281fbbe59c42091b4f5ba3
Signed-off-by: Harry
From: Jun Lei
[why]
existing logic finds "first free pipe from 5 -> 0" to split
this will cause certain sequences to require DC to move
an MPCC from one tree to another, which is unsupported
this leads to blackscreen
to mitigate this problem, we will always try to acquire the
"preferred" pipe,
In VRR mode, proper vblank/pageflip timestamps can only be computed
after the display scanout position has left front-porch. Therefore
delay calls to drm_crtc_handle_vblank(), and thereby calls to
drm_update_vblank_count() and pageflip event delivery, to after the
end of front-porch when in VRR
For throttling to work correctly, we always need a baseline vblank
count last_flip_vblank that increments at start of front-porch.
This is the case for drm_crtc_vblank_count() in non-VRR mode, where
the vblank irq fires at start of front-porch and triggers DRM core
vblank handling, but it is no
During VRR mode we can not allow vblank irq dis-/enable
transitions, as an enable after a disable can happen at
an arbitrary time during the video refresh cycle, e.g.,
with a high likelyhood inside vblank front-porch. An
enable during front-porch would cause vblank timestamp
updates/calculations
The current patch series, with feedback from Paul, Nicholas and Harry
applied and r-b / acked-by tags added. Thanks for the feedback.
Rebased to current drm-5.2-wip branch.
Patch 1/4 is still the same though. Don't know if i or Nicholas could
fix it in a followup patch, or this one needs more
Hi!
Is there a way how to limit gpu max clock rate? Currently I can either
leave the clock to automatic mode or force it to specific level
via /sys/class/drm/card0/device/pp_dpm_sclk. But ideally I would like the
clock to be automatically regulated but specify a different upper limit for
power
The brace initialization used here generates errors on some
compilers. Use memset to make this more portable.
Cc: Sun peng Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
Found a way how to do it by modifying amdgpu driver. If there's any better
way please let me know..
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
index 5273de3c5b98..70b9fb8d6041 100644
---
On 3/22/19 9:49 AM, Paul Menzel wrote:
> Dear Nicholas,
>
>
> On 03/22/19 14:15, Nicholas Kazlauskas wrote:
>> The brace initialization used here generates errors on some
>> compilers. Use memset to make this more portable.
>
> Could you please specify the problematic compiler/toolchain in
>
[Why]
DC provides a few visual confirmation debug options that can be
dynamically changed at runtime to help debug surface programming issues
but we don't have any way to access it from userspace.
[How]
Add the amdgpu_dm_visual_confirm debugfs entry.
It accepts a string containing the DC visual
Kernels are 5.0 and 5.1-rc1.
Is it just kernels 5.0 and 5.1? There haven't really been any display
related changes to radeon in ages. Possibly a duplicate of:
https://bugzilla.kernel.org/show_bug.cgi?id=198123
No, I just put the card in and tested with only the current kernels I had.
I can
The brace initialization used here generates warnings on some
compilers. For example, on GCC 4.9:
[...] In function ‘dm_determine_update_type_for_commit’:
[...] error: missing braces around initializer [-Werror=missing-braces]
struct dc_stream_update stream_update = { 0 };
^
Use
I decided to put a discrete graphics card into a PC and found a fitting Radeon
HD 7450.
It works, but there is strange whiteness like the brightness is oversaturated
and
light places turn into other colors:
* on fbcon, right after radeondrmfb initializes
* in X after powersave
The colors
On Wed, Mar 20, 2019 at 03:51:18PM +0100, Andrey Konovalov wrote:
> This patch is a part of a series that extends arm64 kernel ABI to allow to
> pass tagged user pointers (with the top byte set to something else other
> than 0x00) as syscall arguments.
>
> This patch allows tagged pointers to be
On Wed, Mar 20, 2019 at 03:51:23PM +0100, Andrey Konovalov wrote:
> This patch is a part of a series that extends arm64 kernel ABI to allow to
> pass tagged user pointers (with the top byte set to something else other
> than 0x00) as syscall arguments.
>
> tcp_zerocopy_receive() uses provided
Dear Nicholas,
On 03/22/19 14:15, Nicholas Kazlauskas wrote:
> The brace initialization used here generates errors on some
> compilers. Use memset to make this more portable.
Could you please specify the problematic compiler/toolchain in
the commit message?
[…]
Kind regards,
Paul
ping
-Original Message-
From: Liu, Shaoyun
Sent: Wednesday, March 20, 2019 4:22 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun
Subject: [PATCH] drm/amdgpu: XGMI pstate switch initial support
Driver vote low to high pstate switch whenever there is an outstanding XGMI
mapping
Yeah, that should work.
Christian.
Am 22.03.19 um 08:34 schrieb zhoucm1:
how about the attached?
If ok, I will merge to pathc#1.
-David
On 2019年03月21日 22:40, Christian König wrote:
No, atomic cmpxchg is a hardware operation. If you want to replace
that you need a lock again.
Maybe
Am 22.03.19 um 06:30 schrieb Monk Liu:
should use amdgpu_bo_map, otherwise you'll hit NULL
pointer bug if with amdgpu_bo_kptr
Yeah that is a known problem. NAK to this one cause that would map the
BO at the wrong time.
But in general I have a proper fix for this in the pipeline.
Christian.
Am 20.03.19 um 21:21 schrieb Liu, Shaoyun:
Driver vote low to high pstate switch whenever there is an outstanding
XGMI mapping request. Driver vote high to low pstate when all the
outstanding XGMI mapping is terminated.
Only a few style nit picks, but apart from that reviewed-by: Christian
It's OK to have this feature bit with old SMU firmwares.
But the feature should be disabled on them.
Change-Id: I6fb4869ef454ea7b6d01cf368b457be01eeb5058
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 10 +-
Avoid left shift overflow.
Change-Id: If03f4f4d440b6d742d8eaa23d0bae6ddd21c01ea
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
On Wed, Mar 20, 2019 at 03:51:25PM +0100, Andrey Konovalov wrote:
> This patch is a part of a series that extends arm64 kernel ABI to allow to
> pass tagged user pointers (with the top byte set to something else other
> than 0x00) as syscall arguments.
>
> seq_print_user_ip() uses provided user
On Wed, Mar 20, 2019 at 03:51:31PM +0100, Andrey Konovalov wrote:
> This patch is a part of a series that extends arm64 kernel ABI to allow to
> pass tagged user pointers (with the top byte set to something else other
> than 0x00) as syscall arguments.
>
> videobuf_dma_contig_user_get() uses
On Wed, Mar 20, 2019 at 03:51:29PM +0100, Andrey Konovalov wrote:
> This patch is a part of a series that extends arm64 kernel ABI to allow to
> pass tagged user pointers (with the top byte set to something else other
> than 0x00) as syscall arguments.
>
> radeon_ttm_tt_pin_userptr() uses
On Wed, Mar 20, 2019 at 03:51:24PM +0100, Andrey Konovalov wrote:
> @@ -2120,13 +2135,14 @@ static int prctl_set_mm(int opt, unsigned long addr,
> if (opt == PR_SET_MM_AUXV)
> return prctl_set_auxv(mm, addr, arg4);
>
> - if (addr >= TASK_SIZE || addr < mmap_min_addr)
> +
On Wed, Mar 20, 2019 at 03:51:27PM +0100, Andrey Konovalov wrote:
> This patch is a part of a series that extends arm64 kernel ABI to allow to
> pass tagged user pointers (with the top byte set to something else other
> than 0x00) as syscall arguments.
>
> stack_map_get_build_id_offset() uses
Hello ,
I am investigating a issue reported by a test group concerning this driver.
Their test loads and unloads every kernel module included in the 4.14.35 kernel
release . You don’t even need a AMD platform . It occurs on any Intel, or a
KVM VM instance too.
Kernel panic while “
On Wed, Mar 20, 2019 at 03:51:32PM +0100, Andrey Konovalov wrote:
> This patch is a part of a series that extends arm64 kernel ABI to allow to
> pass tagged user pointers (with the top byte set to something else other
> than 0x00) as syscall arguments.
>
> check_mem_type() uses provided user
On Wed, Mar 20, 2019 at 03:51:26PM +0100, Andrey Konovalov wrote:
> This patch is a part of a series that extends arm64 kernel ABI to allow to
> pass tagged user pointers (with the top byte set to something else other
> than 0x00) as syscall arguments.
>
> find_active_uprobe() uses user pointers
Driver vote low to high pstate switch whenever there is an outstanding
XGMI mapping request. Driver vote high to low pstate when all the
outstanding XGMI mapping is terminated.
Change-Id: I197501f853c47f844055c0e28c0ac00a1ff06607
Signed-off-by: shaoyunl
---
how about the attached?
If ok, I will merge to pathc#1.
-David
On 2019年03月21日 22:40, Christian König wrote:
No, atomic cmpxchg is a hardware operation. If you want to replace
that you need a lock again.
Maybe just add a comment and use an explicit cast to void* ? Not sure
if that
Ping..
> -Original Message-
> From: Evan Quan
> Sent: 2019年3月15日 14:02
> To: amd-gfx@lists.freedesktop.org
> Cc: Quan, Evan
> Subject: [PATCH 3/3] drm/amdgpu: add more debug friendly prompts
>
> Large piece of codes share one error prompt. That is not friendly for
> debugging.
>
>
Ping..
> -Original Message-
> From: Evan Quan
> Sent: 2019年3月15日 14:02
> To: amd-gfx@lists.freedesktop.org
> Cc: Quan, Evan
> Subject: [PATCH 1/3] drm/amdgpu: error out on mode1 reset failure
>
> The error return value should be correctly reflected.
>
> Change-Id:
Ping..
> -Original Message-
> From: Evan Quan
> Sent: 2019年3月18日 10:42
> To: amd-gfx@lists.freedesktop.org
> Cc: Quan, Evan
> Subject: [PATCH] drm/amdgpu: defer cmd/fence/fw buffers destroy on
> hw_init failure
>
> As the cleanup jobs performed in pre_fini may still need these buffers.
Reviewed-by: Feifei Xu
-Original Message-
From: amd-gfx On Behalf Of Quan, Evan
Sent: Friday, March 22, 2019 4:31 PM
To: Quan, Evan ; amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 3/3] drm/amdgpu: add more debug friendly prompts
Ping..
> -Original Message-
> From: Evan
Reviewed-by: Feifei Xu
-Original Message-
From: amd-gfx On Behalf Of Quan, Evan
Sent: Friday, March 22, 2019 4:32 PM
To: Quan, Evan ; amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 1/3] drm/amdgpu: error out on mode1 reset failure
Ping..
> -Original Message-
> From: Evan
This affects hw_init only. It's not on the path of S3/resume and
gpu_recovery/resume.
So, they are not affected.
Regards,
Evan
> -Original Message-
> From: Xu, Feifei
> Sent: 2019年3月22日 16:56
> To: Quan, Evan ; amd-gfx@lists.freedesktop.org
> Cc: Quan, Evan
> Subject: RE: [PATCH]
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