Maybe it will be better to add follow check, and change “if (r <= 0 || tmo <=
0) " to "if (r <0 || tmo <= 0)".
r = dma_fence_wait_timeout(f, false, timeout);
if (r == 0) {
r = -ETIMEDOUT;
break;
} else if (r < 0) {
break;
Can you confirm that the save custom profile settings are not lost after resume?
With that confirmed, the patch is Reviewed-by: Evan Quan
> -Original Message-
> From: amd-gfx On Behalf Of
> Russell, Kent
> Sent: 2019年4月1日 19:27
> To: amd-gfx@lists.freedesktop.org
> Cc: Russell, Kent
>
Thanks. Reviewed-by: Evan Quan
> -Original Message-
> From: amd-gfx On Behalf Of
> Russell, Kent
> Sent: 2019年4月1日 19:27
> To: amd-gfx@lists.freedesktop.org
> Cc: Russell, Kent
> Subject: [PATCH 2/2] drm/amdgpu: Allow switching to CUSTOM profile on
> Vega20
>
> Vega20 stores a CUSTOM
Reviewed-by: Tao Zhou
Tao
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Deucher
> Sent: 2019年3月30日 3:16
> To: amd-gfx@lists.freedesktop.org; airl...@gmail.com
> Cc: Deucher, Alexander
> Subject: [PATCH] drm/amdgpu/smu11: fix warning on 32bit arches
>
> Fixes
> warning:
From: Christian König
Lockless container implementation similar to a dma_fence_array, but with
only two elements per node and automatic garbage collection.
v2: properly document dma_fence_chain_for_each, add dma_fence_chain_find_seqno,
drop prev reference during garbage collection if it's
On 2019年04月01日 16:19, Lionel Landwerlin wrote:
On 01/04/2019 06:54, Zhou, David(ChunMing) wrote:
-Original Message-
From: Lionel Landwerlin
Sent: Saturday, March 30, 2019 10:09 PM
To: Koenig, Christian ; Zhou, David(ChunMing)
; dri-de...@lists.freedesktop.org; amd-
Signed-off-by: Chunming Zhou
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 8a0732088640..4d8db87048d3
v2: individually allocate chain array, since chain node is free independently.
v3: all existing points must be already signaled before cpu perform signal
operation,
so add check condition for that.
v4: remove v3 change and add checking to prevent out-of-order
v5: unify binary and timeline
points array is one-to-one match with syncobjs array.
v2:
add seperate ioctl for timeline point wait, otherwise break uapi.
v3:
userspace can specify two kinds waits::
a. Wait for time point to be completed.
b. and wait for time point to become available
v4:
rebase
v5:
add comment for
user mode can query timeline payload.
v2: check return value of copy_to_user
v3: handle querying entry by entry
v4: rebase on new chain container, simplify interface
v5: query last signaled timeline point, not last point.
v6: add unorder point check
Signed-off-by: Chunming Zhou
Cc: Tobias Hector
we need to import/export timeline point.
v2: unify to one transfer ioctl
Signed-off-by: Chunming Zhou
Cc: Lionel Landwerlin
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/drm/drm_internal.h | 2 +
drivers/gpu/drm/drm_ioctl.c| 2 +
drivers/gpu/drm/drm_syncobj.c | 74
syncobj wait/signal operation is appending in command submission.
v2: separate to two kinds in/out_deps functions
v3: fix checking for timeline syncobj
Signed-off-by: Chunming Zhou
Cc: Tobias Hector
Cc: Jason Ekstrand
Cc: Dave Airlie
Cc: Chris Wilson
Cc: Lionel Landwerlin
Reviewed-by:
From: Christian König
Use the dma_fence_chain object to create a timeline of fence objects
instead of just replacing the existing fence.
v2: rebase and cleanup
v3: fix garbage collection parameters
v4: add unorder point check, print a warn calltrace
Signed-off-by: Christian König
Cc: Lionel
timeline syncobj gives user more flexibility and convenience to do
sychronization.
Lionel has written cts and adapted ANV based on this patch set, and also
reviewed
the patch set.
please someone from community helps to submit the patch set to drm-misc-next.
Christian König (3):
dma-buf: add
Am 01.04.19 um 11:05 schrieb Lionel Landwerlin:
> On 01/04/2019 11:50, zhoucm1 wrote:
>>
>>
>> On 2019年04月01日 16:19, Lionel Landwerlin wrote:
>>> On 01/04/2019 06:54, Zhou, David(ChunMing) wrote:
> -Original Message-
> From: Lionel Landwerlin
> Sent: Saturday, March 30,
From: Christian König
Implement finding the right timeline point in drm_syncobj_find_fence.
v2: return -EINVAL when the point is not submitted yet.
v3: fix reference counting bug, add flags handling as well
v4: add timeout for find fence
Signed-off-by: Christian König
Cc: Lionel Landwerlin
On 01/04/2019 11:50, zhoucm1 wrote:
On 2019年04月01日 16:19, Lionel Landwerlin wrote:
On 01/04/2019 06:54, Zhou, David(ChunMing) wrote:
-Original Message-
From: Lionel Landwerlin
Sent: Saturday, March 30, 2019 10:09 PM
To: Koenig, Christian ; Zhou,
David(ChunMing)
;
On 01/04/2019 06:54, Zhou, David(ChunMing) wrote:
-Original Message-
From: Lionel Landwerlin
Sent: Saturday, March 30, 2019 10:09 PM
To: Koenig, Christian ; Zhou, David(ChunMing)
; dri-de...@lists.freedesktop.org; amd-
g...@lists.freedesktop.org; ja...@jlekstrand.net; Hector, Tobias
On Mon, Mar 25, 2019 at 3:08 PM Kevin Brodsky wrote:
>
> On 22/03/2019 16:07, Catalin Marinas wrote:
> > On Wed, Mar 20, 2019 at 03:51:31PM +0100, Andrey Konovalov wrote:
> >> This patch is a part of a series that extends arm64 kernel ABI to allow to
> >> pass tagged user pointers (with the top
On Mon, Mar 25, 2019 at 2:54 PM Kevin Brodsky wrote:
>
> On 22/03/2019 12:04, Catalin Marinas wrote:
> > On Wed, Mar 20, 2019 at 03:51:23PM +0100, Andrey Konovalov wrote:
> >> This patch is a part of a series that extends arm64 kernel ABI to allow to
> >> pass tagged user pointers (with the top
On Fri, Mar 22, 2019 at 4:52 PM Catalin Marinas wrote:
>
> On Wed, Mar 20, 2019 at 03:51:27PM +0100, Andrey Konovalov wrote:
> > This patch is a part of a series that extends arm64 kernel ABI to allow to
> > pass tagged user pointers (with the top byte set to something else other
> > than 0x00)
On Fri, Mar 22, 2019 at 4:45 PM Catalin Marinas wrote:
>
> On Wed, Mar 20, 2019 at 03:51:25PM +0100, Andrey Konovalov wrote:
> > This patch is a part of a series that extends arm64 kernel ABI to allow to
> > pass tagged user pointers (with the top byte set to something else other
> > than 0x00)
v2: symbos are stored in lexical order.
v3: drop export/import and extra query indirection
Signed-off-by: Chunming Zhou
Signed-off-by: Christian König
---
amdgpu/amdgpu-symbol-check | 2 ++
amdgpu/amdgpu.h| 39 ++
amdgpu/amdgpu_cs.c | 23
Signed-off-by: Chunming Zhou
---
amdgpu/amdgpu.h| 22 ++
amdgpu/amdgpu_cs.c | 16
2 files changed, 38 insertions(+)
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index b5bd3ed9..2350835b 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -1670,6
v2: drop export/import
Signed-off-by: Chunming Zhou
---
xf86drm.c | 44
xf86drm.h | 6 ++
2 files changed, 50 insertions(+)
diff --git a/xf86drm.c b/xf86drm.c
index 18ad7c58..66e0c985 100644
--- a/xf86drm.c
+++ b/xf86drm.c
@@ -4279,3 +4279,47
Signed-off-by: Chunming Zhou
---
include/drm/amdgpu_drm.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
index be84e43c..bfa04dd8 100644
--- a/include/drm/amdgpu_drm.h
+++ b/include/drm/amdgpu_drm.h
@@ -523,6 +523,8 @@ struct
Vega20 stores a CUSTOM profile on the GPU, but it may not be valid. Add
a bool to vega20_hwmgr to determine whether or not a valid CUSTOM
profile has been set, and use that to check when a user requests
switching to the CUSTOM profile without passing in any arguments. Then
if the CUSTOM profile
Don't return an error if the CUSTOM profile is selected, just apply it
with the values saved to the GPU. But ensure that we zero out the
copy stored in adev to ensure that a valid profile has been submitted at
some point first
v2: Fix comment that wasn't updated from previous patch
Change-Id:
v2: adapt to new one transfer ioctl
Signed-off-by: Chunming Zhou
---
amdgpu/amdgpu-symbol-check | 3 ++
amdgpu/amdgpu.h| 51
amdgpu/amdgpu_cs.c | 68 ++
3 files changed, 122 insertions(+)
diff --git
v2: drop DRM_SYNCOBJ_CREATE_TYPE_TIMELINE, fix timeout calculation,
fix some warnings
v3: add export/import and cpu signal testing cases
Signed-off-by: Chunming Zhou
Signed-off-by: Christian König
---
tests/amdgpu/Makefile.am | 3 +-
tests/amdgpu/amdgpu_test.c | 12 ++
v2: use one transfer ioctl
Signed-off-by: Chunming Zhou
---
xf86drm.c | 33 +
xf86drm.h | 6 ++
2 files changed, 39 insertions(+)
diff --git a/xf86drm.c b/xf86drm.c
index 66e0c985..d57c4218 100644
--- a/xf86drm.c
+++ b/xf86drm.c
@@ -4280,6 +4280,21 @@
v2: drop not implemented IOCTLs and flags
v3: add transfer/signal ioctls
Signed-off-by: Chunming Zhou
Signed-off-by: Christian König
---
include/drm/drm.h | 35 +++
1 file changed, 35 insertions(+)
diff --git a/include/drm/drm.h b/include/drm/drm.h
index
From: Le Ma
The rlc reset function is not necessary during gfx9 initialization/resume phase.
And this function would even cause rlc fw loading failed on some gfx9 ASIC.
Remove this function safely with verification well on Vega/Raven platform.
Change-Id:
Reviewed-by: Feifei Xu
Regards,
Feifei
-Original Message-
From: amd-gfx On Behalf Of Le Ma
Sent: 2019年4月1日 18:47
To: amd-gfx@lists.freedesktop.org
Cc: Ma, Le
Subject: [PATCH 1/1] drm/amdgpu: remove unnecessary rlc reset function on gfx9
From: Le Ma
The rlc reset function is not
Am 30.03.19 um 01:41 schrieb Kuehling, Felix:
Patches 1-3 are Reviewed-by: Felix Kuehling
Thanks.
About the direct mode, that removes a bunch of synchronization, so it
must make some assumptions about the state of the page tables. What
makes that safe?
Direct mode is only supposed to be
Vega20 stores a CUSTOM profile on the GPU, but it may not be valid. Add
a bool to vega20_hwmgr to determine whether or not a valid CUSTOM
profile has been set, and use that to check when a user requests
switching to the CUSTOM profile without passing in any arguments. Then
if the CUSTOM profile
Don't return an error if the CUSTOM profile is selected, just apply it
with the values saved to the GPU. But ensure that we zero out the
copy stored in adev to ensure that a valid profile has been submitted at
some point first
Change-Id: Iafa5994e89ce00d3a124285b3435b581ec0e5d3b
Signed-off-by:
On 2019-04-01 7:23 a.m., Christian König wrote:
> Am 30.03.19 um 01:41 schrieb Kuehling, Felix:
>> Patches 1-3 are Reviewed-by: Felix Kuehling
>
> Thanks.
>
>>
>> About the direct mode, that removes a bunch of synchronization, so it
>> must make some assumptions about the state of the page
I have finally bisected the bug i have reported here:
https://bugzilla.kernel.org/show_bug.cgi?id=201077
log files of individual tests are here:
https://github.com/tuxutku/rx_540_kernel_bisecting_files/
###
[utku2@utku2 linux]$ git bisect bad
On Fri, Mar 22, 2019 at 4:41 PM Catalin Marinas wrote:
>
> On Wed, Mar 20, 2019 at 03:51:24PM +0100, Andrey Konovalov wrote:
> > @@ -2120,13 +2135,14 @@ static int prctl_set_mm(int opt, unsigned long addr,
> > if (opt == PR_SET_MM_AUXV)
> > return prctl_set_auxv(mm, addr,
On Fri, Mar 22, 2019 at 5:22 PM Catalin Marinas wrote:
>
> On Wed, Mar 20, 2019 at 03:51:32PM +0100, Andrey Konovalov wrote:
> > This patch is a part of a series that extends arm64 kernel ABI to allow to
> > pass tagged user pointers (with the top byte set to something else other
> > than 0x00)
On 2019-04-01 2:03 p.m., Christian König wrote:
> Am 01.04.19 um 19:59 schrieb Kuehling, Felix:
>> On 2019-04-01 7:23 a.m., Christian König wrote:
>>> Am 30.03.19 um 01:41 schrieb Kuehling, Felix:
Patches 1-3 are Reviewed-by: Felix Kuehling
>>> Thanks.
>>>
About the direct mode, that
Am 01.04.19 um 19:59 schrieb Kuehling, Felix:
On 2019-04-01 7:23 a.m., Christian König wrote:
Am 30.03.19 um 01:41 schrieb Kuehling, Felix:
Patches 1-3 are Reviewed-by: Felix Kuehling
Thanks.
About the direct mode, that removes a bunch of synchronization, so it
must make some assumptions
Am 01.04.19 um 16:04 schrieb Zhou, David(ChunMing):
> 在 2019/4/1 21:05, Christian König 写道:
>> Am 01.04.19 um 04:54 schrieb Zhou, David(ChunMing):
-Original Message-
From: amd-gfx On Behalf Of
Christian K?nig
Sent: Saturday, March 30, 2019 2:33 AM
To:
在 2019/4/1 22:07, Koenig, Christian 写道:
> Am 01.04.19 um 16:04 schrieb Zhou, David(ChunMing):
>> 在 2019/4/1 21:05, Christian König 写道:
>>> Am 01.04.19 um 04:54 schrieb Zhou, David(ChunMing):
> -Original Message-
> From: amd-gfx On Behalf Of
> Christian K?nig
> Sent:
Ping?
Alex
On Fri, Mar 29, 2019 at 3:16 PM Alex Deucher wrote:
>
> Fixes
> warning: cast from pointer to integer of different size
> [-Wpointer-to-int-cast]
> on 32 bit platforms.
>
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 2 +-
> 1 file changed, 1
Am 01.04.19 um 04:54 schrieb Zhou, David(ChunMing):
-Original Message-
From: amd-gfx On Behalf Of
Christian K?nig
Sent: Saturday, March 30, 2019 2:33 AM
To: amd-gfx@lists.freedesktop.org
Subject: [PATCH] drm/amdgpu: fix old fence check in amdgpu_fence_emit
We don't hold a reference
在 2019/4/1 21:05, Christian König 写道:
> Am 01.04.19 um 04:54 schrieb Zhou, David(ChunMing):
>>
>>> -Original Message-
>>> From: amd-gfx On Behalf Of
>>> Christian K?nig
>>> Sent: Saturday, March 30, 2019 2:33 AM
>>> To: amd-gfx@lists.freedesktop.org
>>> Subject: [PATCH] drm/amdgpu: fix
48 matches
Mail list logo
