During the suspend, the jpeg_v4_0_hw_init function will
use the amdgpu_irq_put to disable the irq of jpeg.inst, but it
was not enabled during the resume process, which resulted in a
call trace during the GPU reset process.
[ 50.497562] RIP: 0010:amdgpu_irq_put+0xa4/0xc0 [amdgpu]
[ 50.497619]
[AMD Official Use Only - General]
> -Original Message-
> From: amd-gfx On Behalf Of Horatio
> Zhang
> Sent: Monday, May 8, 2023 6:20 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Liu, HaoPing (Alan) ; Zhang, Horatio
> ; Xu, Feifei ; Zhou1, Tao
> ; Jiang, Sonny ; Limonciello,
> Mario ;
[AMD Official Use Only - General]
The series is:
Reviewed-by: Tao Zhou
> -Original Message-
> From: Horatio Zhang
> Sent: Monday, May 8, 2023 6:20 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking ; Zhou1, Tao
> ; Xu, Feifei ; Liu, Leo
> ; Jiang, Sonny ; Limonciello,
> Mario
[Public]
Hi all,
This week this patchset was tested on the following systems:
Lenovo Thinkpad T14s Gen2, with AMD Ryzen 5 5650U
Lenovo Thinkpad T13s Gen4 with AMD Ryzen 5 6600U
Reference AMD RX6800
These systems were tested on the following display types:
eDP, (1080p 60hz [5650U])
LoongArch now provides kernel_fpu_begin() and kernel_fpu_end() that are
used like the x86 counterparts in commit 2b3bd32ea3a22ea2d ("LoongArch:
Provide kernel fpu functions"), so we can enable DC_FP on LoongArch for
supporting more DCN devices.
Signed-off-by: WANG Xuerui
Signed-off-by: Huacai
From: Lee Jones
[ Upstream commit 4082b9f5ead4966797dddcfef0905d59e5a83873 ]
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:157:21: note:
in expansion of macro ‘mmCRTC1_DCFE_MEM_LIGHT_SLEEP_CNTL’
From: Lee Jones
[ Upstream commit 4082b9f5ead4966797dddcfef0905d59e5a83873 ]
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:157:21: note:
in expansion of macro ‘mmCRTC1_DCFE_MEM_LIGHT_SLEEP_CNTL’
From: Lee Jones
[ Upstream commit 4082b9f5ead4966797dddcfef0905d59e5a83873 ]
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:157:21: note:
in expansion of macro ‘mmCRTC1_DCFE_MEM_LIGHT_SLEEP_CNTL’
This is a note to let you know that I've just added the patch titled
drm/amd/display (gcc13): fix enum mismatch
to the 6.1-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
From: Lee Jones
[ Upstream commit 4082b9f5ead4966797dddcfef0905d59e5a83873 ]
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:157:21: note:
in expansion of macro ‘mmCRTC1_DCFE_MEM_LIGHT_SLEEP_CNTL’
On 2023/5/5 19:32, Huacai Chen wrote:
Now LoongArch provides kernel_fpu_begin() and kernel_fpu_end() in commit
2b3bd32ea3a22ea2d ("LoongArch: Provide kernel fpu functions"), so we can
enable DC_FP for DCN devices.
Some grammatical fixes and paraphrasing:
"LoongArch now provides
From: Jiri Slaby (SUSE)
commit 545094d993f4639482018becda5f2a47d126f0ab upstream.
rn_vbios_smu_set_dcn_low_power_state() produces a valid warning with
gcc-13:
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c:237:6:
error: conflicting types for
Hello,
I hope this is the right place to get help.
I using Debian Bookworm/12 and with Kernel 6.1 I'd some issues with external
displays: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=1033637
With Kernel 6.3 it's much better and it works, more or less. But when I boot
and I need to type my
During the suspend, the vcn_v4_0_hw_init function will
use the amdgpu_irq_put to disable the irq of vcn.inst, but it
was not enabled during the resume process, which resulted in a
call trace during the GPU reset process.
[ 44.563572] RIP: 0010:amdgpu_irq_put+0xa4/0xc0 [amdgpu]
[ 44.563629]
Assignments in if condition are less readable and error-prone.
Fixes below error & warnings reported by checkpatch"
ERROR: do not use assignment in if condition
+ } else if ((src = adev->irq.client[client_id].sources[src_id])) {
WARNING: braces {} are not necessary for any arm of this
On Fri, May 5, 2023 at 6:44 PM Mikhail Gavrilov
wrote:
> I need to say that it may not be easy to reproduce this bug.
> For helping reproduce:
> 1. I looped script above:
> $ for i in {1..9}; do sudo curl -s
>
[AMD Official Use Only - General]
Shall we consider creating amdgpu_vcn_ras_late_init as a common helper for
interrupt enablement, like other IP blocks. This also reduces further effort
when RAS feature is introduced in new version of vcn/jpeg
Regards,
Hawking
-Original Message-
From:
[Public]
Hi Lyude and Jani,
Could you help to review please? Thanks for your time!
Regards,
Wayne Lin
> -Original Message-
> From: Wayne Lin
> Sent: Thursday, April 27, 2023 3:29 PM
> To: dri-de...@lists.freedesktop.org; amd-gfx@lists.freedesktop.org
> Cc: ly...@redhat.com;
Applied. Thanks!
On Sat, May 6, 2023 at 4:11 AM Jiapeng Chong
wrote:
>
> Variable golden_settings_gc_9_4_3 is not effectively used, so delete it.
>
> drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c:48:38: warning:
> ‘golden_settings_gc_9_4_3’ defined but not used.
>
> Reported-by: Abaci Robot
> Link:
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 52025ebbb518a2d876b8aba191b348ffb1cf368b Add linux-next specific
files for 20230508
Warning reports:
https://lore.kernel.org/oe-kbuild-all/202304230014.ybscpx20-...@intel.com
Warning
Adhere to Linux kernel coding style.
Reported by checkpatch:
WARNING: else is not generally useful after a break or return
Cc: Christian König
Cc: Alex Deucher
Signed-off-by: Srinivasan Shanmugam
---
drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c | 26 ++--
1 file changed, 13
Nice patch!
I have tested this patch on ls3a5000+ls7a2000+AMDGPU RX550, but it seems
that dc_fpu_begin() and
dc_fpu_end() will not be called on AMDGPU RX550. But it at least proved that
this patch does not introduce bugs to what already works.
I can proved that after apply this patch,
On Mon, May 8, 2023 at 11:29 AM Srinivasan Shanmugam
wrote:
>
> Adhere to Linux kernel coding style.
>
> Reported by checkpatch:
>
> WARNING: else is not generally useful after a break or return
>
What about the else in the previous case statement?
Alex
> Cc: Christian König
> Cc: Alex
I have tested glmark2 on ls3a5000 with this patch applied,
I have also bought a better gpu (vega 56), which is on the way.
currently only have a rx550 at hand.
I pasted the performance score here, how about this score?
Does this looks normal?
glmark2
Prevent further casting on chip MULLINS/KABINI/KAVERI when calling
amdgpu_dpm_is_overdrive_supported, this can avoid UBSAN complain
in init sequence.
Suggested-by: Evan Quan
Signed-off-by: Guchun Chen
---
drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 10 --
1 file changed, 8 insertions(+), 2
On 4/23/23 10:10, Melissa Wen wrote:
> From amdgpu_dm_plane we can get it for both CRTC and plane color
> properties. We are adding new plane properties for AMD driver-private
> color mgmt.
>
> Signed-off-by: Melissa Wen
> ---
> .../amd/display/amdgpu_dm/amdgpu_dm_crtc.c| 37
On 4/23/23 10:10, Melissa Wen wrote:
> We are enabling a large set of color calibration features to enhance KMS
> color mgmt but these properties are specific of AMD display HW, and
> cannot be provided by other vendors. Therefore, set a config option to
> enable AMD driver-private properties used
On 4/23/23 10:10, Melissa Wen wrote:
> Hi all,
>
> Joshua Ashton and I (with the great collaboration of Harry Wentland -
> thanks) have been working on KMS color pipeline enhancement for Steam
> Deck/SteamOS by exposing the large set of color caps available in AMD
> display HW.
>
Thank you
On 4/23/23 10:10, Melissa Wen wrote:
> CRTC shaper LUT shapes the content after blending, i.e., de-linearizes
> or normalizes space before applying a 3D LUT color correction. In the
> next patch, we add CRTC 3D LUT property to DRM color management after
> this shaper LUT and before the current
On 4/23/23 10:10, Melissa Wen wrote:
> From: Joshua Ashton
>
> Add predefined transfer function property to DRM CRTC gamma to convert
> to wire encoding with or without gamma LUT.
>
Are all these new CRTC properties used by gamescope? I would be reluctant
to merge them if they're currently
[AMD Official Use Only - General]
Hi Tao,
Sorry, I forgot to check, thank you for your suggestion. I will update this
modification in the next version.
Thanks,
Horatio
-Original Message-
From: Zhou1, Tao
Sent: Monday, May 8, 2023 7:05 PM
To: Zhang, Horatio ;
> -Original Message-
> From: Lazar, Lijo
> Sent: Tuesday, May 9, 2023 11:47 AM
> To: Chen, Guchun ; amd-
> g...@lists.freedesktop.org; Deucher, Alexander
> ; Zhang, Hawking
> ; Quan, Evan
> Subject: Re: [PATCH] drm/amd/pm: avoid potential UBSAN issue on legacy
> asics
>
>
>
> On
[AMD Official Use Only - General]
-Original Message-
From: Alex Deucher
Sent: Monday, May 8, 2023 9:27 PM
To: SHANMUGAM, SRINIVASAN
Cc: Koenig, Christian ; Deucher, Alexander
; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amd/amdgpu: Remove redundant else branch in
Prevent further dpm casting on legacy asics without od_enabled in
amdgpu_dpm_is_overdrive_supported. This can avoid UBSAN complain
in init sequence.
v2: add a macro to check legacy dpm instead of checking asic family/type
Suggested-by: Evan Quan
Signed-off-by: Guchun Chen
---
[AMD Official Use Only - General]
Acked-by: Evan Quan
> -Original Message-
> From: Chen, Guchun
> Sent: Tuesday, May 9, 2023 9:43 AM
> To: amd-gfx@lists.freedesktop.org; Deucher, Alexander
> ; Zhang, Hawking
> ; Lazar, Lijo ; Quan, Evan
>
> Cc: Chen, Guchun
> Subject: [PATCH]
On 5/9/2023 7:12 AM, Guchun Chen wrote:
Prevent further casting on chip MULLINS/KABINI/KAVERI when calling
amdgpu_dpm_is_overdrive_supported, this can avoid UBSAN complain
in init sequence.
Suggested-by: Evan Quan
Signed-off-by: Guchun Chen
---
drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 10
On 4/23/23 10:10, Melissa Wen wrote:
> From: Joshua Ashton
>
> Multiplier to 'gain' the plane. When PQ is decoded using the fixed func
> transfer function to the internal FP16 fb, 1.0 -> 80 nits (on AMD at
> least) When sRGB is decoded, 1.0 -> 1.0. Therefore, 1.0 multiplier = 80
> nits for
gfx9 cp_ecc_error_irq is only enabled when legacy gfx ras is assert.
So in gfx_v9_0_hw_fini, interrupt disablement for cp_ecc_error_irq
should be executed under such condition, otherwise, an amdgpu_irq_put
calltrace will occur.
[ 7283.170322] RIP: 0010:amdgpu_irq_put+0x45/0x70 [amdgpu]
[
sdma_v4_0_ip is shared on a few asics, but in sdma_v4_0_hw_fini,
driver unconditionally disables ecc_irq which is only enabled on
those asics enabling sdma ecc. This will introduce a warning in
suspend cycle on those chips with sdma ip v4.0, while without
sdma ecc. So this patch correct this.
[
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