Since the smu firmware has fixed the issue that described in the commit
"60d61f4ed6ead".
So we only need keep dpm status check in the funciton -
smu_v13_0_5_set_soft_freq_limited_range.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c | 2 +-
1 file changed,
This was fixed here:
commit 03877d621db082610c9b7602c6e8cd6ebcb75a8f
Author: Christian König
Date: Thu Apr 27 14:05:43 2023 +0200
drm/scheduler: mark jobs without fence as canceled
When no hw fence is provided for a job that means that the job
didn't executed.
Signed-off-by:
[AMD Official Use Only - General]
This patch is
Reviewed-by: Yifan Zhang
-Original Message-
From: Jesse Zhang
Sent: Wednesday, August 23, 2023 3:16 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Zhang, Yifan
; Zhang, Jesse(Jie)
Subject: [PATCH] drm/amdgpu/pm: Remove
Greg KH writes:
> On Mon, Aug 21, 2023 at 10:13:45PM -0500, Limonciello, Mario wrote:
>> So I wonder if the right answer is to put it in drivers/net/wireless
>> initially and if we come up with a need later for non wifi producers we can
>> discuss moving it at that time.
>
> Please do so.
[AMD Official Use Only - General]
Ping..
Actually, I prepare a patch aiming to fix this issue.
But I'm not sure whether this is proper for drm/scheduler.
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index 9654e8942382..35dc0b86a18e 100644
---
[AMD Official Use Only - General]
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: dri-devel On Behalf Of Colin
Ian King
Sent: Wednesday, August 23, 2023 5:03 PM
To: Deucher, Alexander ; Koenig, Christian
; Pan, Xinhui ; David Airlie
; Daniel Vetter ; Lazar, Lijo
On 22/08/23 22:52, Christian König wrote:
Am 21.08.23 um 13:16 schrieb Christian König:
Am 21.08.23 um 12:14 schrieb Arunpravin Paneer Selvam:
The way now contiguous requests are implemented such that
the size rounded up to power of 2 and the corresponding order
block picked from the
There will be multiple interfaces(sysfs files) exposed with each representing
a single OD functionality. And all those interface will be arranged in a tree
liked hierarchy with the top dir as "gpu_od". Meanwhile all functionalities
for the same component will be arranged under the same directory.
Add SMU13 fan mode OD setting support.
Signed-off-by: Evan Quan
--
v1->v2:
- add missing kerneldoc for the new interface(Alex)
---
Documentation/gpu/amdgpu/thermal.rst | 6 +
.../gpu/drm/amd/include/kgd_pp_interface.h| 4 +-
drivers/gpu/drm/amd/pm/amdgpu_pm.c| 200
Add SMU13 fan temperature/pwm curve OD setting support.
Signed-off-by: Evan Quan
--
v1->v2:
- add missing kerneldoc for the new interface(Alex)
---
Documentation/gpu/amdgpu/thermal.rst | 6 ++
.../gpu/drm/amd/include/kgd_pp_interface.h| 2 +
drivers/gpu/drm/amd/pm/amdgpu_pm.c
Add SMU13 fan acoustic target OD setting support.
Signed-off-by: Evan Quan
--
v1->v2:
- add missing kerneldoc for the new interface(Alex)
---
Documentation/gpu/amdgpu/thermal.rst | 6 ++
.../gpu/drm/amd/include/kgd_pp_interface.h| 2 +
drivers/gpu/drm/amd/pm/amdgpu_pm.c
By placing the sysfs interfaces creation after `.late_int`. Since some
operations performed during `.late_init` may affect how the sysfs
interfaces should be created.
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 37 --
1 file changed, 21
Add SMU13 fan acoustic limit OD setting support.
Signed-off-by: Evan Quan
--
v1->v2:
- add missing kerneldoc for the new interface(Alex)
---
Documentation/gpu/amdgpu/thermal.rst | 6 ++
.../gpu/drm/amd/include/kgd_pp_interface.h| 2 +
drivers/gpu/drm/amd/pm/amdgpu_pm.c
Add SMU13 fan minimum pwm OD setting support.
Signed-off-by: Evan Quan
--
v1->v2:
- add missing kerneldoc for the new interface(Alex)
---
Documentation/gpu/amdgpu/thermal.rst | 6 ++
.../gpu/drm/amd/include/kgd_pp_interface.h| 2 +
drivers/gpu/drm/amd/pm/amdgpu_pm.c
Add SMU13 fan target temperature OD setting support.
Signed-off-by: Evan Quan
--
v1->v2:
- add missing kerneldoc for the new interface(Alex)
---
Documentation/gpu/amdgpu/thermal.rst | 6 ++
.../gpu/drm/amd/include/kgd_pp_interface.h| 2 +
drivers/gpu/drm/amd/pm/amdgpu_pm.c
There is a spelling mistake in variable throtting_events, rename
it to throttling_events.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c| 6 +++---
drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 6 +++---
On Wed, Aug 23, 2023 at 10:53:43AM +0300, Kalle Valo wrote:
> Greg KH writes:
>
> > On Mon, Aug 21, 2023 at 10:13:45PM -0500, Limonciello, Mario wrote:
> >> So I wonder if the right answer is to put it in drivers/net/wireless
> >> initially and if we come up with a need later for non wifi
On Tue, 22 Aug 2023, Alex Hung wrote:
> On 2023-08-22 06:01, Jani Nikula wrote:
>> Over the past years I've been trying to unify the override and firmware
>> EDID handling as well as EDID property updates. It won't work if drivers
>> do their own random things.
> Let's check how to replace these
Recently, and I think especially since 6.5.0-rc5 (but possibly earlier), on
resume from S3 suspend the host sees:
$ uname -r; lspci -nnk -d ::0300
6.5.0-rc7+debian+tj
0a:00.0 VGA compatible controller [0300]: Advanced Micro Devices, Inc.
[AMD/ATI] Cape Verde GL [FirePro W4100] [1002:682c]
On Wed, Aug 23, 2023 at 2:45 AM Evan Quan wrote:
>
> Add SMU13 fan mode OD setting support.
>
> Signed-off-by: Evan Quan
> --
> v1->v2:
> - add missing kerneldoc for the new interface(Alex)
> ---
> Documentation/gpu/amdgpu/thermal.rst | 6 +
>
Are there any restrictions on which fan control options you can
enable? I.e., can you mess with all of these or are there several
discrete fan modes (acoustic, curve, min fan, etc.) that you have to
set up independently? We should document the restrictions.
Alex
On Wed, Aug 23, 2023 at 2:45 AM
[Public]
> -Original Message-
> From: amd-gfx On Behalf Of Tj
> Sent: Wednesday, August 23, 2023 4:54 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: 6.5.0-rc7: RIP: 0010:radeon_gem_va_ioctl+0x3dc/0x4f0 [radeon]
>
> Recently, and I think especially since 6.5.0-rc5 (but possibly
Add support for DCN (Display Core Next) 3.5.
The new register headers were too big for the mailing
list.
Aaron Liu (1):
drm/amdgpu/discovery: enable DCN 3.5.0 support
Qingqing Zhuo (34):
drm/amd/display: Introduce DML2
drm/amd/display: Add dcn35 register header files
drm/amd/display:
From: Qingqing Zhuo
[Why & How]
Add DCN35 family information in DC.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/dc_helper.c | 4
drivers/gpu/drm/amd/display/include/dal_types.h | 2 ++
2 files changed, 6
From: Qingqing Zhuo
[Why & How]
Update DCE files for DCN35 usage.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/dce/dce_abm.h | 9 ++---
.../gpu/drm/amd/display/dc/dce/dce_hwseq.h| 20 +++
From: Qingqing Zhuo
[Why & How]
Update DCN10 files for DCN35 usage.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
.../drm/amd/display/dc/dcn10/dcn10_hubbub.h | 5 +++
.../amd/display/dc/dcn10/dcn10_link_encoder.h | 33 +++
From: Qingqing Zhuo
[Why & How]
Update DCN20 files for DCN35 usage.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h | 64 +++
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c| 8 ++-
From: Qingqing Zhuo
[Why & How]
Update DCN32 files for DCN35 usage.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.h | 1 -
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mmhubbub.h | 4
From: Qingqing Zhuo
[Why & How]
Update DCN30 files for DCN35 usage.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.h | 2 --
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.h | 2 --
2 files changed, 4
From: Qingqing Zhuo
[Why & How]
Update DCN31 files for DCN35 usage.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
.../amd/display/dc/dcn31/dcn31_hpo_dp_link_encoder.h | 10 --
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubp.c | 6
From: Qingqing Zhuo
[Why & How]
Update dc.h for DCN35 usage.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/dc.h | 56 +
1 file changed, 56 insertions(+)
diff --git
From: Qingqing Zhuo
[Why & How]
Update DCN314 files for DCN35 usage.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
.../drm/amd/display/dc/dcn314/dcn314_dccg.c | 2 +-
.../drm/amd/display/dc/dcn314/dcn314_dccg.h | 6 +++
From: Qingqing Zhuo
[Why & How]
Add init files for DCN35.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/dc/dcn35/dcn35_init.c | 167 ++
.../gpu/drm/amd/display/dc/dcn35/dcn35_init.h | 32
2 files changed,
From: Qingqing Zhuo
[Why & How]
Add case for DCN35 in command_table_helper2.c.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Qingqing Zhuo
[Why & How]
Add HWSEQ handling for DCN35.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
.../drm/amd/display/dc/dcn35/dcn35_hwseq.c| 1193 +
.../drm/amd/display/dc/dcn35/dcn35_hwseq.h| 82 ++
From: Qingqing Zhuo
[Why & How]
Add DCCG handling for DCN35.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/dc/dcn35/dcn35_dccg.c | 737 ++
.../gpu/drm/amd/display/dc/dcn35/dcn35_dccg.h | 190 +
2 files
From: Qingqing Zhuo
[Why & How]
Add DWB handling for DCN35.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/dc/dcn35/dcn35_dwb.c | 58 ++
.../gpu/drm/amd/display/dc/dcn35/dcn35_dwb.h | 59 +++
2
From: Qingqing Zhuo
[Why & How]
Add DPP handling for DCN35.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/dc/dcn35/dcn35_dpp.c | 51 +
.../gpu/drm/amd/display/dc/dcn35/dcn35_dpp.h | 55 +++
2
From: Qingqing Zhuo
[Why & How]
Add DCN35 support in GPIO.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/gpio/hw_factory.c | 1 +
drivers/gpu/drm/amd/display/dc/gpio/hw_translate.c | 1 +
2 files changed, 2
From: Qingqing Zhuo
[Why & How]
Add PG_CNTL handling for DCN35.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
.../drm/amd/display/dc/dcn35/dcn35_pg_cntl.c | 553 ++
.../drm/amd/display/dc/dcn35/dcn35_pg_cntl.h | 193 ++
From: Qingqing Zhuo
[Why & How]
Add HUBBUB handling for DCN35.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
.../drm/amd/display/dc/dcn35/dcn35_hubbub.c | 573 ++
.../drm/amd/display/dc/dcn35/dcn35_hubbub.h | 150 +
2 files
From: Qingqing Zhuo
[Why & How]
Add OPP handling for DCN35.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/dc/dcn35/dcn35_opp.c | 51 +++
.../gpu/drm/amd/display/dc/dcn35/dcn35_opp.h | 65 +++
2
From: Qingqing Zhuo
[Why & How]
Add MMHUBBUB handling for DCN35.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
.../drm/amd/display/dc/dcn35/dcn35_mmhubbub.c | 57 +++
.../drm/amd/display/dc/dcn35/dcn35_mmhubbub.h | 73 +++
From: Qingqing Zhuo
[Why & How]
Enable DCN35 in makefile.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/Makefile
From: Qingqing Zhuo
[Why & How]
Add OPTC handling for DCN35.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/dc/dcn35/dcn35_optc.c | 284 ++
.../gpu/drm/amd/display/dc/dcn35/dcn35_optc.h | 219 ++
2
From: Qingqing Zhuo
[Why & How]
Add DIO handling for DCN35.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
.../display/dc/dcn35/dcn35_dio_link_encoder.c | 267 +
.../display/dc/dcn35/dcn35_dio_link_encoder.h | 137 +
From: Qingqing Zhuo
[Why & How]
Add HUBP handling for DCN35.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/dc/dcn35/dcn35_hubp.c | 104 ++
.../gpu/drm/amd/display/dc/dcn35/dcn35_hubp.h | 59 ++
2 files
From: Qingqing Zhuo
[Why & How]
Add DCN35 support in dc_resource.c.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 7 +++
1 file changed, 7 insertions(+)
diff --git
From: Qingqing Zhuo
[Why & How]
Add CLK_MGR handling for DCN35.
v2: Drop stale SMU interfaces (Alex)
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |1 +
.../gpu/drm/amd/display/dc/clk_mgr/Makefile |
From: Qingqing Zhuo
[Why & How]
Add resource handling for DCN35.
v2: drop unused guard
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/dcn35/Makefile | 20 +
.../drm/amd/display/dc/dcn35/dcn35_resource.c | 2085
From: Qingqing Zhuo
[Why & How]
Add DML handling for DCN35.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/dml/Makefile | 3 +
.../drm/amd/display/dc/dml/dcn35/dcn35_fpu.c | 484 ++
From: Qingqing Zhuo
[Why & How]
Add DM handling for DCN35.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 31 +++
.../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c| 1 +
From: Qingqing Zhuo
[Why & How]
Add DMUB handling for DCN35.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 64 +-
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h | 3 +
From: Qingqing Zhuo
[Why & How]
Add DSC handling for DCN35.
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/dc/dcn35/dcn35_dsc.c | 58 +++
.../gpu/drm/amd/display/dc/dcn35/dcn35_dsc.h | 57 ++
2
From: Aaron Liu
Enable DCN 3.5.0 support.
Signed-off-by: Aaron Liu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
From: Qingqing Zhuo
[Why & How]
- Add IRQ handling for DCN35
- Update IRQ files for other DCNs in accordance
to change in irq_service.h
Signed-off-by: Qingqing Zhuo
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/irq/Makefile | 9 +
This DC patch-set brings improvements in multiple areas. In summary, we
highlight:
* DCN315 fixes
* DCN31 fixes
* DPIA fixes
* Dump the pipe topology when it updates
* Misc code cleanups
* New debugfs interface to query the current ODM combine configuration
* ODM fixes
* Potential deadlock while
From: Wenjing Liu
This partially reverts commit e170066a4719 ("drm/amd/display: update add
plane to context logic with a new algorithm").
The new secondary pipe allocation logic triggers an issue with a
specific hardware state transition and causes a frame of corruption when
toggling between
From: Ethan Bitnun
- Override the det to adjust microschedule timings allow for
1080p configs with SubVP
- To lower unnecessary risk, we prevent multi 1080p configs
from using SubVP, as multi 1080p already has low idle power.
- Count the number of streams to verify that we are in a
SubVP
From: Fudong Wang
A benchmark stress test (12-40 machines x 48hours) found that DCN315 has
cases where DC writes to an indirect register to set the smu clock msg
id, but when we go to read the same indirect register the returned msg
id doesn't match with what we just set it to. So, to fix this
From: Wenjing Liu
When we are dynamically adding new ODM slices, we didn't update
blank state, if the pipe used by new ODM slice is previously blanked,
we will continue outputting blank pixel data on that slice causing
right half of the screen showing blank image.
The previous fix was a
From: Mustapha Ghaddar
For DPIA we should have preferred DIG assignment based on DPIA selected
as per the ASIC design.
Reviewed-by: George Shen
Acked-by: Hamza Mahfooz
Signed-off-by: Mustapha Ghaddar
---
.../drm/amd/display/dc/core/dc_link_enc_cfg.c | 35 +++
From: Wenjing Liu
[why]
We need a new algorithm for acquiring secondary opp heads for ODM combine
in dcn32 and a release pipe interface to properly release pipe resources.
[how]
add two new interfaces in DCN specific resource file.
Reviewed-by: Jun Lei
Acked-by: Hamza Mahfooz
Signed-off-by:
From: Wenjing Liu
We are renaming acquire first free pipe to add
otg master pipe for stream because the former name
doesn't indicate that it acquires the first free pipe
to use as an otg master pipe. This could cause coding
errors if someone uses it to acquire a different pipe type.
From: Wenjing Liu
Define two new interfaces to update mpc and odm slice count.
Reviewed-by: Jun Lei
Acked-by: Hamza Mahfooz
Signed-off-by: Wenjing Liu
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 369 +-
drivers/gpu/drm/amd/display/dc/inc/resource.h | 69 +++-
2
From: Wenjing Liu
ODM power optimization is only supported with single stream. When ODM
power optimization is enabled, we might not have enough free pipes for
enabling other stream. So when we are committing more than 1 stream we
should first switch off ODM power optimization to make room for
From: Wenjing Liu
Adding detail comments describing the problem we are solving with add
plane function.
Reviewed-by: Jun Lei
Acked-by: Hamza Mahfooz
Signed-off-by: Wenjing Liu
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 91 ++-
1 file changed, 70 insertions(+), 21
From: Wenjing Liu
Redesign pipe resource interfaces in resource.h file. The new interface
design addresses the issue with lack of pipe topology encapsulation and
lack of pipe accessors.
Reviewed-by: Jun Lei
Acked-by: Hamza Mahfooz
Signed-off-by: Wenjing Liu
---
From: Wenjing Liu
This commit implements a new pipe resource allocation logic for DCN32
when windowed ODM MPO flag is set to enable testing. By default the
flag is not set. It will be toggled on after we complete testing.
Reviewed-by: Jun Lei
Acked-by: Hamza Mahfooz
Signed-off-by: Wenjing Liu
From: Wenjing Liu
Given an issue with pipe topology transition. It is very hard to tell
the before and after pipe topology without a pipe topology logging. The
change adds such logging to help with visualizing the issue.
Reviewed-by: Jun Lei
Acked-by: Hamza Mahfooz
Signed-off-by: Wenjing Liu
From: Gabe Teeger
[Why]
We wait for mpc idle while in a locked state, leading to potential
deadlock.
[What]
Move the wait_for_idle call to outside of HW lock. This and a
call to wait_drr_doublebuffer_pending_clear are moved added to a new
static helper function called
From: Aurabindo Pillai
Fix incorrect comment about hardware capabilities debugfs interface.
Reviewed-by: Jerry Zuo
Acked-by: Hamza Mahfooz
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
From: Dillon Varone
[WHY]
Readback is only necessary when loaded via CPU.
Reviewed-by: Chris Park
Acked-by: Hamza Mahfooz
Signed-off-by: Dillon Varone
---
drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 8
drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c | 3 ++-
2 files changed,
From: Wenjing Liu
We need to align windowed MPO ODM support on DCN3x with new ODM policy.
Reviewed-by: Jun Lei
Acked-by: Hamza Mahfooz
Signed-off-by: Wenjing Liu
---
.../drm/amd/display/dc/dcn32/dcn32_resource.c | 84 ++-
1 file changed, 65 insertions(+), 19 deletions(-)
From: Charlene Liu
remove double adjustment for DPREFCLK SS. dprefclk adjusted with SS is
used for dp audio only. if adjust DP_DTO, need to adjust VID_M/N
Reviewed-by: Muhammad Ahmed
Acked-by: Hamza Mahfooz
Signed-off-by: Charlene Liu
---
.../drm/amd/display/dc/dcn31/dcn31_hubbub.c | 32
From: Aurabindo Pillai
[Why]
For use with IGT tests in userspace, the number of ODM segments in use
is required to be exposed to userspace to verify that ODM Combine is
working as expected when special timings are committed.
[How]
Add a connector specific debugfs entry that prints the number of
From: Wenjing Liu
[why]
There is a logging error in the recently added pipe topology log.
If the plane with index 0 uses MPC combine, the log shows that
as two separate planes.
[how]
Initialize plane idx as -1 and increment plane idx before logging
any primary dpp pipes of a plane.
From: Martin Leung
This version brings along the following:
- DCN315 fixes
- DCN31 fixes
- DPIA fixes
- Dump the pipe topology when it updates
- Misc code cleanups
- New debugfs interface to query the current ODM combine configuration
- ODM fixes
- Potential deadlock while waiting for MPC idle
On Fri, Aug 18, 2023 at 05:06:42PM -0300, André Almeida wrote:
> Create a section that specifies how to deal with DRM device resets for
> kernel and userspace drivers.
>
> Signed-off-by: André Almeida
>
> ---
>
> v7 changes:
> - s/application/graphical API contex/ in the robustness part
On Tue, Aug 22, 2023 at 03:41:17PM +, Deucher, Alexander wrote:
[Public]
-Original Message-
From: Sasha Levin
Sent: Tuesday, August 22, 2023 7:36 AM
To: linux-ker...@vger.kernel.org; sta...@vger.kernel.org
Cc: Deucher, Alexander ; Kuehling, Felix
; Koenig, Christian ;
Mike Lothian
Hi Rodrigo,
Em 23/08/2023 14:31, Rodrigo Vivi escreveu:
On Fri, Aug 18, 2023 at 05:06:42PM -0300, André Almeida wrote:
Create a section that specifies how to deal with DRM device resets for
kernel and userspace drivers.
Signed-off-by: André Almeida
---
v7 changes:
-
On 2023-08-22 11:41, Deucher, Alexander wrote:
[Public]
-Original Message-
From: Sasha Levin
Sent: Tuesday, August 22, 2023 7:37 AM
To: linux-ker...@vger.kernel.org; sta...@vger.kernel.org
Cc: Deucher, Alexander ; Kuehling, Felix
; Koenig, Christian ;
Mike Lothian ; Sasha Levin ; Pan,
@Mahfooz, Hamza
can you respin with the NULL check?
Alex
On Wed, Aug 16, 2023 at 10:25 AM Christian König
wrote:
>
> Am 16.08.23 um 15:41 schrieb Hamza Mahfooz:
> >
> > On 8/16/23 01:55, Christian König wrote:
> >>
> >>
> >> Am 15.08.23 um 19:26 schrieb Hamza Mahfooz:
> >>> fbcon requires that
Sure - you're also welcome to push the first two patches after fixing the
indentation if you'd like
On Wed, 2023-08-23 at 03:19 +, Lin, Wayne wrote:
> [Public]
>
> Thanks, Lyude!
> Should I push another version to fix the indention?
>
> > -Original Message-
> > From: Lyude Paul
> >
On 8/23/23 16:51, Alex Deucher wrote:
@Mahfooz, Hamza
can you respin with the NULL check?
sure.
Alex
On Wed, Aug 16, 2023 at 10:25 AM Christian König
wrote:
Am 16.08.23 um 15:41 schrieb Hamza Mahfooz:
On 8/16/23 01:55, Christian König wrote:
Am 15.08.23 um 19:26 schrieb Hamza
On 8/23/2023 16:44, Hamza Mahfooz wrote:
fbcon requires that we implement _framebuffer_funcs.dirty.
Otherwise, the framebuffer might take a while to flush (which would
manifest as noticeable lag). However, we can't enable this callback for
non-fbcon cases since it may cause too many atomic
fbcon requires that we implement _framebuffer_funcs.dirty.
Otherwise, the framebuffer might take a while to flush (which would
manifest as noticeable lag). However, we can't enable this callback for
non-fbcon cases since it may cause too many atomic commits to be made at
once. So, implement
Disable gfx ras command is needed in some use cases
like live migration.
Signed-off-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
[AMD Official Use Only - General]
Reviewed-by: Tao Zhou
> -Original Message-
> From: amd-gfx On Behalf Of Hawking
> Zhang
> Sent: Thursday, August 24, 2023 9:49 AM
> To: amd-gfx@lists.freedesktop.org; Yang, Stanley ;
> Zhou1, Tao
> Cc: Zhang, Hawking
> Subject: [PATCH] drm/amdgpu:
[AMD Official Use Only - General]
> -Original Message-
> From: Alex Deucher
> Sent: Wednesday, August 23, 2023 9:29 PM
> To: Quan, Evan
> Cc: amd-gfx@lists.freedesktop.org; Deucher, Alexander
>
> Subject: Re: [V2 3/8] drm/amd/pm: add fan mode OD setting support for
> SMU13
>
> On Wed,
On 8/23/23 17:47, Mario Limonciello wrote:
On 8/23/2023 16:44, Hamza Mahfooz wrote:
fbcon requires that we implement _framebuffer_funcs.dirty.
Otherwise, the framebuffer might take a while to flush (which would
manifest as noticeable lag). However, we can't enable this callback for
non-fbcon
[Public]
Hi Lyude,
I'm afraid that I don't have the permissions to push and would like to have
your help. Thanks!
> -Original Message-
> From: Lyude Paul
> Sent: Thursday, August 24, 2023 5:00 AM
> To: Lin, Wayne ; dri-de...@lists.freedesktop.org;
> amd-gfx@lists.freedesktop.org
> Cc:
[Why]
There is no need to consider payload->delete case since we won't call
drm_dp_add_payload_part2() to create a payload when we're about to
remove it.
[How]
Delete unnecessary case to simplify the code.
Signed-off-by: Wayne Lin
Reviewed-by: Lyude Paul
---
[Why]
Today, the allocation/deallocation steps and status is a bit unclear.
For instance, payload->vc_start_slot = -1 stands for "the failure of
updating DPCD payload ID table" and can also represent as "payload is not
allocated yet". These two cases should be handled differently and hence
better
[Why]
Now in drm_dp_remove_payload_part2(), it utilizes the time slot number
of the payload in old state to represent the one in the payload table
at the moment.
It would be better to clarify the idea by using the latest allocated
time slot number for the port at the moment instead and which info
This patch set is mainly trying to organize the mst code today a bit.
Like to clarify and organize the sequence of mst payload allocation and
removement.And also clean up some redundant codes today.
The main refactor one is the patch
"drm/mst: Refactor the flow for payload allocation/removement"
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