On Wed, Feb 21, 2018 at 10:14 AM, Christian König <
ckoenig.leichtzumer...@gmail.com> wrote:
> Am 21.02.2018 um 10:06 schrieb Michel Dänzer:
>
>> On 2018-02-21 09:49 AM, Bas Vermeulen wrote:
>>
>>> Hi,
>>>
>>> I am unsure if this is the right
On Wed, Feb 21, 2018 at 10:06 AM, Michel Dänzer <mic...@daenzer.net> wrote:
> On 2018-02-21 09:49 AM, Bas Vermeulen wrote:
> > Hi,
> >
> > I am unsure if this is the right place to ask, but it seems relevant.
> >
> > I am trying to use an AMD E8860 (
to correctly initialize the E8860
board on my powerpc machine?
Is there some documentation you can point me to, or someone to ask?
Bas Vermeulen
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On Wed, Feb 21, 2018 at 10:31 AM, Christian König <christian.koe...@amd.com>
wrote:
> Am 21.02.2018 um 10:23 schrieb Bas Vermeulen:
>
> On Wed, Feb 21, 2018 at 10:14 AM, Christian König <
> ckoenig.leichtzumer...@gmail.com> wrote:
>
>> Am 21.02.2018 um 10:06 schr
On Wed, Feb 21, 2018 at 10:36 AM, Michel Dänzer <mic...@daenzer.net> wrote:
> On 2018-02-21 09:49 AM, Bas Vermeulen wrote:
> > Hi,
> >
> > I am unsure if this is the right place to ask, but it seems relevant.
> >
> > I am trying to use an AMD E8860 (
On Wed, Feb 21, 2018 at 10:31 AM, Michel Dänzer <mic...@daenzer.net> wrote:
> On 2018-02-21 10:18 AM, Bas Vermeulen wrote:
> > On Wed, Feb 21, 2018 at 10:06 AM, Michel Dänzer <mic...@daenzer.net
> > <mailto:mic...@daenzer.net>> wrote:
> >
> &g
VCE resume (-22) seems to be caused by
if (rdev->vce.vcpu_bo == NULL)
return -EINVAL;
in radeon_vce.c line 226. Any idea where to look from there?
Bas Vermeulen
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ht
0002:01:00.0: fence driver on ring 2 use gpu addr
0x8c08 and cpu addr 0xc0007c0c8c08
[ 11.031152] radeon 0002:01:00.0: fence driver on ring 3 use gpu addr
0x8c0c and cpu addr 0xc0007c0c8c0c
[ 11.040644] radeon 0002:01:00.0: fence driver on ring 4 use gpu addr
0x000
patches to get this fixed.
Bas Vermeulen
On Thu, Feb 22, 2018 at 9:51 AM, Christian König <christian.koe...@amd.com>
wrote:
> Am 22.02.2018 um 09:37 schrieb Bas Vermeulen:
>
> On Wed, Feb 21, 2018 at 6:22 PM, Alex Deucher <alexdeuc...@gmail.com>
> wrote:
>
>>
like to get this
working correctly completely.
Bas Vermeulen
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I've since replaced the LS1012ARDB with a LS1046ARDB, and this works out of
the box.
The LS1012ARDB does not have an SMMU, which handles hardware coherency on
ARM.
So amdgpu won't work on any ARM without an SMMU.
Bas Vermeulen
On Thu, Jan 10, 2019 at 2:38 PM Koenig, Christian
wrote:
>
(the scratch register check fails).
The E9260 is connected to a PCIe x1 (Gen2) slot.
Anyone have an idea on where to look or how to fix this? This is a test-bed
before we get an LS1046ARDB with quad core A72's.
Any help would be appreciated,
Bas Vermeulen
Hi Alex,
I already have a similar patch in, that doesn't fix it just yet. I'll
investigate some more.
Bas Vermeulen
On Thu, Dec 20, 2018 at 4:27 PM Alex Deucher wrote:
> On Thu, Dec 20, 2018 at 9:06 AM Bas Vermeulen wrote:
> >
> > Hi all,
> >
> > I have connected
cy-fundamentals
with this explanation.
Regards,
Bas Vermeulen
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[7.599867] [TTM] Finalizing DMA pool allocator
[7.605265] [TTM] Zone kernel: Used memory at exit: 0 kiB
[7.611482] [drm] amdgpu: ttm finalized
[7.618028] amdgpu: probe of :01:00.0 failed with error -110
Bas Vermeulen
On Thu, Dec 20, 2018 at 5:11 PM Bas Vermeulen wrote:
> Hi A
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