This patch will work as workaround for silicon limitation
related to PWM dutycycle when the backlight level goes to 0.
Actually PWM value is 16 bit value and valid range from 1-65535.
when ever user requested to set this PWM value to 0 which is not
fall in the range, in VBIOS taken care this by
We observe black lines (underflow) on display when playing a
4K video with UVD. On Disabling Low memory P state this issue is
not seen.
In this patch ,disabling low memory P state only when video
size >= 4k.
Multiple runs of power measurement shows no imapct
Signed-off-by: suresh guttula
---
From: "S, Shirish"
This reverts commit dbd8299c32f6f413f6cfe322fe0308f3cfc577e8.
Reason for revert:
This patch sends msg PPSMC_MSG_DisableLowMemoryPstate(0x002e)
in wrong of sequence to SMU which is before PPSMC_MSG_UVDPowerON (0x0008).
This leads to SMU failing to service the request as it is
This callback is used to access hwmgr function named as
cz_nbdpm_pstate_enable_disable.
Signed-off-by: suresh guttula
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c | 1 +
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h| 3 +++
2 files changed, 4 insertions(+)
diff --git
From: "Guttula, Suresh"
This patch will work as workaround for silicon limitation
related to PWM dutycycle when the backlight level goes to 0.
Actually PWM value is 16 bit value and valid range from 1-65535.
when ever user requested to set this PWM value to 0 which is not
fall in
Add hwmgr callback "update_nbdpm_pstate".This will use to access
"cz_nbdpm_pstate_enable_disable" function to enable/disable low
memory pstate.
Signed-off-by: suresh guttula
---
v2: commit message edited to explain more details
drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c | 1 +
We observe black lines (underflow) on display when playing a
4K video with UVD. On Disabling Low memory P state this issue is
not seen.
In this patch ,disabling low memory P state only when video
size >= 4k.
Multiple runs of power measurement shows no imapct
Signed-off-by: suresh guttula
---
v2:
From: "S, Shirish"
This reverts commit dbd8299c32f6f413f6cfe322fe0308f3cfc577e8.
Reason for revert:
This patch sends msg PPSMC_MSG_DisableLowMemoryPstate(0x002e)
in wrong of sequence to SMU which is before PPSMC_MSG_UVDPowerON (0x0008).
This leads to SMU failing to service the request as it is
From: Shirish S
This reverts commit dbd8299c32f6f413f6cfe322fe0308f3cfc577e8.
Reason for revert:
This patch sends msg PPSMC_MSG_DisableLowMemoryPstate(0x002e)
in wrong of sequence to SMU which is before PPSMC_MSG_UVDPowerON (0x0008).
This leads to SMU failing to service the request as it is
We observe black lines (underflow) on display when playing a
4K video with UVD. On Disabling Low memory P state this issue is
not seen.
In this patch,disabling low memory P state only when video
size >= 4k.
Multiple runs of power measurement shows no impact
Signed-off-by: suresh guttula
---
v2:
Add hwmgr callback "update_nbdpm_pstate".This will use to access
"cz_nbdpm_pstate_enable_disable" function to enable/disable low
memory pstate.
Signed-off-by: suresh guttula
---
v2: commit message edited to explain more details
drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c | 1 +
-Original Message-
From: Liu, Leo
Sent: Friday, July 14, 2023 7:08 PM
To: Guttula, Suresh ; Deucher, Alexander
; Koenig, Christian
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/2] drm/amdgpu: allow secure submission on VCN4 ring
On 2023-07-14 05:44, sguttula wrote:
> This pa
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