Fix the issue that SCLK can't be set higher than dpm7 when
OD is enabled in SMU7.
Change-Id: If8249795739e29a063154cffce693b3c77cca151
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers
To apply on Vega12 for more than 8 gfx dpm levels
Change-Id: I0a0e1e044b35d27a28a3145b2de365d3be6132cd
Signed-off-by: Kenneth Feng <kenneth.f...@amd.com>
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/d
To expose the right dpm levels to the sysfs
Change-Id: I4dc2209a6236834df387eb3d198ad77242d4c561
Signed-off-by: Kenneth Feng <kenneth.f...@amd.com>
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/amd/pow
pp_dpm_sclk/pp_dpm_mclk in sysfs implemented to force
gfxclk/uclk dpm level for Vega12
Change-Id: I69816de5da21de4264d3e6b6ead2c8ed3e00d742
Signed-off-by: Kenneth Feng <kenneth.f...@amd.com>
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 42 +-
1 file chang
Change-Id: I6d309f651dff5f657c1aa424efec2048b9b64a0a
Signed-off-by: Kenneth Feng <kenneth.f...@amd.com>
---
drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_i
For the dummy ACG fuses,need to disable ACG, otherwise
corruption will be caused.
Change-Id: I03db372bb6e934e9230f0745aa19c683adfdeccb
Signed-off-by: Kenneth Feng <kenneth.f...@amd.com>
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c | 5 +
drivers/gpu/drm/amd/powerpl
For the dummy ACG fuses,need to disable ACG, otherwise
corruption will be caused.
Change-Id: Ic32b138720cada2de510cbda607c681ad409e748
Signed-off-by: Kenneth Feng <kenneth.f...@amd.com>
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c | 5 +
drivers/gpu/drm/amd/powerpl
port the new atomfirmware.h change in order to
support ACG SS feature and populate the ACG SS
parameters into SMU
Change-Id: I3297b93b166abc6e430d14ccdd362e353771ea36
Signed-off-by: Kenneth Feng <kenneth.f...@amd.com>
---
drivers/gpu/drm/amd/include/atomfirmware.h
Change-Id: Id4bc19b0df93d96f38e5254246a885af8679c034
Signed-off-by: Kenneth Feng <kenneth.f...@amd.com>
---
drivers/gpu/drm/amd/include/atomfirmware.h | 12
drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c | 10 +++---
drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfw
Change-Id: Icd8f1a9bb9ef4bbd439f5eb5febd1d624b06bbd2
Signed-off-by: Kenneth Feng <kenneth.f...@amd.com>
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 27 +-
1 file changed, 21 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay
To apply on Vega12 for more than 8 gfx dpm levels
Change-Id: I0a0e1e044b35d27a28a3145b2de365d3be6132cd
Signed-off-by: Kenneth Feng <kenneth.f...@amd.com>
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/d
gfxclk for OD setting is limited to 1980M for non-acg
ASICs of Vega10
Signed-off-by: Kenneth Feng
---
.../amd/powerplay/hwmgr/vega10_processpptables.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr
Instead of EVV cks-off voltages, avfs cks-off voltages can avoid
the overshoot voltages when switching sclk.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/powerplay/inc/smu7_ppsmc.h | 2 ++
drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c | 6 ++
2 files changed, 8
Due to the register name and setting change of HDP
memory light sleep on Vega20,change accordingly in
the driver.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 42 ++
1 file changed, 34 insertions(+), 8 deletions(-)
diff --git
Due to the register name and setting change of HDP
memory light sleep on Vega20,change accordingly in
the driver.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 39 +++---
1 file changed, 32 insertions(+), 7 deletions(-)
diff --git
acg btc was added to Vega12
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
update soc boot and max level,then uclk isn't stuck
at minimum.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr
This reverts commit ea37fc706e4cde83b39ad2104eec0241e752b8ea.
Since we have another patch to fix the below problem,
we need to revert the 'revert'
https://bugs.freedesktop.org/show_bug.cgi?id=109462
Acked by Alex Deucher
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/powerplay/hwmgr
when we set profile_peak to sysfs:power_dpm_force_performance_level,
we gets the wrong socclk level and mclk level.this patch fix this issue.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
.
no need to do furhter check since the gfx hardware control the frquency once
a pcc signal comes.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
b
provide the interface for DAL to disable uclk switch on navi10.
in this case, the uclk will be fixed to maximum.
this is a workaround when display configuration causes underflow issue.
Signed-off-by: Kenneth Feng
---
.../drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 14
drivers
provide the interface for DAL to disable uclk switch on navi10.
in this case, the uclk will be fixed to maximum.
this is a workaround when display configuration causes underflow issue.
Signed-off-by: Kenneth Feng
---
.../drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 17
On Vega20, tools depends on UVD_STATUS.VCPU_REPORT bit0
to decide if UVD instances are in busy state or idle state.
This workaround fixes the issue that tools always fetch the
UVD instances state as busy state no matter if there is a UVD work.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd
Disable MMHUB PG on navi10 and navi14 according to the
production requirement.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
b/drivers/gpu/drm/amd/powerplay
Disable MMHUB PG for navi10 according to the production requirement.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/nv.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index d4a2012..46f402a 100644
--- a/drivers
change the smu_read_sensor sequence to:
asic specific sensor read -> smu v11 specific sensor read -> smu v11 common
sensor read
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 3 +++
drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 4 ++--
drivers/gpu/d
Disable MMHUB PG for navi10 according to the production requirement.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/nv.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index d4a2012..46f402a 100644
--- a/drivers
enable/disable IH clock gating on soc15 projects.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 3 +-
drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 39 ++
.../amd/include/asic_reg/oss/osssys_4_0_sh_mask.h | 4 +++
3 files
This is to improve the performance in the compute mode
for vega10. For example, the original performance for a rocm
bandwidth test: 2G internal GPU copy, is about 99GB/s.
With the idle power features disabled dynamically, the porformance
is promoted to about 215GB/s.
Signed-off-by: Kenneth Feng
sysfs interface to read pcie speed info on navi1x.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c| 10 +++---
drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 8 +
drivers/gpu/drm/amd/powerplay/navi10_ppt.c| 50 ++-
drivers/gpu/drm
This is to improve the performance in the compute mode
for vega10. For example, the original performance for a rocm
bandwidth test: 2G internal GPU copy, is about 99GB/s.
With the idle power features disabled dynamically, the porformance
is promoted to about 215GB/s.
Signed-off-by: Kenneth Feng
clock, the screen flicks.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index e2a03f4..ee374df 100644
--- a/drivers/gpu/drm
*8,
we will override dpm 1 to pcie gen speed 3, pcie lanes *8.
But the code skips the dpm 0 configuration.
So the real pcie dpm parameters are:
0 -> pcie gen speed:1, pcie lanes: *16
1 -> pcie gen speed:3, pcie lanes: *8
Then the wrong pcie lanes will be toggled.
Signed-off-by: Kenneth Feng
---
drivers
*8,
we will override dpm 1 to pcie gen speed 3, pcie lanes *8.
But the code skips the dpm 0 configuration.
So the real pcie dpm parameters are:
0 -> pcie gen speed:1, pcie lanes: *16
1 -> pcie gen speed:3, pcie lanes: *8
Then the wrong pcie lanes will be toggled.
Signed-off-by: Kenneth Feng
---
drivers
change the sw ctf setting to smu_v11_0_set_thermal_range()
since software_shutdown_temp shares the same definition and
name in all the smu11 project.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git
software ctf implementation on arcturs.
has been verified on the system by setting a fake software ctf
temperature limit like 40 degrees centigrade.
then the interrupt is triggered from ih ring and
the warning can be observed from dmesg.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd
It's not necessary to retrieve the power features status when the
asic is booted up the first time. This patch can have the features
enablement status still checked in suspend/resume case and removed
from the first boot up sequence.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/powerplay
For some products, baco parameter 1 is dummy and this doesn't trigger the baco
entry/exit.
Parameter 0 is valid and these products don't depend on ras for baco sequence.
Signed-off-by: Kenneth Feng
---
.../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c| 24 +--
1 file changed, 17
This has been confirmed that unload message is not needed from SIENNA_CICHLID
in reset.
Otherwise it will cause the fw wrong state after reset and no response for any
messages.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 ++-
1 file changed, 2 insertions(+), 1
Some features are still disabled after runtime pm resume. This can take the
hardware back.
Unlike other projects, this doesn't need pptable retransfer.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff
this 2 patches fix the runtime pm problems on SIENNA_CICHLID.
Kenneth Feng (2):
drm/amd/amdgpu: fix null pointer in runtime pm
drm/amd/pm: fix the crash after runtime pm resume
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++--
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 7 +--
2
fix the null pointer issue when runtime pm is triggered.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
The power/performance control strategy is specific for vcn use case.
Then this can optimize the power/performance when the workload is on vcn.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git
-off-by: Kenneth Feng
---
.../gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 496abc31b07e
fclk value is missing in pp_dpm_fclk. add this to correctly show the current
value.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
b/drivers
if it's fine-grained clock dpm, remove the average clock value and
reflects the real clock.
Signed-off-by: Kenneth Feng
---
.../gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11
Enable DCS
V1: Enable Async DCS.
V2: Add the ppfeaturemask bit to enable from the modprobe parameter.
V3:
1. add the flag to skip APU support.
2. remove the hunk for workload selection since
it doesn't impact the function.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
The power limit and clock ragne are different in AC mode and DC mode.
Firmware does the setting after this feature is enabled.
Applied on mobile skus.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
DCS now,disalbe DCS when the 3D fullscreen or
the VR workload type is chosen.
Verification:
The power is lowerer or the perf/watt is increased in the throttling case.
To be simplified, the entry/exit counter can be observed from the firmware.
Signed-off-by: Kenneth Feng
---
.../gpu/drm/amd/pm
Enable Async DCS
V3:
1. add the flag to skip APU support.
2. remove the hunk for workload selection since
it doesn't impact the function.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 8 ++--
drivers/gpu/drm/amd/include/amd_shared.h
enable ASPM by default
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/nv.c | 2 +-
drivers/gpu/drm/amd/amdgpu/soc15.c | 2 +-
drivers/gpu/drm/amd/amdgpu/vi.c | 2 +-
drivers/gpu/drm/amd/pm/swsmu/smu11
enable cgls to improve the runtime power efficiency.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/nv.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 0142f6760ad2..9c4f232e81c0 100644
--- a/drivers/gpu
DCS now,disalbe DCS when the 3D fullscreen or
the VR workload type is chosen.
Verification:
The power is lowerer or the perf/watt is increased in the throttling case.
To be simplified, the entry/exit counter can be observed from the firmware.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd
Workload number mapped to the correct one.
This issue is only on vega10.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
b/drivers/gpu
Currently the pcie dpm has two problems.
1. Only the high dpm level speed/width can be overrided
if the requested values are out of the pcie capability.
2. The high dpm level is always overrided though sometimes
it's not necesarry.
Signed-off-by: Kenneth Feng
---
.../drm/amd/pm/powerplay/hwmgr
On some Intel platforms, audio noise can be detected due to
high pcie speed switch latency.
This patch leaverages ppfeaturemask to fix to the highest pcie
speed then disable pcie switching.
Signed-off-by: Kenneth Feng
---
.../drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 54
On some Intel platforms, audio noise can be detected due to
high pcie speed switch latency.
This patch leaverages ppfeaturemask to fix to the highest pcie
speed then disable pcie switching.
v2:
coding style fix
Signed-off-by: Kenneth Feng
---
.../drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 54
is disabled in the asic_init after baco exit.
This fix targets to re-enable telemetry then all the power and voltage
info can be fetched correctly, mp1 firmware also depends on this setting
for dpm arbitration.
Signed-off-by: Kenneth Feng
---
.../drm/amd/pm/powerplay/hwmgr/vega20_baco.c| 17
ASPM can be verified funtionally on navi1x.
And can be enabled for the benefit of the power consumption
without the performance hurt.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/nv.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd
enable ASPM on navi1x and vega series
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c | 128 +
drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 125
drivers/gpu/drm/amd/amdgpu/nv.c| 10 +-
drivers/gpu/drm/amd/amdgpu/soc15
add ASPM support on polaris
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/vi.c | 193 +++-
1 file changed, 191 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index ea338de5818a..735ebbd1148f
v1:
Enable LCLK deep sleep and it works if we enable ASPM:
modprobe amdgpu aspm=1
v2:
Add the amdgpu_aspm flag check
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11
Enable LCLK deep sleep and it works if we enable ASPM:
modprobe amdgpu aspm=1
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
b/drivers/gpu/drm
This reverts commit 0979d43259e13846d86ba17e451e17fec185d240.
Revert this because it does not apply to all the cards.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm
change the workload type for some cards as it is needed.
Signed-off-by: Kenneth Feng
---
.../gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
b/drivers/gpu/drm
fix the issue of uploading powerplay table due to the dependancy of rlc.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
b/drivers/gpu/drm/amd/pm/swsmu
In some systems only MACO is supported. This is to fix the prolbem
that runtime pm is enabled but BACO is not supported. MACO will be
handled seperately.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions
fix the high voltage and temperature issue after the driver is unloaded on smu
13.0.0,
smu 13.0.7 and smu 13.0.10
v2 - fix the code format and make sure it is used on the unload case only.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 25
fix the high voltage and temperature issue after the driver is unloaded on smu
13.0.0,
smu 13.0.7 and smu 13.0.10
v2 - fix the code format and make sure it is used on the unload case only.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 36
fix the high voltage and temperature issue after the driver is unloaded on smu
13.0.0,
smu 13.0.7 and smu 13.0.10
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 36 +++
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c| 4 +--
drivers/gpu/drm/amd
avoid to disable gfxhub interrupt when driver is unloaded on gmc 11
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
index
allow the user to force BACO on smu v13.0.0/7
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 2 +-
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 3 ++-
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 3 ++-
3 files changed, 5 insertions
workaround for the wrong ac power detection on smu 13.0.0
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 3 +--
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 1 -
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd
align the cg and pg settings between gc_v11_0 and gc_v11_2
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/soc21.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c
b/drivers/gpu/drm/amd/amdgpu/soc21.c
index 5566ddbfd188
fixed the issue: gpu runs in dc mode but it is expected to be in ac mode.
this causes the lower performance on smu_v13_0
Signed-off-by: Kenneth Feng
---
.../pm/swsmu/inc/pmfw_if/smu_v13_0_7_ppsmc.h | 9 --
drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 1 +
.../gpu/drm/amd/pm/swsmu
support BAMACO reset on smu_v13_0_7, take BAMACO as a subset of BACO
for the low latency, and it only happens on specific platforms.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 1 +
.../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 57 ++-
2
update the driver if header for smu_v13_0_7
Signed-off-by: Kenneth Feng
---
.../inc/pmfw_if/smu13_driver_if_v13_0_7.h | 62 +--
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h | 2 +-
2 files changed, 45 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm
enable gfxoff on smu_v13_0_7
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
index
add interface to deallocate power_context for smu_v13_0_7
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13
enable BACO on smu_v13_0_7
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c| 1 +
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 7 +++
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
b/drivers/gpu/drm
update driver if header for smu_13_0_7
Signed-off-by: Kenneth Feng
---
.../inc/pmfw_if/smu13_driver_if_v13_0_7.h | 24 ---
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h | 2 +-
2 files changed, 17 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc
enable mode1 reset for smu_v13_0_7 since it's missing.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/soc21.c | 1 +
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c
b
enable gfx ulv and gpo on smu_v13_0_7
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
index
For runtime pm case:
1. prompt in dmesg for BAMACO feature test
2. set BACO by defatul and the user can select BAMACO
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 7 ++
drivers/gpu/drm/amd/amdgpu
allow gfxoff on gc_11_0_3
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 1 +
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
enable thermal alart on smu_v13_0_10
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 3d436e7f6e95
update driver-if header for smu_v13_0_10 and merge with smu_v13_0_0
Signed-off-by: Kenneth Feng
---
.../inc/pmfw_if/smu13_driver_if_v13_0_0.h | 87 +++
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h | 3 +-
.../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c| 6 +-
3 files
add ih cg and hdp sd on smu_v13_0_7
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/soc21.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c
b/drivers/gpu/drm/amd/amdgpu/soc21.c
index bbbf760f8ad2..686e17770c63 100644
add mode1 support since it's missing on smu_v13_0_7
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13
skip pptable override for smu_v13_0_7 secure boards only.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
b/drivers/gpu/drm/amd/pm/swsmu
skip ras late init on gc_11_0_3 if it is not supported,
in order to prevent the hardware init exception.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers
enable mode1 reset and prioritize debug port on msu_v13_0_10
as a more reliable message processing
v2 - move mode1 reset callback to smu_v13_0_0_ppt.c
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/soc21.c| 1 +
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 4
skip disabling all smu features on smu_v13_0_10 in suspend
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 4fe75dd2b329
temporary workaround to skip ras error for gc_v11_0_3 until IFWI release later
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gpu/drm/amd/amdgpu
enable athub cg on gc 11.0.3
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/soc21.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c
b/drivers/gpu/drm/amd/amdgpu/soc21.c
index 2ea0b9142868..0615fdbf0a64 100644
--- a/drivers
implement mode2 reset on smu_v13_0_10
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c | 7 +
drivers/gpu/drm/amd/amdgpu/smu_v13_0_10.c | 303 ++
drivers/gpu/drm/amd/amdgpu/smu_v13_0_10.h
re-enable ac/dc on smu_v13_0_0/10
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index
update smu-driver if header for smu 13.0.0 and smu 13.0.10
Signed-off-by: Kenneth Feng
Change-Id: I540aaa99fac2216f2d1a28fd79c68dd77a495f8b
---
.../inc/pmfw_if/smu13_driver_if_v13_0_0.h | 33 ++-
1 file changed, 25 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm
On smu 13.0.0, the compute workload type cannot be set on all the skus
due to some other problems. This workaround is to make sure compute workload
type
can also run on some specific skus.
Signed-off-by: Kenneth Feng
---
.../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 26 +++
1
On smu 13.0.0, the compute workload type cannot be set on all the skus
due to some other problems. This workaround is to make sure compute workload
type
can also run on some specific skus.
v2: keep the variable consistent
Signed-off-by: Kenneth Feng
---
.../drm/amd/pm/swsmu/smu13
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