[PATCH 20/20] drm/amdgpu:fix kiq_resume routine

: I41be940454a6638e9a8a05f096601eaa1fbebaab Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 44 ++- 1 file changed, 33 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index 0ce00ff..4

[PATCH 18/20] drm/amdgpu:alloc mqd backup

Change-Id: I84f821faa657a5d942c33d30f206eb66b579c2f8 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 10 ++ 2 files changed, 11 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/d

[PATCH 16/20] drm/amdgpu:RUNTIME flag should clr later

this flag will get cleared by request gpu access Change-Id: Ie484bb0141420055370e019dcd8c110fb34f8a1b Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/

[PATCH 19/20] drm/amdgpu:use nop to clear ring buffer

this is for a fine GPU reset/resume, which should use nop clear ringbuffer prior to kickoff engine. and also use the same clear macro in ring_init. Change-Id: I7693891fd4431d64c025d052f1dd0ba797f2f0b7 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ring

[PATCH 12/20] drm/amdgpu:impl mm_r/weg_nokiq

some registers are pf copy, and we can safely use mmio method to access them. and some time we are forbid to use kiq to access register like in INTR context. Change-Id: Ie6dc323dc86829a4a6ceb7073c269b106b534c4a Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/am

[PATCH 17/20] drm/amdgpu:new field is_load_stage introduced

use it to seperate first driver load and later reset/resume Change-Id: I991e0da52ccd197716d279bf9014de46d39acfea Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++ 2 files changed, 3 inse

[PATCH 14/20] drm/amdgpu:use nokiq version mm access

Change-Id: I383d7ce858a136d7b112180f86e3d632d37b4d1c Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c | 32 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c b/drivers/g

[PATCH 11/20] drm/amdgpu:add lock_reset for SRIOV

need take care and we need a mutex to protect the consistency of reset routine. Change-Id: I37aabccfaef1cde32dc350062a519d32c9d51c02 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 1 + 2 files chan

[PATCH 08/20] drm/amdgpu:divide KCQ mqd init to sw and hw

-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 107 +- 1 file changed, 42 insertions(+), 65 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index 4029d32..6734e55 100644 --- a/d

[PATCH 09/20] drm/amdgpu:implement SRIOV gpu_reset

Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 158 - drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 1 + 2 files changed, 158 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/d

[PATCH 01/20] drm/amdgpu:fix powerplay logic

1,like pp_hw_init, we shouldn't report error if PP disabled 2,disable pp_en if sriov Change-Id: I6d259f9609f223998bea236f64676b9c22133e4e Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 2 +- drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 2

[PATCH 05/20] drm/amdgpu:bo_free_kernel will set ptr to NULL if freed

Change-Id: Iac592f1a6c927677008feabc1b7af6f18c580910 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index 0e2c906..df1cfc5

[PATCH 04/20] drm/amdgpu:imple mqd soft ini/fini

Change-Id: I650a78c8d27f76997e1ef6e3934d0d7e043d4715 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 52 +++ 1 file changed, 52 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/

[PATCH 02/20] drm/amdgpu:cg & pg are not applied on VF

Change-Id: I93a4e97f1d24a289ab20c2a62371f3e303322587 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 9 + drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 6 ++ drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 6 ++ drivers/gpu/drm/amd/amdgp

[PATCH 06/20] drm/amdgpu:no need use sriov judge

Change-Id: I9717e200be8af36f52d6305e02ffea178044c851 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 13 - 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gf

[PATCH 13/20] Refine handshake between guest and host by mailbox

From: Ken Xue Change-Id: If3a7d05824847234759b86563e8052949e171972 Signed-off-by: Ken Xue --- drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c | 26 +- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git

[PATCH 10/20] drm/amdgpu:change kiq lock name

Change-Id: Ib11de11fb0a9e8086e542b932c9c62d5aa40ebb2 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 10 +- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 2 +- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/

[PATCH 07/20] drm/amdgpu:minor cleanup

Change-Id: Ia5ada3e9990261ca70b03655424e6290701cdb9d Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

[PATCH 2/2] drm/amdgpu:cleanup

1)remove braces not needed 2)don't return failure on debugfs_firmware_init failed Change-Id: I90ec3197184d0fdda54575bfbad7b705aa178698 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 10 +++--- 1 file changed, 3 insertions(+), 7 deletions(-)

[PATCH 1/2] drm/amdgpu:fix amdgpu_sa_bo_new error(v2)

ib_pool init should prior to fbdev_init, otherwise there will be error from amdgpu_sa_bo_new (amdgpu_sa.c:323) fbdev_init will call ttm_validate which further call amdgpu_sa_bo_new. v2: move fbdev_init behind ib test. Change-Id: I3a969570d443f61a44f67b0d76b3871ca5c3ea81 Signed-off-by: Monk Liu

[PATCH] drm/amdgpu:use hw_init for sriov_gpu_reset

no suspend invoked so after VF FLR by host, we just call hw_init to reinitialize IPs. Change-Id: If09cb42b09bee6acc84e6b239ef537ad5a3df41c Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 ++-- 1 file changed, 6 insertions(+), 6 del

[PATCH] drm/amdgpu:remove unused macro

Change-Id: I37901358f0dc3e24c0b05df5d2231947cc717c93 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 73086d0..be9e27d

[PATCH 11/11] drm/amdgpu:fix kiq_resume routine (V2)

: I41be940454a6638e9a8a05f096601eaa1fbebaab Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++ drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 44 ++ 2 files changed, 35 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/d

[PATCH 08/11] drm/amdgpu:alloc mqd backup

this is required for restoring the mqds after GPU reset. Change-Id: I84f821faa657a5d942c33d30f206eb66b579c2f8 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 10 ++ 2 files changed, 11 inse

[PATCH 10/11] drm/amdgpu:use clear_ring to clr RB

In resume routine, we need clr RB prior to the ring test of engine, otherwise some engine hang duplicated during GPU reset. Change-Id: Ie28f5aa677074f922e4a1a2eeeb7fe06461d9bdb Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 2 +- drivers/gpu/d

[PATCH 04/11] drm/amdgpu:no kiq for mailbox registers access

Use no kiq version reg access due to: 1) better performance 2) INTR context consideration (some routine in mailbox is in INTR context e.g.xgpu_vi_mailbox_rcv_irq) Change-Id: I383d7ce858a136d7b112180f86e3d632d37b4d1c Signed-off-by: Monk Liu <monk@amd.com> Reviewed-by: Alex D

[PATCH 07/11] drm/amdgpu:new field in_resete introduced for gfx

use it to seperate driver load and gpu reset/resume because gfx IP need different approach for different hw_init trigger source Change-Id: I991e0da52ccd197716d279bf9014de46d39acfea Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + 1 file chan

[PATCH 02/11] drm/amdgpu:impl RREG32 no kiq version

-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 21 ++--- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 ++-- 2 files changed, 20 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/

[PATCH 06/11] drm/amdgpu:RUNTIME flag should clr later

this flag will get cleared by request gpu access Change-Id: Ie484bb0141420055370e019dcd8c110fb34f8a1b Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/mxgp

[PATCH 09/11] drm/amdgpu:imple ring clear

we can use it clear ring buffer instead of fullfill 0, which is not correct for engine Change-Id: I89dcd7b6c4de558f9b2860209a2739c7d4af262d Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/d

[PATCH 03/11] drm/amdgpu:Refine handshake of mailbox

From: Ken Xue Change-Id: If3a7d05824847234759b86563e8052949e171972 Signed-off-by: Ken Xue Acked-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c | 24 +++- 1 file changed, 23 insertions(+), 1

[PATCH 01/11] drm/amdgpu:use MACRO like other places

Change-Id: Ica8f86577a50d817119de4b4fb95068dc72652a9 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_

[PATCH 05/11] drm/amdgpu:use work instead of delay-work

no need to use a delay work since we don't know how much time hypervisor takes on FLR, so just polling and waiting in a work. Change-Id: I41b6336baa00b1fd299311349402a17951b585a2 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 2 +- drivers/gpu/d

[PATCH] drm/amdgpu:fix amdgpu_sa_bo_new error

ib_pool init should prior to fbdev_init, otherwise there will be error from amdgpu_sa_bo_new (amdgpu_sa.c:323) fbdev_init will call ttm_validate which further call amdgpu_sa_bo_new. Change-Id: I3a969570d443f61a44f67b0d76b3871ca5c3ea81 Signed-off-by: Monk Liu <monk@amd.com> --- drive

[PATCH 05/21] drm/amdgpu:BUG if gpu_reste and asic_reset from VF

by invoker. Change-Id: I678d3f2ce202458c1d1d404970fa47421766b666 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 9 + drivers/gpu/drm/amd/amdgpu/vi.c| 2 ++ 2 files changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/d

[PATCH 07/21] drm/amdgpu:fix gart table vram pin

if this call is from resume, shouldn't enter pin logic at all Change-Id: I40a5cdc2a716c4c20d2812fd74ece4ea284b6765 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/amd/

[PATCH 06/21] drm/amdgpu:cg & pg are not applied on VF

Change-Id: I93a4e97f1d24a289ab20c2a62371f3e303322587 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 9 + drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 6 ++ drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 6 ++ drivers/gpu/drm/amd/amdgp

[PATCH 01/21] drm/amdgpu:fix typo

Change-Id: I68729b1d32d5e300b8f03a923d2065d51dbe6f7a Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/

[PATCH 04/21] drm/amdgpu:fix powerplay logic

1,like pp_hw_init, we shouldn't report error if PP disabled 2,disable pp_en if sriov Change-Id: I6d259f9609f223998bea236f64676b9c22133e4e Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 2 +- drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 2

[PATCH 02/21] drm/amdgpu:fix golden init for sriov

although only vi supports SRIOV now,but we shouldn't make code has such assumption. Change-Id: Ie73c185dc2e7f64756253045b32cabe70d618d19 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/vi.c | 11 --- 1 file changed, 4 insertions(+), 7 deletions(-) diff

[PATCH 03/21] drm/amdgpu:fix scheduler hw reset

Change-Id: I39e0b77029d22dc3fb37e2f19da699647ae96aad Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/scheduler/gpu_scheduler.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c b/drivers/gpu/drm/amd/sch

[PATCH] drm/amdgpu:guarantee 128dws between vm flush and IB(v2)

submit. v2: drop the 128nop inserting in gfx_v8_vm_flush and the estimated frame size should minor those between vm_flush and emit_ib, since we already consdier vm_flush will take 128 + 19 DWs. Change-Id: Iac198e16f35b071476ba7bd48ab338223f6fe650 Signed-off-by: Monk Liu <monk@amd.com> --- d

[PATCH] drm/amdgpu:guarantee 128dws between vm flush and IB

submit. Change-Id: Iac198e16f35b071476ba7bd48ab338223f6fe650 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c| 24 ++-- 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/d

[PATCH] drm/amdgpu:fix write more dws to ring

Change-Id: I745512ed7d181e2cd0ce668c86ccfbb2dec80d4d Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgp

[PATCH] drm/amdgpu:guarantee 128dws between vm flush and IB(v3)

-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 7 +++ drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c| 16 3 files changed, 20 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/

[PATCH] drm/amdgpu:guarantee 128dws between vm flush and IB(v3)

. v2: drop insert_nops in vm_flush re-calculate the estimate frame size for gfx8 ring v3: calculate the gap between vm_flush and IB in cntx_cntl on an member field of ring structure Change-Id: I0a1845de07c0b86ac1b77ac1a007e893144144fd Signed-off-by: Monk Liu <monk@amd.com> --- drivers/g

[PATCH 2/3] drm/amdgpu:Preamble is forbid to be ignored in SRIOV

Change-Id: I6da941fa22cfaee43d6dc11191b1fb7482e7362b Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

[PATCH 1/3] drm/amdgpu:set cond_exec polling value to 1 in ring_init

no need to set it per ib_schedule(), hw won't override this polling address. Change-Id: Ie27a36f187f7db26239c016315cd2dee482387b5 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 3 --- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 4 +++- 2 files chan

[PATCH 0/3] some cleanups and fixes

Monk Liu (3): drm/amdgpu:set cond_exec polling value to 1 in ring_init drm/amdgpu:Preamble is forbid to be ignored in SRIOV drm/amdgpu:insert switch buffer only for VM submit drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 8 +++- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 4 +++- 2 files

[PATCH] drm/amdgpu:in cntx_ctrl we need insert meta-init for CE/DE(V2)

to support SRIOV preemption. v2: fix emit_frame_size Change-Id: I9f3534149b132756e5cd9292d48474e50306936b Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/

[PATCH 4/5] drm/amdgpu:introduce new flag to identify VM domain for cntx_ctrl

Change-Id: Ibfd20e7260de76177ac59bc6af15887ae0983a83 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/g

[PATCH 0/5] META-DATA init packages patches v2

*** BLURB HERE *** Monk Liu (5): drm/amdgpu:add META_DATA struct for CSA/SRIOV v2 drm/amdgpu:implement ring_write_multiple drm/amdgpu:implement CE/DE meta-init routines drm/amdgpu:introduce new flag to identify VM domain for cntx_ctrl drm/amdgpu:in cntx_ctrl we need insert meta-init

[PATCH 3/5] drm/amdgpu:implement CE/DE meta-init routines

those package need to insert into ring buffer for SRIOV case. they are used to let CP do preemption. Change-Id: Ib9282fbf146a181b4fce96e15a765ed344c65db9 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 61 +++ 1 file c

[PATCH 2/5] drm/amdgpu:implement ring_write_multiple

Change-Id: Ib9105e5f0e1183ae92e647db64244077a86642a4 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 31 +++ 1 file changed, 31 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/am

[PATCH 1/5] drm/amdgpu:add META_DATA struct for CSA/SRIOV v2

: I17324905b4822a93fd3ffb3e8f86e544871b89ab Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 1 + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c| 7 ++ drivers/gpu/drm/amd/amdgpu/vi.h | 112 +++ 3 files changed, 120 insertions(+) diff --git a/drive

[PATCH 2/2] drm/amdgpu:256dw is enough for one ib_schedule

Change-Id: I1ee3258276868a753e536ae2d9ae1b12e7eaf791 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

[PATCH 1/2] drm/amdgpu:fix gfx ib schedule

-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 8 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 28 +--- 3 files changed, 23 insertions(+), 15 deletions(-) diff --git a/drivers/g

[PATCH 4/4] drm/amdgpu:determine if vPost is needed indeed

Change-Id: Ic4bb5cb748180d60a672f9e160f1f3308397029b Signed-off-by: Monk Liu <monk@amd.com> Conflicts: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 38 ++ 1 file changed, 34 insertions(+), 4 deletions(-)

[PATCH 1/2] drm/amdgpu:fix exclusive mode game texture blank

gned-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c index 4127e7c..efce228 100644 --- a/drivers/gpu/drm/amd/amdgpu/a

[PATCH] drm/amdgpu:cleanup virt related define

move virtual machine related structure to amdgpu_virt.h easy for developer to maintain for virualization stuffs Change-Id: I8cd9904a8ec220345f96214ade7c8030cf6a39f3 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 32 + drivers/g

[PATCH] drm/amdgpu:fix DMAframe for GFX8

is enough TODO: use DMAframe entry design to implement ib_schedule(), make sure each DMAframe is aligned and fixed at their offset, which is needed for preemption and easy for ring buffer debug & dump. Change-Id: I1b98d6352b7ead91b661094921bfd43cfeaae190 Signed-off-by: Monk Liu <monk@

[PATCH 3/4] drm/amdgpu:change job->ctx field name

job->ctx actually is a fence_context of the entity it belongs to, naming it as ctx is too vague, and we'll need add amdgpu_ctx into the job structure later. Change-Id: I71e73912e26372639ea44a18d9e36d58d936f19a Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu

[PATCH 4/4] drm/amdgpu:implement CONTEXT_CONTROL

use CONTEXT_CONTROL package to dynamically skip preamble IB and other load_xxx command in sequence. Change-Id: I4b87ca84ea8c11ba4f7fb4c0e8a5be537ccde851 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 9 + drivers/gpu/drm/amd/amdgpu/amdgp

[PATCH 1/4] drm/amdgpu:add switch buffer to end of CS

sync switch buffer scheme with windows kmd for gfx v8, Now always and only insert one switch buffer to the end of CS. Change-Id: Ief8539b2ad91ccb38b9adbfb54e27d8282f3a3bd Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 ++ drivers/gpu/drm/amd/

[PATCH 4/4] drm/amdgpu:implement CONTEXT_CONTROL

use CONTEXT_CONTROL package to dynamically skip preamble IB and other load_xxx command in sequence. Change-Id: I4b87ca84ea8c11ba4f7fb4c0e8a5be537ccde851 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 9 + drivers/gpu/drm/amd/amdgpu/amdgp

[PATCH 2/4] drm/amdgpu:new method to sync ce

-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 18 ++ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index 26fced0..ce1e616 100755 --- a/drivers/gpu/drm/

[PATCH 1/4] drm/amdgpu:add switch buffer to end of CS

sync switch buffer scheme with windows kmd for gfx v8, step1: append a switch_buffer to the end of CS Change-Id: Ief8539b2ad91ccb38b9adbfb54e27d8282f3a3bd Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_ib

[PATCH 3/4] drm/amdgpu:change job->ctx field name

job->ctx actually is a fence_context of the entity it belongs to, naming it as ctx is too vague, and we'll need add amdgpu_ctx into the job structure later. Change-Id: I71e73912e26372639ea44a18d9e36d58d936f19a Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu

[PATCH 2/4] drm/amdgpu:new method to sync ce

sync switch buffer scheme with windows kmd for gfx v8, step2: Insert 128NOP after VM flush to prevent CE vm fault. Change-Id: Ibec954ce4c817ad7d3bce89c2bcb95b6c6bb5411 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 24 ++--

[PATCH 0/4] fix GFX8 dma frame scheme

Sync gfx8.0 DMAframe to windows scheme: 1)only one SWITCH_BUFFER to the end of CS 2)insert 128 nop before VM flushy to prevent CE vm fault 3)use CONTEXT_CONTROL to dynamically control preamble IB skipping Monk Liu (4): drm/amdgpu:add switch buffer to end of CS drm/amdgpu:new method to sync ce

[PATCH 1/5] drm/amdgpu:add switch buffer to end of CS

sync switch buffer scheme with windows kmd for gfx v8, Now always and only insert one switch buffer to the end of CS. Change-Id: Ief8539b2ad91ccb38b9adbfb54e27d8282f3a3bd Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 ++ drivers/gpu/drm/amd/

[PATCH 4/5] drm/amdgpu:change job->ctx field name

job->ctx actually is a fence_context of the entity it belongs to, naming it as ctx is too vague, and we'll need add amdgpu_ctx into the job structure later. Change-Id: I71e73912e26372639ea44a18d9e36d58d936f19a Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu

[PATCH 3/5] drm/amdgpu:fix RB cost calculator

Change-Id: Ie3e4587ed49c487c562f45a99f236a76727ace1e Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

[PATCH 5/5] drm/amdgpu:implement CONTEXT_CONTROL

use CONTEXT_CONTROL package to dynamically skip preamble IB and other load_xxx command in sequence. Change-Id: I4b87ca84ea8c11ba4f7fb4c0e8a5be537ccde851 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 9 + drivers/gpu/drm/amd/amdgpu/amdgp

[PATCH 2/5] drm/amdgpu:new method to sync ce

-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 15 +++ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index 26fced0..af354a8 100755 --- a/drivers/gpu/drm/

[PATCH 2/9] drm/amdgpu:add one more fiji device id

From: Frank Min Change-Id: I1d9e18c74e614f32d924e88ee3b6db3b8bf933c7 Signed-off-by: Frank Min --- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 + 1 file changed, 1 insertion(+) mode change 100644 => 100755 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c diff

[PATCH 3/9] drm/amdgpu:use smc_index_11 for VI

for VI smc, index_0 to index_8 are all not safe, they may used by BIOS/FW, and index_11 is reserved only for driver. Change-Id: I69767f10327348f5db1311469a181e3eb7bdfd4a Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/vi.c

[PATCH 4/9] drm/amdgpu:keep bo pinned in prefered domain

From: Frank Min Change-Id: I87fae602a221902f58f61069c18930627012 Signed-off-by: Frank Min --- drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) mode change 100644 => 100755

[PATCH 6/9] drm/amdgpu:add callback in cgs for sriov detect

From: Frank Min Change-Id: If2eac6a9ab445b775ce701a122dba6b1f21de4d7 Signed-off-by: Frank Min --- drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 7 +++ drivers/gpu/drm/amd/include/cgs_common.h | 5 + 2 files changed, 12 insertions(+) diff --git

[PATCH 5/9] drm/amdgpu:fw bo should be in VRAM for SRIOV

From: Frank Min for GTT memory SMC can only access it within PF space, which is not used for SRIOV case, thus for SRIOV case, we let SMC use FB space for ucode bo. Change-Id: If30d135a48733721f302251eb7182b01b0d0e09b Signed-off-by: Frank Min ---

[PATCH 7/9] drm/amdgpu:add MEC_STORAGE ucode id for sriov

for sriov, SMC need MEC_STORAGE reserved in fw bo. Signed-off-by: Monk Liu <monk@amd.com> Signed-off-by: Frank Min <frank@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c| 3 +++ drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 3 +++ drivers/gpu/dr

[PATCH 9/9] drm/amdgpu:properly fix some JumpTable issues

for MEC_JT2 we just return MEC1,hw can use the same JT for both MEC1 & MEC2. above two change fixed some ring/ib test failure issue for some version of MEC ucode. Change-Id: Ie3b3c4c5722fdf68f64547cdfbf9c0d3274a2a15 Signed-off-by: Frank Min <frank@amd.com> Signed-off-by: Monk Liu <mon

[PATCH 8/9] drm/amdgpu:wptr poll address of gfx8 is needed

From: Frank Min for GFX8, gfx ring's wptr_addr is needed by SRIOV & CP for polling. Change-Id: I14477577ef50d1ac90ccc32d41819276811732b7 Signed-off-by: Frank Min --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 5 - 1 file changed, 4 insertions(+), 1

[PATCH] drm/amdgpu:fix vpost_needed routine

1,cleanup description/comments 2,for FIJI & passthrough, force post when smc fw version below 22.15 3,for other cases, follow regular rules Change-Id: Iecdeec1801a920c1f4ea9c8fd40be9ac2f1f3c51 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_dev

[PATCH] drm/amdgpu:new ids flag for preempt

Change-Id: Idae33c69198c30bd841fb555641729d3b6e06a2e Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 ++ include/uapi/drm/amdgpu_drm.h | 1 + 2 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drive

[PATCH] drm/amdgpu:set preemption flag bit

UMD need this bit if preemption want supported Change-Id: Ic657b3e6f46a148ed3cf0e932ccf46f2c5230d7f Signed-off-by: Monk Liu <monk@amd.com> Conflicts: drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 8 include/uapi/drm/amdgpu

[PATCH] drm/amdgpu:impl vgt_flush for VI(v2)

. v2:implement vgt-flush for CI & SI. Change-Id: I77d87d93ce6580e559e734fb41d97ee8c59d245b Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 5 - drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1

[PATCH 2/3] drm/amdgpu:implement META-DATA write routines

Change-Id: I66007a7f7e4e27fb129121f36143dce3cfb43738 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 31 ++ drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 61 +++ 2 files changed, 92 insertions(+) diff

[PATCH 1/3] drm/amdgpu:add META_DATA struct for CSA/SRIOV

META-DATA is used in GFX cmd submit, we have two types of META-DATA now, one is legacy and the other is for chained-ib-preemption, which is used in vulkan UMD. Change-Id: I17324905b4822a93fd3ffb3e8f86e544871b89ab Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/

[PATCH 3/3] drm/amdgpu:invoke meta-data write around cntx_cntl

ce's META-DATA write need prior to cntx_cntrl package and de's should following. Change-Id: I2bf436d8a16bae38ce484f846f0b399e16cfe80a Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 3 +++ drivers/gpu/d

[PATCH 0/3] GFX8's meta-data write feature for SRIOV

address for usage when preeption occured. Monk Liu (3): drm/amdgpu:add META_DATA struct for CSA/SRIOV drm/amdgpu:implement META-DATA write routines drm/amdgpu:invoke meta-data write around cntx_cntl drivers/gpu/drm/amd/amdgpu/amdgpu.h | 32 + drivers/gpu/drm/amd/amdgpu

[PATCH 3/3] drm/amdgpu:invoke CSA functions

Change-Id: I528c2f324830aaa21ab8d8250bc80a2a6bab33bd Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 14 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c| 11 +++ d

[PATCH 2/3] drm/amdgpu:add new file for SRIOV

for SRIOV usage, CSA is only used per device and each VM will map on it. Change-Id: Ibc63d87be59d7d89b96117e4d1b7e970a872580d Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.

[PATCH 1/3] drm/amdgpu:new field members for SRIOV

and implement CSA functions in this file Change-Id: Ife0eff7b13b8b5946f005a39f6ecb8db1cb72c38 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 8 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 +++ 2 files changed, 11 insertions(+) diff

[PATCH 0/3] CSA patches

*** BLURB HERE *** Monk Liu (3): drm/amdgpu:new field members for SRIOV drm/amdgpu:add new file for SRIOV drm/amdgpu:invoke CSA functions drivers/gpu/drm/amd/amdgpu/Makefile| 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 14 + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

[PATCH 1/3] drm/amdgpu:new field members for SRIOV

and implement CSA functions in this file Change-Id: Ife0eff7b13b8b5946f005a39f6ecb8db1cb72c38 Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 8 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 +++ 2 files changed, 11 insertions(+) diff

[PATCH 3/3] drm/amdgpu:invoke CSA functions

Change-Id: I528c2f324830aaa21ab8d8250bc80a2a6bab33bd Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 14 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c| 14 ++ d

[PATCH 2/3] drm/amdgpu:add new file for SRIOV

for SRIOV usage, CSA is only used per device and each VM will map on it. Change-Id: Ibc63d87be59d7d89b96117e4d1b7e970a872580d Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.

[PATCH 0/3] CSA patch v3

v2: drop invoking gem_va and update CSA address in CS routines, v3: reserve CSA bo and call vm_bo_rmv() to remove CSA mappings prior to vm_fini() Monk Liu (3): drm/amdgpu:new field members for SRIOV drm/amdgpu:add new file for SRIOV drm/amdgpu:invoke CSA functions drivers/gpu/drm/amd

[PATCH 4/7] drm/amdgpu:impl static CSA map/unmap routines

Change-Id: I76ddeb3212c96d87a2d15a608ae8c0771e2d94ed Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 90 1 file changed, 90 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/

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