[Why]
ifdef mismatch.
[How]
Update to the correct flag.
Signed-off-by: Qingqing Zhuo
Cc:
---
drivers/gpu/drm/amd/display/dc/dce/dce_abm.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_abm.h
b/drivers/gpu/drm/amd/display/dc/dce
[Why]
ifdef mismatch.
[How]
Update to the correct flag.
Signed-off-by: Qingqing Zhuo
Cc:
---
drivers/gpu/drm/amd/display/dc/dce/dce_abm.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_abm.h
b/drivers/gpu/drm/amd/display/dc/dce
Signed-off-by: Lewis Huang
Acked-by: Qingqing Zhuo
Cc:
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 1efc823c2a14..7e74ddc1c
From: Anthony Koo
[Why]
We want to better encapsulate all driver-fw dependencies into a single
file.
[How]
Combine all the headers under inc folder into a single header
Signed-off-by: Anthony Koo
Reviewed-by: Tony Cheng
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dmub
From: David Galiffi
[WHY]
To facilitate DM removing the dependency between dc and the firmware
binary.
[HOW]
Setting the default values to match VBIOS: 64 KB. These values are only
used if meta is absent.
Signed-off-by: David Galiffi
Reviewed-by: Nicholas Kazlauskas
Acked-by: Qingqing Zhuo
issues.
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Eric Bernstein
Acked-by: Qingqing Zhuo
---
.../drm/amd/display/dc/dml/dml_inline_defs.h | 20 ---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dml_inline_defs.h
b
From: Aric Cyr
[Why]
Link loss currently only retrains and re-enables the stream. This can
cause issues for some sinks.
[How]
When link loss occurs, the link and stream(s) should be completely
disabled and then reenabled.
Signed-off-by: Aric Cyr
Reviewed-by: Wenjing Liu
Acked-by: Qingqing
will be blank anyways so no
functionality should be lost.
Signed-off-by: Aric Cyr
Reviewed-by: Zhan Liu
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20
From: Hugo Hu
[why]
We hit an issue which driver reallocate a pipe from desktop bottom
pipe to video bottom pipe. In this case, driver need to re-enable
plane.
[how]
Enable plane if container of plane status changed.
Signed-off-by: Hugo Hu
Reviewed-by: Tony Cheng
Acked-by: Qingqing Zhuo
From: Alvin Lee
[Why]
When determining synchronzied vblank we don't need to compare the stream
with itself
[How]
If comparing same stream, continue to next iteration
Signed-off-by: Alvin Lee
Reviewed-by: Jun Lei
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dcn20
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 687faf83a54c
This DC patchset brings improvements in multiple areas.
In summary, we have:
* Fixes on HDCP, eDP, etc.
* Enhancements on interrupt handling, code security and others.
---
Alvin Lee (2):
drm/amd/display: Disable PG on NV12
From: Paul Hsieh
[Why]
Unit enter to S4, garbage show on screen when do OPTC blank.
[How]
Wait for vblank then do OPTC blank
Signed-off-by: Paul Hsieh
Reviewed-by: Tony Cheng
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 4 +++-
1 file changed, 3
From: Bhawanpreet Lakha
[Why]
Previously we used link signal type to get the caps. We should use the
sink signal type
[How]
Use sink signal type instead of link signal type
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Wenjing Liu
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 11ac4b7ab174
From: Anthony Koo
[Header Changes]
- Combine all interface dependencies between driver and fw into a
single header file
- Add FW Versioning to the dmub_cmd.h file
Signed-off-by: Anthony Koo
Reviewed-by: Anthony Koo
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dmub/inc
From: Paul Hsieh
[Why]
The link_status is incorrect cause driver power off eDP when backlight
on. Some eDP panels may show garbage on screen.
[How]
Correct link_status when power off encoder
Signed-off-by: Paul Hsieh
Reviewed-by: Anthony Koo
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd
From: Eric Bernstein
[Why]
Diagnostics DIO test with eDP not connected is required to run
[How]
Allow Diagnostics test with eDP not connected to skip link detection but
still execute DIO test
Signed-off-by: Eric Bernstein
Reviewed-by: Dmytro Laktyushkin
Acked-by: Qingqing Zhuo
---
drivers
From: Aric Cyr
[Why]
If VUPDATE_END is before VUPDATE_START the delay calculated can become
very large, causing a soft hang.
[How]
Take the absolute value of the difference between START and END.
Signed-off-by: Aric Cyr
Reviewed-by: Nicholas Kazlauskas
Acked-by: Qingqing Zhuo
---
drivers
From: Alvin Lee
[Why]
HW team request to disable PG on NV12 (fixing missed cases)
[How]
Disable dpp and hubp PG
Signed-off-by: Alvin Lee
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 6 +-
1 file changed, 5 insertions(+), 1
From: Wyatt Wood
[Why]
For DMUB implementation of PSR, the 'wait' parameter,
used to determine if driver should wait for PSR enable/disable,
is not implemented correctly.
[How]
Implement wait for PSR enable/disable.
Signed-off-by: Wyatt Wood
Reviewed-by: Anthony Koo
Acked-by: Qingqing Zhuo
aux rd interval logic as before.
Signed-off-by: Wenjing Liu
Reviewed-by: George Shen
Acked-by: Qingqing Zhuo
---
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
From: Peikang Zhang
[Why]
dce_is_panel_backlight_on() will return wrong value if
LVTMA_BLON_OVRD is 0
[How]
When LVTMA_BLON_OVRD is 0, read
LVTMA_PWRSEQ_TARGET_STATE instead
Signed-off-by: Peikang Zhang
Reviewed-by: Anthony Koo
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dce
From: Wesley Chalmers
[WHY]
Only the leftmost ODM pipe should be offset when scaling. A previous
code change was intended to implement this policy, but a section of code
was overlooked.
Signed-off-by: Wesley Chalmers
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
Cc:
---
drivers/gpu/drm/amd
From: David Galiffi
[Why]
Typo in backlight refactor introduced wrong register offset.
[How]
SR(BIOS_SCRATCH_2) to NBIO_SR(BIOS_SCRATCH_2).
Signed-off-by: David Galiffi
Reviewed-by: Anthony Koo
Acked-by: Qingqing Zhuo
Cc:
---
drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h | 2 +-
1
potentially apply
a flip on the incorrect pipe.
[How]
Check that any pending flips are cleared before locking any pipes to
ensure flips are applied on the correct pipes.
Signed-off-by: Taimur Hassan
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/core/dc.c
From: Gary Li
[WHY]
In DCN10 when a panel with YCbCr420 capability is connected via
USB-C to HDMI active dongle, no YCbCr420 option is listed in
Radeon settings.
[HOW]
Enable DP YCbCr420 mode support for DCN10
Signed-off-by: Gary Li
Reviewed-by: Eric Yang
Acked-by: Qingqing Zhuo
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index d65483483d05
This DC patchset brings improvements in multiple areas. In summary, we have:
* DC version 3.2.104.
* DMUB Firmware release 0.0.34.
* Improve on HDMI fallback mechanism.
* Enable DP YCbCr420 mode support for DCN10 ASICs.
* Bug fixes for backlight, ODM, eDP and others.
--
Anthony Koo (2):
From: Peikang Zhang
[Why]
We dont's turn off backlight before power off eDP (VDD),
which is a violation of eDP specs.
[How]
Power off eDP backlight before power off eDP
Signed-off-by: Peikang Zhang
Reviewed-by: Anthony Koo
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/core
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index d9b22d6a985a
Reviewed-by: Wenjing Liu
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dce/dce_aux.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c
b/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c
index 743042d5905a..cdcad82765e0
From: Anthony Koo
Signed-off-by: Anthony Koo
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu/drm/amd
From: Anthony Koo
[Header Changes]
- Add new SCRATCH0 status bits for detecting restore state
Signed-off-by: Anthony Koo
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 11 ---
1 file changed, 8 insertions(+), 3 deletions
mechanism.
Signed-off-by: Chris Park
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
.../drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 13 +
drivers/gpu/drm/amd/display/dc/dc_link.h| 2 ++
2 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/amd/display
-by: Aric Cyr
Acked-by: Qingqing Zhuo
Cc:
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
connector to the state if the flag is set.
Signed-off-by: Eryk Brol
Reviewed-by: Nicholas Kazlauskas
Acked-by: Qingqing Zhuo
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 1 +
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 124
Kazlauskas
Reviewed-by: Tony Cheng
Acked-by: Qingqing Zhuo
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c | 2 +-
drivers/gpu/drm/amd/display/dc/core/dc.c | 15 +--
drivers/gpu/drm/amd/display/dc/dc_stream.h| 1 +
3 files changed, 15 insertions(+), 3 deletions
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index c74be6dafafc
-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c| 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index 71499c131947..3b26396cbc5c
-by: Charlene Liu
Acked-by: Qingqing Zhuo
---
.../gpu/drm/amd/display/dc/core/dc_link_hwss.c | 13 -
.../amd/display/dc/dce110/dce110_hw_sequencer.c | 16
drivers/gpu/drm/amd/display/dc/inc/link_hwss.h | 1 +
3 files changed, 17 insertions(+), 13 deletions
From: Dmytro Laktyushkin
Recout calculation does not corrrectly handle plane
clip rect that extends beyond the left most border
of stream source rect. This change adds handling by
truncating the invisible clip rect.
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Hersen Wu
Acked-by: Qingqing
From: Anthony Koo
[Header Changes]
- Add command for retrieving PSR residency
- Add command for forcing PSR static
Signed-off-by: Anthony Koo
Reviewed-by: Anthony Koo
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 11 +--
1 file changed, 9
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 87bc10279349
From: Chris Park
[Why]
Incorrect panel register settings are
applied for power sequence because the
register macro is not defined in resource.
[How]
Implement same register space to future
resource files.
Signed-off-by: Chris Park
Reviewed-by: Joshua Aberback
Acked-by: Qingqing Zhuo
From: Yongqiang Sun
[Why & How]
1. only need to check first ODM pipe.
2. Only need to check eDP which is on.
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 6 +-
1 file changed, 5 insertions(+), 1 dele
to
automatically shut down memory when not in use
2. mpc3_power_on_shaper_3dlut and mpc3_power_on_ogam_lut are called
to disable force power on when configuration finishes
3. Added a debug option to allow this behaviour to be turned off
Signed-off-by: Jacky Liao
Reviewed-by: Jun Lei
Acked-by: Qingqing
.
Signed-off-by: Alvin Lee
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index
option to allow this behaviour to be turned off
4. Restructured debug options to use a bitfield in a way that's more clear
Signed-off-by: Jacky Liao
Reviewed-by: Eric Yang
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dc.h| 10 +-
drivers/gpu/drm/amd/display/dc
From: Jake Wang
[Why]
Fail and restart timing for HDCP1 retry occurs too quickly.
This would cause some MST monitors to show black screen.
[How]
Adjusted timing of fail and restart to 200ms.
Signed-off-by: Jake Wang
Reviewed-by: Wenjing Liu
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd
From: Victor Lu
[why]
There is a DRM_ERROR when the dc_sink is NULL and
there should not be this warning when the connector
is forced.
[how]
Do not warn if dc_sink is NULL if the connector
is forced.
Signed-off-by: Victor Lu
Reviewed-by: Nicholas Kazlauskas
Acked-by: Qingqing Zhuo
version of blank_pixel_data for DCN30
- call hubp->set_blank from dcn30_blank_pixel_data
- blank every hubp in the mpcc tree, and odm tree
- on blank enable, wait until the next frame before blanking HUBP
Signed-off-by: Joshua Aberback
Reviewed-by: Jun Lei
Acked-by: Qingqing Zhuo
---
.../
- revert functional changes
- leave architectural changes intact
Signed-off-by: Joshua Aberback
Reviewed-by: Jun Lei
Acked-by: Qingqing Zhuo
---
.../drm/amd/display/dc/dcn30/dcn30_hwseq.c| 27 ++-
.../dc/dml/dcn30/display_mode_vba_30.c| 2 +-
2 files changed, 3 inserti
prefetch mode to 0 by default.
Signed-off-by: Isabel Zhang
Reviewed-by: Tony Cheng
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
b
From: Anthony Koo
Signed-off-by: Anthony Koo
Reviewed-by: Anthony Koo
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu/drm/amd
From: Lewis Huang
[Why]
Driver keeps the invalid information cause report the
incorrect monitor which save in remote sink to OS
[How]
When connector type change from MST to non-MST,
stop the topology manager.
Signed-off-by: Lewis Huang
Reviewed-by: Tony Cheng
Acked-by: Qingqing Zhuo
Tao.Huang
Signed-off-by: Florin Iucha
Reviewed-by: Dmytro Laktyushkin
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.h | 2 +-
drivers/gpu/drm/amd/display/dc/dsc/rc_calc.c | 6 +++---
drivers/gpu/drm/amd/display/dc/dsc/rc_calc.h | 4 ++--
3 files changed, 6
From: Ashley Thomas
[why]
If pbn_per_slot is 0, fail instead of dividing by zero and
bugchecking.
[how]
Check for zero divisor before division operation.
Signed-off-by: Ashley Thomas
Reviewed-by: Wyatt Wood
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/core/dc_debug.c | 2
_data, set dcn30 back to dcn20 version
- new hwss funciton set_disp_pattern_generator
- dcn20 version just calls opp_set_disp_pattern_generator
- dcn30 version implements the HUBP blank
Signed-off-by: Joshua Aberback
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
.../gpu/drm/amd/displ
This DC patchset brings improvements in multiple areas. In summary, we have:
* DC 3.2.110
* Firmware release 0.0.40
* Enable CRC calculation on specific frame region
* Bug fixes on GSL, recout calculation, missing pflip irq and more.
---
Alvin Lee (2):
drm/amd/display: Keep GSL for
From: Bhawanpreet Lakha
If we have more than 4 displays we will run
into dummy irq calls or flip timout issues.
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Charlene Liu
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c | 4 ++--
1 file changed, 2
.
[How]
Read DPCD 0x010 again during link training for eDP 1.4.
Signed-off-by: Dale Zhao
Reviewed-by: Wenjing Liu
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core
Acked-by: Qingqing Zhuo
---
.../amd/display/modules/freesync/freesync.c | 36 +++
1 file changed, 29 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
index 81820f3d6b3b
From: Alvin Lee
[Why]
Caused pipe split regression
Signed-off-by: Alvin Lee
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 10 --
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c| 114 --
.../drm/amd/display/dc/dcn20
drm_connector_update_edid_property() to fully parse EDID
and update display info.
Cc: sta...@vger.kernel.org
Signed-off-by: Stylon Wang
Reviewed-by: Nicholas Kazlauskas
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 +
1 file changed, 1 insertion(+)
diff --git
. Audio will
also be muted by blanking the stream.
Cc: sta...@vger.kernel.org
Signed-off-by: Jaehyun Chung
Reviewed-by: Alvin Lee
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd
From: Xiaodong Yan
[Why]
The format in MPCC should be 444
[How]
do not modify the mpcc black color according to pixel encoding format
Signed-off-by: Xiaodong Yan
Reviewed-by: Eric Yang
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 8
1
ent this.
[How]
Move MPCC disconnect into separate operation than the
rest of the pipe programming.
Signed-off-by: Alvin Lee
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 10 ++
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c |
, for future use
- remove duplicate function definition
Signed-off-by: Joshua Aberback
Reviewed-by: Nicholas Kazlauskas
Acked-by: Qingqing Zhuo
---
.../drm/amd/display/dc/dcn20/dcn20_resource.h | 1 -
.../drm/amd/display/dc/dcn30/dcn30_resource.c | 27 ++-
.../drm/amd/display/dc
]
Switch to using IMMEDIATE_UPDATE mode
Signed-off-by: Anthony Koo
Reviewed-by: Ashley Thomas
Acked-by: Qingqing Zhuo
---
.../amd/display/dc/dcn10/dcn10_stream_encoder.c | 16
.../amd/display/dc/dcn10/dcn10_stream_encoder.h | 14 ++
2 files changed, 22 insertions
From: Aric Cyr
[Why]
Typo in backlight refactor inctroduced wrong register offset.
[How]
Change DCE to DCN register map for PWRSEQ_REF_DIV
Cc: sta...@vger.kernel.org
Signed-off-by: Aric Cyr
Reviewed-by: Ashley Thomas
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dce
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
* Fixes on LFC, pipe split, register mapping and others.
* Code clean-up.
Alvin Lee (2):
drm/amd/display: Revert regression
drm/amd/display: Disconnect pipe separetely when disable pipe split
Anthony Koo
ined!
ERROR: modpost:
"mod_color_set_table_init_state"
[drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
To fix the issue, this commits removes
CONFIG_DRM_AMD_DC_DCN guard in color/makefile.
Signed-off-by: Qingqing Zhuo
CC: Lewis Huang
CC: Aric Cyr
CC: Alexander Deucher
CC: Harry Wentland
CC: Nicholas Kazlaus
An issue is reported regarding compilation errors
on upstream branch. The corresponding fix has been
attached below for review.
Qingqing Zhuo (1):
drm/amd/display: fix compilation error on allmodconfig
drivers/gpu/drm/amd/display/modules/color/Makefile | 6 +-
1 file changed, 1
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 7da41d465a34
are generic due to
lack of IEEE OUI information on the failing displays.
Also reverts commit b9976bd920a19d509de09b6dc727fcaae60fbb32.
Signed-off-by: Aric Cyr
Reviewed-by: Wenjing Liu
Acked-by: Qingqing Zhuo
Acked-by: Tony Cheng
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 4 +++-
.../gpu
of viewport_height instead of viewport_height_c.
[How]
Correct the calculations.
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Dmytro Laktyushkin
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
From: po-tchen
[Why]
The SDP deadline indicate the vertical time to send CRC
infopacket in PSR.
Signed-off-by: po-tchen
Reviewed-by: Anthony Koo
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd
and link training.
Signed-off-by: Martin Tsai
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 7 ---
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm
From: Wesley Chalmers
[WHY]
Disabling DPG should happen after setting watermarks and clocks
Signed-off-by: Wesley Chalmers
Reviewed-by: Tony Cheng
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers
-by: Rodrigo Siqueira
Reviewed-by: Mikita Lipski
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dsc/Makefile | 2 -
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c | 18 +--
drivers/gpu/drm/amd/display/dc/dsc/rc_calc.c | 151 +-
drivers/gpu/drm/amd/display/dc/dsc/rc_calc.h
From: Lewis Huang
[Why]
Multi-adapter calculate regamma table at the same time.
Two thread used the same global variable cause race
condition.
[How]
Change global buffer to local buffer
Signed-off-by: Lewis Huang
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
.../amd/display/amdgpu_dm
pstate latency.
Signed-off-by: Jun Lei
Reviewed-by: Joshua Aberback
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h
b/drivers/gpu/drm/amd/display/dc/inc/hw
From: Dmytro Laktyushkin
To allow code reuse with minimal duplication watermark
calculation needs to be function pointer.
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Eric Bernstein
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/inc/core_types.h | 6 +-
1 file changed, 5
-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c
index 42bba7c9548b..4af96cc5d9d6 100644
--- a/drivers/gpu/drm/amd/display/dc
-by: Qingqing Zhuo
---
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index afa99f967558..fb167393b8fe 100644
From: Wenjing Liu
[why]
The change causes some regression in a common use case.
Will need more investigation before fixing the original issue.
[how]
This reverts commit ad418864c63a1718f9e283207b3fac96fbc148c2.
Signed-off-by: Wenjing Liu
Reviewed-by: Jun Lei
Acked-by: Qingqing Zhuo
From: Hugo Hu
revert commit 77dcea7a0b133b362b2ebbf494eb13ee3e946836.
Signed-off-by: Hugo Hu
Reviewed-by: Tony Cheng
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd
From: Michael Strauss
[WHY]
Typos cause bandwidth calculation errors, one
of which can cause infinite loop on dcn1 with eDP
Signed-off-by: Michael Strauss
Reviewed-by: Dmytro Laktyushkin
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c | 6 +++---
1 file
From: Yongqiang Sun
[Why & How]
Add emul specific hw function to dmub, in case of
emulator is created, we can runtime switch between
dmub emulator or dmub uC via is_virtual flag in dmub.
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm
`enum dc_status` to a human-readable
string and appends the proper warning message in case
of failure.
Signed-off-by: Rodrigo Siqueira
Reviewed-by: Harry Wentland
Acked-by: Qingqing Zhuo
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 13 ++--
.../gpu/drm/amd/display/dc/core/dc_debug.c
From: Roman Li
[Why]
SOC_BOUNDING_BOX_VALID is unused and not required for dcn21.
[How]
Remove it.
Signed-off-by: Roman Li
Reviewed-by: Bhawanpreet Lakha
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 1 -
1 file changed, 1 deletion(-)
diff --git
From: Anthony Koo
[Header Changes]
- Add SDP transmission deadline for PSR config cmd
Signed-off-by: Anthony Koo
Reviewed-by: Anthony Koo
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff
-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c
b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c
From: Aurabindo Pillai
[Why & How]
DMUB command table should be allowed to be used
only if dmcu is explicitly disabled.
Signed-off-by: Aurabindo Pillai
Reviewed-by: Nicholas Kazlauskas
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 2 ++
1 file cha
From: Yongqiang Sun
[Why]
dmub FW running abnormal after resume from S0i3 due
to data aliagnment issue.
[How]
Before having a solution for this issue, temparory
not doing data pack.
Signed-off-by: Yongqiang Sun
Reviewed-by: Sung Lee
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display
From: Charlene Liu
[why]
for audio on real TV issue.
[how]
-add wall clock programming for DPREF based when
Pixel clock is done by DP DTO.
Signed-off-by: Charlene Liu
Reviewed-by: Chris Park
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dce/dce_audio.c | 4
This DC patchset brings changes in multiple areas. In summary, we highlight:
* Bug fixes in bandwidth calculation, DSC calculation, etc.
* Improvements in DP
* Code refactoring and cleanup
* FW promotion
Anthony Koo (3):
drm/amd/display: [FW Promotion] Release 1.0.13
drm/amd/display: [FW
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index e09eb876a366
From: Anthony Koo
[Header Changes]
- Add new initialization bits for driver to check
firmware status
- Add command for HW locking via DMUB
Signed-off-by: Anthony Koo
Reviewed-by: Anthony Koo
Acked-by: Qingqing Zhuo
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 68
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