This patch adds a return value check and an error message to
highlight the DAC setup failure case during encoder DPMS
operation.
Cc: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
On 19/08/20 7:00 pm, Christian König wrote:
> Am 19.08.20 um 15:08 schrieb Shashank Sharma:
>> On 19/08/20 6:34 pm, Christian König wrote:
>>> Am 19.08.20 um 14:37 schrieb Shashank Sharma:
>>>> On 19/08/20 6:03 pm, Christian König wrote:
>>>>>
On 19/08/20 5:38 pm, Christian König wrote:
> Am 19.08.20 um 13:52 schrieb Shashank Sharma:
>> On 13/08/20 1:28 pm, Christian König wrote:
>>> Am 13.08.20 um 05:04 schrieb Shashank Sharma:
>>>> This patch adds a new trace event to track the PTE update
>>>>
On 13/08/20 1:28 pm, Christian König wrote:
> Am 13.08.20 um 05:04 schrieb Shashank Sharma:
>> This patch adds a new trace event to track the PTE update
>> events. This specific event will provide information like:
>> - start and end of virtual memory mapping
>> -
On 19/08/20 6:15 pm, Nirmoy wrote:
> Hi Christian,
>
> On 8/19/20 2:08 PM, Christian König wrote:
>
>> Am 19.08.20 um 13:52 schrieb Shashank Sharma:
>>> On 13/08/20 1:28 pm, Christian König wrote:
>>>> Am 13.08.20 um 05:04 schrieb Shashank Sharma:
>>&
On 19/08/20 6:34 pm, Christian König wrote:
> Am 19.08.20 um 14:37 schrieb Shashank Sharma:
>> On 19/08/20 6:03 pm, Christian König wrote:
>>> Am 19.08.20 um 14:19 schrieb Shashank Sharma:
>>>> On 19/08/20 5:38 pm, Christian König wrote:
>>>>>
On 19/08/20 6:03 pm, Christian König wrote:
> Am 19.08.20 um 14:19 schrieb Shashank Sharma:
>> On 19/08/20 5:38 pm, Christian König wrote:
>>> Am 19.08.20 um 13:52 schrieb Shashank Sharma:
>>>> On 13/08/20 1:28 pm, Christian König wrote:
>>>>>
On 20/08/20 2:28 pm, Christian König wrote:
> Am 20.08.20 um 07:27 schrieb Shashank Sharma:
>> This patch adds a new trace event to track the PTE update
>> events. This specific event will provide information like:
>> - start and end of virtual memory mapping
>> -
incr instead of page_sz to be accurate
V5: Addressed Christian's review comments:
add pid and vm context information in the event
V6: Re-sequence the variables (put pid and ctx_id first)
Cc: Christian König
Cc: Alex Deucher
Signed-off-by: Christian König
Signed-off-by: Shashank Sharma
incr instead of page_sz to be accurate
V5: Addressed Christian's review comments:
add pid and vm context information in the event
Cc: Christian König
Cc: Alex Deucher
Signed-off-by: Christian König
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 43
-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 38 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c| 9 --
2 files changed, 45 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
b/drivers/gpu/drm/amd/amdgpu
Hello Christian,
On 12/08/20 12:15 pm, Christian König wrote:
> Am 12.08.20 um 06:33 schrieb Shashank Sharma:
>> This patch adds a new trace event to track the PTE update
>> events. This specific event will provide information like:
>> - start and end of virtual memory m
On 12/08/20 2:02 pm, Christian König wrote:
> Am 12.08.20 um 10:15 schrieb Shashank Sharma:
>> Hello Christian,
>>
>> On 12/08/20 12:15 pm, Christian König wrote:
>>> Am 12.08.20 um 06:33 schrieb Shashank Sharma:
>>>> This patch adds a new trace
incr instead of page_sz to be accurate
Cc: Christian König
Cc: Alex Deucher
Signed-off-by: Christian König
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 37 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c| 9 --
2 files changed, 44
initialization,
and passes the return value to dpm_enable().
- Adds a DRM_ERROR to indicate this failure.
Cc: Alex Deucher
Cc: Maruthi Bayyavarapu
Cc: Sonny Jing
PS: This issue was observed on OLAND while running the reboot
stress test.
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd
On 09/12/20 11:00 pm, Alex Deucher wrote:
> On Fri, Dec 4, 2020 at 3:41 PM Alex Deucher wrote:
>> And drop it when we detach. If the shared buffer is in vram,
>> we need to make sure we don't put the device into runtime
>> suspend.
>>
>> Signed-off-by: Alex Deucher
>
> Ping? Any thoughts on
Hello Aurabindo,
On 10/12/20 8:15 am, Aurabindo Pillai wrote:
> [Why]
> If experimental freesync video mode module parameter is enabled, add
> few extra display modes into the driver's mode list corresponding to common
> video frame rates. When userspace sets these modes, no modeset will be
>
On 10/12/20 8:15 am, Aurabindo Pillai wrote:
> [Why]
> Inorder to enable freesync video mode, driver adds extra
> modes based on preferred modes for common freesync frame rates.
> When commiting these mode changes, a full modeset is not needed.
> If the change in only in the front porch timing
On 10/12/20 3:58 pm, Christian König wrote:
> Am 10.12.20 um 05:49 schrieb Shashank Sharma:
>> On 09/12/20 11:00 pm, Alex Deucher wrote:
>>> On Fri, Dec 4, 2020 at 3:41 PM Alex Deucher wrote:
>>>> And drop it when we detach. If the shared buffer is in vram,
>
On 10/12/20 9:23 pm, Alex Deucher wrote:
> On Thu, Dec 10, 2020 at 8:03 AM Shashank Sharma
> wrote:
>>
>> On 10/12/20 3:58 pm, Christian König wrote:
>>> Am 10.12.20 um 05:49 schrieb Shashank Sharma:
>>>> On 09/12/20 11:00 pm, Alex Deucher wrote:
&g
On 11/12/20 12:18 am, Aurabindo Pillai wrote:
> [Why]
> If experimental freesync video mode module parameter is enabled, add
> few extra display modes into the driver's mode list corresponding to common
> video frame rates. When userspace sets these modes, no modeset will be
> performed (if
On 10/12/20 11:20 pm, Aurabindo Pillai wrote:
> On Thu, 2020-12-10 at 18:29 +0530, Shashank Sharma wrote:
>> On 10/12/20 8:15 am, Aurabindo Pillai wrote:
>>> [Why]
>>> Inorder to enable freesync video mode, driver adds extra
>>> modes based on preferred m
LGTM,
Please feel free to use
Reviewed-by: Shashank Sharma
Regards
Shashank
On 11/12/20 12:18 am, Aurabindo Pillai wrote:
> [Why]
> Adds a module parameter to enable experimental freesync video mode modeset
> optimization. Enabling this mode allows the driver to skip a full mod
Hello Simon,
Hope you are doing well,
I was helping out Aurabindo and the team with the design, so I have taken the
liberty of adding some comments on behalf of the team, Inline.
On 11/12/20 3:31 am, Simon Ser wrote:
> Hi,
>
> (CC dri-devel, Pekka and Martin who might be interested in this as
On 11/12/20 8:19 pm, Kazlauskas, Nicholas wrote:
> On 2020-12-11 12:08 a.m., Shashank Sharma wrote:
>> On 10/12/20 11:20 pm, Aurabindo Pillai wrote:
>>> On Thu, 2020-12-10 at 18:29 +0530, Shashank Sharma wrote:
>>>> On 10/12/20 8:15 am, Aurabindo Pillai wrote:
>&
dm_connector_get_modes(struct
> drm_connector *connector)
> } else {
> amdgpu_dm_connector_ddc_get_modes(connector, edid);
> amdgpu_dm_connector_add_common_modes(encoder, connector);
> + amdgpu_dm_connector_add_freesync_modes(connector, edid);
>
On 11/12/20 9:50 pm, Kazlauskas, Nicholas wrote:
> On 2020-12-11 10:35 a.m., Shashank Sharma wrote:
>> On 11/12/20 8:19 pm, Kazlauskas, Nicholas wrote:
>>> On 2020-12-11 12:08 a.m., Shashank Sharma wrote:
>>>> On 10/12/20 11:20 pm, Aurabindo Pillai wrote:
>>&
was changed from 128 to 100 in Radeon driver also, here:
https://github.com/freedesktop/drm-tip/commit/4b21ce1b4b5d262e7d4656b8ececc891fc3cb806
Cc: Alex Deucher
Cc: Christian König
Cc: Eddy Qin
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c | 2 +-
1 file changed, 1
gt; > To: Sharma, Shashank ;
> > amd-gfx@lists.freedesktop.org
> > Cc: Deucher, Alexander ; Qin, Eddy
> >
> > Subject: Re: [PATCH] drm/amdgpu: clip the ref divider max value at 100
> >
> > Am 03.11.20 um 18:13 schrieb Shashank Sharma:
> >> This patch li
|frac fb_de^_p| | |
>>> +----+-+
>>>
>>> With ref_div_max value clipped at 100, AMDGPU driver can also drive
>>> videmode 2048x1280@60 (221Mhz) and produce proper output without any
>>> blanking and d
u/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -900,7 +900,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32
> domain,
> return -EINVAL;
>
> /* A shared bo cannot be migrated to VRAM */
> - if (bo->prime_s
On 01/02/21 8:53 pm, Christian König wrote:
> Am 01.02.21 um 16:13 schrieb Shashank Sharma:
>> On 01/02/21 8:39 pm, Christian König wrote:
>>> Am 01.02.21 um 16:06 schrieb Shashank Sharma:
>>>> Hello Christian,
>>>>
>>>> On 01/02/21 8:0
On 01/02/21 8:39 pm, Christian König wrote:
> Am 01.02.21 um 16:06 schrieb Shashank Sharma:
>> Hello Christian,
>>
>> On 01/02/21 8:04 pm, Christian König wrote:
>>> Some newer APUs can scanout directly from GTT, that saves us from
>>> allocating another bou
Hello Pekka,
On 30/04/21 15:13, Pekka Paalanen wrote:
> On Wed, 28 Apr 2021 13:24:27 +0530
> Shashank Sharma wrote:
>
>> Assuming these details, A compositor will look for DRM color properties like
>> these:
>>
>> 1. Degamma plane property : To make buffers
situation.
V2: Removed one extra line added in V1
Cc: Harry Wentland
Cc: Alex Deucher
Signed-off-by: Shashank Sharma
---
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 30 ++-
1 file changed, 29 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm
situation.
Cc: Harry Wentland
Cc: Alex Deucher
Signed-off-by: Shashank Sharma
---
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 30 ++-
1 file changed, 29 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
b/drivers/gpu/drm/amd
Hello Harry,
Many of us in the mail chain have discussed this before, on what is the right
way to blend and tone map a SDR and a HDR buffer from same/different color
spaces, and what kind of DRM plane properties will be needed.
As you can see from the previous comments, that the majority of
This patch checks the return value of the function
dc_link_add_remote_sink before using it. This was causing
a crash during consecutive hotplugs of DP MST displays.
Cc: Harry Wentland
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 5 +
1
fails for PRIME buffers.
So, this patch finally enables Freesync with PRIME buffer offloading.
Cc: Koenig Christian
Cc: Deucher Alexander
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers
Variable 'bp' seems to be unused residue from previous
logic, and is not required anymore.
Cc: Koenig Christian
Cc: Deucher Alexander
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/gpu/drm/amd
cards.
- Changed unsigned -> unsigned int to make checkpatch quiet.
V3: Apply the change on SI family (not only oland) (Christian)
Cc: Alex Deucher
Cc: Christian König
Cc: Eddy Qin
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c| 20 +---
driv
From: Shashank Sharma
This patch adds a new sysfs event, which will indicate
the userland about a GPU reset, and can also provide
some information like:
- which PID was involved in the GPU reset
- what was the GPU status (using flags)
This patch also introduces the first flag of the flags
From: Shashank Sharma
This patch adds a work function, which will get scheduled
in event of a GPU reset, and will send a uevent to user with
some reset context infomration, like a PID and some flags.
The userspace can do some recovery and post-processing work
based on this event.
V2:
- Changed
From: Shashank Sharma
This patch adds a new sysfs event, which will indicate
the userland about a GPU reset, and can also provide
some information like:
- process ID of the process involved with the GPU reset
- process name of the involved process
- the GPU status info (using flags)
This patch
From: Shashank Sharma
This patch adds a work function, which sends a GPU reset
uevent and some contextual infomration, like the PID and
some status flags. This work should be scheduled during
a GPU reset.
The userspace can do some recovery and post-processing work
based on this event
to index task_info from this
Xarray (similar to how it is being done for PASID to vm indexing).
- adds additional changes to support these changes.
Cc: Christian Koenig
Cc: Alex Deucher
Signed-off-by: Shashank Sharma
---
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 2 +-
drivers/gpu/drm/amd
On 07/09/2023 08:57, Christian König wrote:
Am 06.09.23 um 16:35 schrieb Shashank Sharma:
On 06/09/2023 16:25, Shashank Sharma wrote:
On 05/09/2023 08:04, Christian König wrote:
Testing for reset is pointless since the reset can start right
after the
test. Grab the reset semaphore
On 14/09/2023 09:45, Christian König wrote:
Am 08.09.23 um 18:04 schrieb Shashank Sharma:
A Memory queue descriptor (MQD) of a userqueue defines it in
the hw's context. As MQD format can vary between different
graphics IPs, we need gfx GEN specific handlers to create MQDs.
This patch
(Christian)
- Do not save the queue id/idr in queue itself (Christian)
- Move the idr allocation in the IP independent generic space
(Christian)
V6:
- Check the validity of input IP type (Christian)
Cc: Alex Deucher
Cc: Christian Koenig
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu
off-by: Shashank Sharma
Signed-off-by: Arvind Yadav
---
drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 16
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c| 77 +++
.../gpu/drm/amd/include/amdgpu_userqueue.h| 7 ++
3 files changed, 100 insertions(+)
diff --git a/drivers/gpu/
Koenig
Signed-off-by: Shashank Sharma
Signed-off-by: Arvind Yadav
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c| 61 +++
.../gpu/drm/amd/include/amdgpu_userqueue.h| 1 +
2 files changed, 62 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gpu
->proc/gang/fw_ctx_address variables and doing the
address calculations locally to keep the queue structure GEN
independent (Alex)
Cc: Alex Deucher
Cc: Christian Koenig
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 72 ++
1 f
: Alex Deucher
Cc: Christian Koenig
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 40 +++
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c| 1 +
.../gpu/drm/amd/include/amdgpu_userqueue.h| 1 +
3 files changed, 42 insertions(+)
diff --git
This patch adds code to cleanup any leftover userqueues which
a user might have missed to destroy due to a crash or any other
programming error.
Cc: Alex Deucher
Cc: Christian Koenig
Suggested-by: Bas Nieuwenhuizen
Signed-off-by: Bas Nieuwenhuizen
Signed-off-by: Shashank Sharma
---
drivers
or allocate from GART, but not both.
- All the handling must be done with the VM locks held.
Cc: Alex Deucher
Cc: Christian Koenig
Signed-off-by: Shashank Sharma
Signed-off-by: Arvind Yadav
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c| 81 +++
.../gpu/drm/amd/include
-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 6 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 40
-manager changes, which were published
here (targeted merged in V6.6):
https://patchwork.freedesktop.org/series/115802
Alex Deucher (1):
drm/amdgpu: UAPI for user queue management
Shashank Sharma (8):
drm/amdgpu: add usermode queue base code
drm/amdgpu: add new IOCTL for usermode queue
drm
Deucher
Signed-off-by: Shashank Sharma
---
include/uapi/drm/amdgpu_drm.h | 110 ++
1 file changed, 110 insertions(+)
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 79b14828d542..627b4a38c855 100644
--- a/include/uapi/drm
On 06/09/2023 16:25, Shashank Sharma wrote:
On 05/09/2023 08:04, Christian König wrote:
Testing for reset is pointless since the reset can start right after the
test. Grab the reset semaphore instead.
The same PASID can be used by more than once VMID, build a mask of VMIDs
to reset instead
On 05/09/2023 08:04, Christian König wrote:
Testing for reset is pointless since the reset can start right after the
test. Grab the reset semaphore instead.
The same PASID can be used by more than once VMID, build a mask of VMIDs
to reset instead of just restting the first one.
On 05/09/2023 08:04, Christian König wrote:
Testing for reset is pointless since the reset can start right after the
test. Grab the reset semaphore instead.
The same PASID can be used by more than once VMID, build a mask of VMIDs
to reset instead of just restting the first one.
isting get_task_info consumers.
Cc: Christian Koenig
Cc: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 4 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 28 +--
drivers/gpu/drm/amd/amdgpu/amdgpu
On 17/10/2023 09:34, Christian König wrote:
Am 17.10.23 um 09:25 schrieb Shashank Sharma:
Hello Christian, Felix,
Thanks for your comments, mine inline.
On 17/10/2023 07:55, Christian König wrote:
Am 17.10.23 um 00:15 schrieb Felix Kuehling:
On 2023-10-16 13:08, Shashank Sharma wrote
Hello Christian, Felix,
Thanks for your comments, mine inline.
On 17/10/2023 07:55, Christian König wrote:
Am 17.10.23 um 00:15 schrieb Felix Kuehling:
On 2023-10-16 13:08, Shashank Sharma wrote:
This patch does the following:
- moves vm->task_info struct to fpriv->task_info.
-
for gfx8
This patch is to adjust the absolute doorbell offset against the
doorbell id
considering the doorbell size of 32/64 bit.
v2:
- Addressed the review comment from Felix.
Cc: Christian Koenig
Cc: Alex Deucher
Signed-off-by: Shashank Sharma
Signed-off-by: Arvind Yadav
---
drivers/gpu/drm
On 14/09/2023 10:24, Shashank Sharma wrote:
On 14/09/2023 09:45, Christian König wrote:
Am 08.09.23 um 18:04 schrieb Shashank Sharma:
A Memory queue descriptor (MQD) of a userqueue defines it in
the hw's context. As MQD format can vary between different
graphics IPs, we need gfx GEN
On 28/09/2023 15:27, Alex Deucher wrote:
On Thu, Sep 28, 2023 at 9:22 AM Shashank Sharma wrote:
On 14/09/2023 10:24, Shashank Sharma wrote:
On 14/09/2023 09:45, Christian König wrote:
Am 08.09.23 um 18:04 schrieb Shashank Sharma:
A Memory queue descriptor (MQD) of a userqueue defines
On 28/09/2023 15:52, Alex Deucher wrote:
On Thu, Sep 28, 2023 at 9:40 AM Shashank Sharma wrote:
On 28/09/2023 15:27, Alex Deucher wrote:
On Thu, Sep 28, 2023 at 9:22 AM Shashank Sharma wrote:
On 14/09/2023 10:24, Shashank Sharma wrote:
On 14/09/2023 09:45, Christian König wrote:
Am
On 28/09/2023 20:53, Felix Kuehling wrote:
On 2023-09-28 11:38, Shashank Sharma wrote:
Hello Felix, Mukul,
On 28/09/2023 17:30, Felix Kuehling wrote:
On 2023-09-28 10:30, Joshi, Mukul wrote:
[AMD Official Use Only - General]
-Original Message-
From: Yadav, Arvind
Sent: Thursday
On 27/09/2023 19:27, Felix Kuehling wrote:
[+Mukul]
On 2023-09-27 12:16, Arvind Yadav wrote:
This patch is to adjust the absolute doorbell offset
against the doorbell id considering the doorbell
size of 32/64 bit.
Cc: Christian Koenig
Cc: Alex Deucher
Signed-off-by: Shashank Sharma
Signed
On 20/09/2023 17:21, Alex Deucher wrote:
On Fri, Sep 8, 2023 at 12:45 PM Shashank Sharma wrote:
The FW expects us to allocate at least one page as context
space to process gang, process, GDS and FW related work.
This patch creates a joint object for the same, and calculates
GPU space
On 04/10/2023 23:23, Felix Kuehling wrote:
On 2023-09-08 12:04, Shashank Sharma wrote:
From: Alex Deucher
This patch intorduces new UAPI/IOCTL for usermode graphics
queue. The userspace app will fill this structure and request
the graphics driver to add a graphics work queue
Hey Felix,
On 04/10/2023 23:34, Felix Kuehling wrote:
On 2023-09-18 06:32, Christian König wrote:
Am 08.09.23 um 18:04 schrieb Shashank Sharma:
To support oversubscription, MES FW expects WPTR BOs to
be mapped into GART, before they are submitted to usermode
queues. This patch adds
Deucher
Signed-off-by: Shashank Sharma
---
include/uapi/drm/amdgpu_drm.h | 110 ++
1 file changed, 110 insertions(+)
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index f477eda6a2b8..a508329ce70f 100644
--- a/include/uapi/drm
-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 6 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 40
: Alex Deucher
Cc: Christian Koenig
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 121 ++
.../gpu/drm/amd/include/amdgpu_userqueue.h| 2 +
3 files changed, 124 insertions(+)
diff --git
queue management
Shashank Sharma (11):
drm/amdgpu: add usermode queue base code
drm/amdgpu: add new IOCTL for usermode queue
drm/amdgpu: add helpers to create userqueue object
drm/amdgpu: create GFX-gen11 usermode queue
drm/amdgpu: create context space for usermode queue
drm/amdgpu: map
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 62 +++
.../gpu/drm/amd/include/amdgpu_userqueue.h| 13
2 files changed, 75 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
b/drivers/gpu/drm/amd/amdgpu
ead of uq_mgr (Alex)
- Use memdup_user instead of copy_from_user (Christian)
Cc: Alex Deucher
Cc: Christian Koenig
Signed-off-by: Shashank Sharma
Signed-off-by: Arvind Yadav
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 72 ++
1 file changed, 72 insertions(+)
diff --
to create/destroy userqueue objects.
- Removed FW object space allocation.
Cc: Alex Deucher
Cc: Christian Koenig
Signed-off-by: Shashank Sharma
Signed-off-by: Arvind Yadav
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c| 41 +++
.../gpu/drm/amd/include/amdgpu_userqueue.h
->proc/gang/fw_ctx_address variables and doing the
address calculations locally to keep the queue structure GEN
independent (Alex)
V7: Added R-B from Alex
Cc: Alex Deucher
Cc: Christian Koenig
Reviewed-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amd
Nieuwenhuizen
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 27 ++-
1 file changed, 20 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
index ec49c10f7511
off-by: Shashank Sharma
Signed-off-by: Arvind Yadav
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c| 76 +++
.../gpu/drm/amd/include/amdgpu_userqueue.h| 1 +
2 files changed, 77 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gpu/drm/amd/amd
: Added missing kfree for queue in error cases
Added Alex's R-B
Cc: Alex Deucher
Cc: Christian Koenig
Reviewed-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 58 +++
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c| 1
Cc: Christian Koenig
Cc: Felix Kuehling
Signed-off-by: Shashank Sharma
Signed-off-by: Arvind Yadav
---
drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 82 ++-
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c| 7 ++
.../gpu/drm/amd/include/amdgpu_userqueue.h| 15
3 files changed,
This patch blocks the amdgpu usermode queue IOCTL function until
a valid userspace client gets merged upstream. This patch must be
reverted as soon as we have the mesa-3D consumer stack available.
Cc: Alex Deucher
Cc: Christian Koenig
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd
On 17/08/2023 15:45, André Almeida wrote:
Hi Shashank,
Em 17/08/2023 03:41, Shashank Sharma escreveu:
Hello Andre,
On 15/08/2023 21:50, André Almeida wrote:
Instead of storing coredump information inside amdgpu_device struct,
move if to a proper separated struct and allocate it dynamically
On 17/08/2023 17:17, André Almeida wrote:
Em 17/08/2023 12:04, Shashank Sharma escreveu:
On 17/08/2023 15:45, André Almeida wrote:
Hi Shashank,
Em 17/08/2023 03:41, Shashank Sharma escreveu:
Hello Andre,
On 15/08/2023 21:50, André Almeida wrote:
Instead of storing coredump information
On 17/08/2023 17:38, André Almeida wrote:
Em 17/08/2023 12:26, Shashank Sharma escreveu:
On 17/08/2023 17:17, André Almeida wrote:
Em 17/08/2023 12:04, Shashank Sharma escreveu:
On 17/08/2023 15:45, André Almeida wrote:
Hi Shashank,
Em 17/08/2023 03:41, Shashank Sharma escreveu
Someone from MM should also confirm on this, but:
Acked-by: Shashank Sharma
On 21/08/2023 08:47, Arvind Yadav wrote:
This reverts commit 5ce71f59bb9bd3d8a09b96afdbc92975cb6dc303.
Reason for revert: New amdgpu_workload_profile* api is added
to switch on/off profile mode. These new api
uct amdgpu_coredump_info {
+ struct amdgpu_device*adev;
+ struct amdgpu_task_info reset_task_info;
+ struct timespec64 reset_time;
+ boolreset_vram_lost;
+};
+#endif
int amdgpu_reset_init(struct amdgpu_device
On 21/08/2023 16:12, Yadav, Arvind wrote:
On 8/21/2023 7:24 PM, Shashank Sharma wrote:
On 21/08/2023 15:35, Yadav, Arvind wrote:
On 8/21/2023 6:36 PM, Shashank Sharma wrote:
Hey Arvind,
On 21/08/2023 08:47, Arvind Yadav wrote:
The'struct amdgpu_smu_workload' initialization/cleanup
.
- Addressed review comment.
Cc: Shashank Sharma
Cc: Christian Koenig
Cc: Alex Deucher
Signed-off-by: Arvind Yadav
---
drivers/gpu/drm/amd/amdgpu/amdgpu_workload.c | 56 +++
drivers/gpu/drm/amd/include/amdgpu_workload.h | 3 +
2 files changed, 59 insertions(+)
diff --git
On 21/08/2023 08:47, Arvind Yadav wrote:
This patch adds a suspend function that will clear the GPU
power profile before going into suspend state.
v2:
- Add the new suspend function based on review comment.
Cc: Shashank Sharma
Cc: Christian Koenig
Cc: Alex Deucher
Signed-off-by: Arvind
On 21/08/2023 08:47, Arvind Yadav wrote:
This patch switches the GPU workload mode to/from
compute mode, while submitting compute workload.
Cc: Christian Koenig
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
Signed-off-by: Arvind Yadav
---
drivers/gpu/drm/amd/amdgpu
On 21/08/2023 08:47, Arvind Yadav wrote:
This patch is to switch the GPU workload profile based
on the submitted job. The workload profile is reset to
default when the job is done.
Cc: Shashank Sharma
Cc: Christian Koenig
Cc: Alex Deucher
Signed-off-by: Arvind Yadav
---
drivers/gpu/drm
+ Amar should be able to help.
Amar,
Can you please check this patch (series if required) with a few IGTs and
probably with Xonotic as well ?
Regards
Shashank
On 21/08/2023 13:03, Christian König wrote:
Am 20.08.23 um 11:51 schrieb Christophe JAILLET:
This serie simplifies
Hey Arvind,
On 21/08/2023 08:47, Arvind Yadav wrote:
The'struct amdgpu_smu_workload' initialization/cleanup
functions is added by this patch.
v2:
- Splitting big patch into separate patches.
- Added new fini function.
Cc: Shashank Sharma
Cc: Christian Koenig
Cc: Alex Deucher
Signed-off
comes within 100ms then the *_workload_profile_set function
will cancel this work and set the GPU power profile based on
preferences.
v2:
- Splitting workload_profile_set and workload_profile_put
into two separate patches.
- Addressed review comment.
Cc: Shashank Sharma
Cc: Christian
On 21/08/2023 15:35, Yadav, Arvind wrote:
On 8/21/2023 6:36 PM, Shashank Sharma wrote:
Hey Arvind,
On 21/08/2023 08:47, Arvind Yadav wrote:
The'struct amdgpu_smu_workload' initialization/cleanup
functions is added by this patch.
v2:
- Splitting big patch into separate patches.
- Added new
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