Signed-off-by: Harry Wentland <harry.wentl...@amd.com>
---
 drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_offset.h  | 2 ++
 drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_sh_mask.h | 3 +++
 2 files changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_offset.h 
b/drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_offset.h
index b39fb6821faa..3580218702ce 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_offset.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_offset.h
@@ -10361,6 +10361,8 @@
 #define mmUNIPHYG_CHANNEL_XBAR_CNTL_BASE_IDX                                   
                        2
 #define mmDCIO_WRCMD_DELAY                                                     
                        0x287e
 #define mmDCIO_WRCMD_DELAY_BASE_IDX                                            
                        2
+#define mmDC_PINSTRAPS                                                         
                        0x2880
+#define mmDC_PINSTRAPS_BASE_IDX                                                
                        2
 #define mmDC_DVODATA_CONFIG                                                    
                        0x2882
 #define mmDC_DVODATA_CONFIG_BASE_IDX                                           
                        2
 #define mmLVTMA_PWRSEQ_CNTL                                                    
                        0x2883
diff --git a/drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_sh_mask.h 
b/drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_sh_mask.h
index 1e98ce86ed19..ecbe5bfa989b 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_sh_mask.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_sh_mask.h
@@ -39956,6 +39956,9 @@
 #define DCIO_WRCMD_DELAY__DPHY_DELAY_MASK                                      
                               0x00000F00L
 #define DCIO_WRCMD_DELAY__DCRXPHY_DELAY_MASK                                   
                               0x0000F000L
 #define DCIO_WRCMD_DELAY__ZCAL_DELAY_MASK                                      
                               0x000F0000L
+//DC_PINSTRAPS
+#define DC_PINSTRAPS__DC_PINSTRAPS_AUDIO__SHIFT                                
                               0xe
+#define DC_PINSTRAPS__DC_PINSTRAPS_AUDIO_MASK                                  
                               0x0000C000L
 //DC_DVODATA_CONFIG
 #define DC_DVODATA_CONFIG__VIP_MUX_EN__SHIFT                                   
                               0x13
 #define DC_DVODATA_CONFIG__VIP_ALTER_MAPPING_EN__SHIFT                         
                               0x14
-- 
2.11.0

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