Re: [PATCH 3/8] drm/amd/pp: Delete is_smc_ram_running function on RV

[Alex Deucher]

On Wed, Mar 7, 2018 at 5:46 AM, Rex Zhu  wrote:
> 1. There is a race condition when another ip also use same register pairs
> 2. check once at boot up by GetDriverIfVersion message is sufficient
>to check SMU health. so delete is_smc_ram_running check.
>
> Change-Id: I3c5f5ebac36c1ae4a7dd72f482fc27a4f362975e
> Signed-off-by: Rex Zhu 

Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c | 27 
> 
>  1 file changed, 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c 
> b/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c
> index 6362d46..e6317fd 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c
> @@ -47,34 +47,10 @@
>  #define smnMP1_FIRMWARE_FLAGS   0x3010028
>
>
> -bool rv_is_smc_ram_running(struct pp_hwmgr *hwmgr)
> -{
> -   uint32_t mp1_fw_flags, reg;
> -
> -   reg = soc15_get_register_offset(NBIF_HWID, 0,
> -   mmPCIE_INDEX2_BASE_IDX, mmPCIE_INDEX2);
> -
> -   cgs_write_register(hwmgr->device, reg,
> -   (MP1_Public | (smnMP1_FIRMWARE_FLAGS & 0x)));
> -
> -   reg = soc15_get_register_offset(NBIF_HWID, 0,
> -   mmPCIE_DATA2_BASE_IDX, mmPCIE_DATA2);
> -
> -   mp1_fw_flags = cgs_read_register(hwmgr->device, reg);
> -
> -   if (mp1_fw_flags & MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK)
> -   return true;
> -
> -   return false;
> -}
> -
>  static uint32_t rv_wait_for_response(struct pp_hwmgr *hwmgr)
>  {
> uint32_t reg;
>
> -   if (!rv_is_smc_ram_running(hwmgr))
> -   return -EINVAL;
> -
> reg = soc15_get_register_offset(MP1_HWID, 0,
> mmMP1_SMN_C2PMSG_90_BASE_IDX, mmMP1_SMN_C2PMSG_90);
>
> @@ -89,9 +65,6 @@ int rv_send_msg_to_smc_without_waiting(struct pp_hwmgr 
> *hwmgr,
>  {
> uint32_t reg;
>
> -   if (!rv_is_smc_ram_running(hwmgr))
> -   return -EINVAL;
> -
> reg = soc15_get_register_offset(MP1_HWID, 0,
> mmMP1_SMN_C2PMSG_66_BASE_IDX, mmMP1_SMN_C2PMSG_66);
> cgs_write_register(hwmgr->device, reg, msg);
> --
> 1.9.1
>
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[PATCH 3/8] drm/amd/pp: Delete is_smc_ram_running function on RV

[Rex Zhu]

1. There is a race condition when another ip also use same register pairs
2. check once at boot up by GetDriverIfVersion message is sufficient
   to check SMU health. so delete is_smc_ram_running check.

Change-Id: I3c5f5ebac36c1ae4a7dd72f482fc27a4f362975e
Signed-off-by: Rex Zhu 
---
 drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c | 27 
 1 file changed, 27 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c 
b/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c
index 6362d46..e6317fd 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c
@@ -47,34 +47,10 @@
 #define smnMP1_FIRMWARE_FLAGS   0x3010028
 
 
-bool rv_is_smc_ram_running(struct pp_hwmgr *hwmgr)
-{
-   uint32_t mp1_fw_flags, reg;
-
-   reg = soc15_get_register_offset(NBIF_HWID, 0,
-   mmPCIE_INDEX2_BASE_IDX, mmPCIE_INDEX2);
-
-   cgs_write_register(hwmgr->device, reg,
-   (MP1_Public | (smnMP1_FIRMWARE_FLAGS & 0x)));
-
-   reg = soc15_get_register_offset(NBIF_HWID, 0,
-   mmPCIE_DATA2_BASE_IDX, mmPCIE_DATA2);
-
-   mp1_fw_flags = cgs_read_register(hwmgr->device, reg);
-
-   if (mp1_fw_flags & MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK)
-   return true;
-
-   return false;
-}
-
 static uint32_t rv_wait_for_response(struct pp_hwmgr *hwmgr)
 {
uint32_t reg;
 
-   if (!rv_is_smc_ram_running(hwmgr))
-   return -EINVAL;
-
reg = soc15_get_register_offset(MP1_HWID, 0,
mmMP1_SMN_C2PMSG_90_BASE_IDX, mmMP1_SMN_C2PMSG_90);
 
@@ -89,9 +65,6 @@ int rv_send_msg_to_smc_without_waiting(struct pp_hwmgr *hwmgr,
 {
uint32_t reg;
 
-   if (!rv_is_smc_ram_running(hwmgr))
-   return -EINVAL;
-
reg = soc15_get_register_offset(MP1_HWID, 0,
mmMP1_SMN_C2PMSG_66_BASE_IDX, mmMP1_SMN_C2PMSG_66);
cgs_write_register(hwmgr->device, reg, msg);
-- 
1.9.1

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