RE: [PATCH] drm/amd/amdgpu: fix incorrect translation about the PCIe MLW info

2019-03-20 Thread Xu, Feifei
is real X16. Could you give me some insight for this? BR, Jack Gui -Original Message- From: Alex Deucher Sent: Tuesday, March 19, 2019 10:43 PM To: Gui, Jack Cc: amd-gfx list Subject: Re: [PATCH] drm/amd/amdgpu: fix incorrect translation about the PCIe MLW info On Tue, Mar 19, 2019 at 12

RE: [PATCH] drm/amd/amdgpu: fix incorrect translation about the PCIe MLW info

2019-03-20 Thread Gui, Jack
. Could you give me some insight for this? BR, Jack Gui -Original Message- From: Alex Deucher Sent: Tuesday, March 19, 2019 10:43 PM To: Gui, Jack Cc: amd-gfx list Subject: Re: [PATCH] drm/amd/amdgpu: fix incorrect translation about the PCIe MLW info On Tue, Mar 19, 2019 at 12:26 AM

Re: [PATCH] drm/amd/amdgpu: fix incorrect translation about the PCIe MLW info

2019-03-19 Thread Alex Deucher
On Tue, Mar 19, 2019 at 12:26 AM Chengming Gui wrote: > > Max Link Width's full mask is 0x3f, > and it's highest bit express X16. > > Signed-off-by: Chengming Gui > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 ++-- > 1 file changed, 2 insertions(+), 10 deletions(-) > > diff