Re: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr (v3)
Yup. I misread your comment thinking there was another datastructure you'd rather I put the callback in. Cheers, Tom From: Deucher, Alexander Sent: Monday, September 19, 2016 11:55 To: StDenis, Tom; Alex Deucher Cc: amd-gfx list Subject: RE: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr (v3) No need. The additional cleanups can come later. Alex From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of StDenis, Tom Sent: Monday, September 19, 2016 11:55 AM To: Alex Deucher Cc: amd-gfx list Subject: Re: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr (v3) Hi Alex, Would you prefer I re-write #1 to avoid churn in the tree? Cheers, Tom From: Alex Deucher <alexdeuc...@gmail.com<mailto:alexdeuc...@gmail.com>> Sent: Monday, September 19, 2016 11:53 To: Tom St Denis Cc: amd-gfx list; StDenis, Tom Subject: Re: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr (v3) On Mon, Sep 19, 2016 at 9:10 AM, Tom St Denis <tstdeni...@gmail.com<mailto:tstdeni...@gmail.com>> wrote: > Provides standardized interface to read various sensors. > The API is extensible (by adding to the end of the > amd_pp_sensors enumeration list. > > Support has been added to Carrizo/smu7 > > (v2) Squashed the two sensor patches into one. > (v3) Updated to apply to smu7_hwmgr instead > > Signed-off-by: Tom St Denis <tom.stde...@amd.com<mailto:tom.stde...@amd.com>> > --- > drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 20 + > drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c| 96 > +++ > drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 36 + > drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 12 +++ > drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 + > 5 files changed, 165 insertions(+) > > diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > index b1d19409bf86..ee0368381e82 100644 > --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > @@ -894,6 +894,25 @@ static int pp_dpm_set_mclk_od(void *handle, uint32_t > value) > return hwmgr->hwmgr_func->set_mclk_od(hwmgr, value); > } > > +static int pp_dpm_read_sensor(void *handle, int idx, int32_t *value) > +{ > + struct pp_hwmgr *hwmgr; > + > + if (!handle) > + return -EINVAL; > + > + hwmgr = ((struct pp_instance *)handle)->hwmgr; > + > + PP_CHECK_HW(hwmgr); > + > + if (hwmgr->hwmgr_func->read_sensor == NULL) { > + printk(KERN_INFO "%s was not implemented.\n", __func__); > + return 0; > + } > + > + return hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value); > +} > + > const struct amd_powerplay_funcs pp_dpm_funcs = { > .get_temperature = pp_dpm_get_temperature, > .load_firmware = pp_dpm_load_fw, > @@ -920,6 +939,7 @@ const struct amd_powerplay_funcs pp_dpm_funcs = { > .set_sclk_od = pp_dpm_set_sclk_od, > .get_mclk_od = pp_dpm_get_mclk_od, > .set_mclk_od = pp_dpm_set_mclk_od, > + .read_sensor = pp_dpm_read_sensor, As a future patch it would be nice to hook up this sensor interface to the existing amdgpu_pm_info code and make that asic indpendent. Series is: Reviewed-by: Alex Deucher <alexander.deuc...@amd.com<mailto:alexander.deuc...@amd.com>> Alex > }; > > static int amd_pp_instance_init(struct amd_pp_init *pp_init, > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c > b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c > index 5ecef1732e20..9f3c5a8a903c 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c > @@ -1857,6 +1857,101 @@ static int cz_get_max_high_clocks(struct pp_hwmgr > *hwmgr, struct amd_pp_simple_c > return 0; > } > > +static int cz_read_sensor(struct pp_hwmgr *hwmgr, int idx, int32_t *value) > +{ > + struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend); > + > + struct phm_clock_voltage_dependency_table *table = > + hwmgr->dyn_state.vddc_dependency_on_sclk; > + > + struct phm_vce_clock_voltage_dependency_table *vce_table = > + hwmgr->dyn_state.vce_clock_voltage_dependency_table; > + > + struct phm_uvd_clock_voltage_dependency_table *uvd_table = > + hwmgr->dyn_state.uvd_clock_voltage_dependency_table; > + > + uint32_t sclk_index = > PHM_G
RE: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr (v3)
No need. The additional cleanups can come later. Alex From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of StDenis, Tom Sent: Monday, September 19, 2016 11:55 AM To: Alex Deucher Cc: amd-gfx list Subject: Re: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr (v3) Hi Alex, Would you prefer I re-write #1 to avoid churn in the tree? Cheers, Tom From: Alex Deucher <alexdeuc...@gmail.com<mailto:alexdeuc...@gmail.com>> Sent: Monday, September 19, 2016 11:53 To: Tom St Denis Cc: amd-gfx list; StDenis, Tom Subject: Re: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr (v3) On Mon, Sep 19, 2016 at 9:10 AM, Tom St Denis <tstdeni...@gmail.com<mailto:tstdeni...@gmail.com>> wrote: > Provides standardized interface to read various sensors. > The API is extensible (by adding to the end of the > amd_pp_sensors enumeration list. > > Support has been added to Carrizo/smu7 > > (v2) Squashed the two sensor patches into one. > (v3) Updated to apply to smu7_hwmgr instead > > Signed-off-by: Tom St Denis <tom.stde...@amd.com<mailto:tom.stde...@amd.com>> > --- > drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 20 + > drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c| 96 > +++ > drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 36 + > drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 12 +++ > drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 + > 5 files changed, 165 insertions(+) > > diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > index b1d19409bf86..ee0368381e82 100644 > --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > @@ -894,6 +894,25 @@ static int pp_dpm_set_mclk_od(void *handle, uint32_t > value) > return hwmgr->hwmgr_func->set_mclk_od(hwmgr, value); > } > > +static int pp_dpm_read_sensor(void *handle, int idx, int32_t *value) > +{ > + struct pp_hwmgr *hwmgr; > + > + if (!handle) > + return -EINVAL; > + > + hwmgr = ((struct pp_instance *)handle)->hwmgr; > + > + PP_CHECK_HW(hwmgr); > + > + if (hwmgr->hwmgr_func->read_sensor == NULL) { > + printk(KERN_INFO "%s was not implemented.\n", __func__); > + return 0; > + } > + > + return hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value); > +} > + > const struct amd_powerplay_funcs pp_dpm_funcs = { > .get_temperature = pp_dpm_get_temperature, > .load_firmware = pp_dpm_load_fw, > @@ -920,6 +939,7 @@ const struct amd_powerplay_funcs pp_dpm_funcs = { > .set_sclk_od = pp_dpm_set_sclk_od, > .get_mclk_od = pp_dpm_get_mclk_od, > .set_mclk_od = pp_dpm_set_mclk_od, > + .read_sensor = pp_dpm_read_sensor, As a future patch it would be nice to hook up this sensor interface to the existing amdgpu_pm_info code and make that asic indpendent. Series is: Reviewed-by: Alex Deucher <alexander.deuc...@amd.com<mailto:alexander.deuc...@amd.com>> Alex > }; > > static int amd_pp_instance_init(struct amd_pp_init *pp_init, > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c > b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c > index 5ecef1732e20..9f3c5a8a903c 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c > @@ -1857,6 +1857,101 @@ static int cz_get_max_high_clocks(struct pp_hwmgr > *hwmgr, struct amd_pp_simple_c > return 0; > } > > +static int cz_read_sensor(struct pp_hwmgr *hwmgr, int idx, int32_t *value) > +{ > + struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend); > + > + struct phm_clock_voltage_dependency_table *table = > + hwmgr->dyn_state.vddc_dependency_on_sclk; > + > + struct phm_vce_clock_voltage_dependency_table *vce_table = > + hwmgr->dyn_state.vce_clock_voltage_dependency_table; > + > + struct phm_uvd_clock_voltage_dependency_table *uvd_table = > + hwmgr->dyn_state.uvd_clock_voltage_dependency_table; > + > + uint32_t sclk_index = > PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, > ixTARGET_AND_CURRENT_PROFILE_INDEX), > + TARGET_AND_CURRENT_PROFILE_INDEX, > CURR_SCLK_INDEX); > + uint32_t uvd_index = > PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, > ixTARGET_AND_CURRENT_PROFILE_INDEX_2), > +
Re: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr (v3)
Hi Alex, Would you prefer I re-write #1 to avoid churn in the tree? Cheers, Tom From: Alex Deucher <alexdeuc...@gmail.com> Sent: Monday, September 19, 2016 11:53 To: Tom St Denis Cc: amd-gfx list; StDenis, Tom Subject: Re: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr (v3) On Mon, Sep 19, 2016 at 9:10 AM, Tom St Denis <tstdeni...@gmail.com> wrote: > Provides standardized interface to read various sensors. > The API is extensible (by adding to the end of the > amd_pp_sensors enumeration list. > > Support has been added to Carrizo/smu7 > > (v2) Squashed the two sensor patches into one. > (v3) Updated to apply to smu7_hwmgr instead > > Signed-off-by: Tom St Denis <tom.stde...@amd.com> > --- > drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 20 + > drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c| 96 > +++ > drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 36 + > drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 12 +++ > drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 + > 5 files changed, 165 insertions(+) > > diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > index b1d19409bf86..ee0368381e82 100644 > --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > @@ -894,6 +894,25 @@ static int pp_dpm_set_mclk_od(void *handle, uint32_t > value) > return hwmgr->hwmgr_func->set_mclk_od(hwmgr, value); > } > > +static int pp_dpm_read_sensor(void *handle, int idx, int32_t *value) > +{ > + struct pp_hwmgr *hwmgr; > + > + if (!handle) > + return -EINVAL; > + > + hwmgr = ((struct pp_instance *)handle)->hwmgr; > + > + PP_CHECK_HW(hwmgr); > + > + if (hwmgr->hwmgr_func->read_sensor == NULL) { > + printk(KERN_INFO "%s was not implemented.\n", __func__); > + return 0; > + } > + > + return hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value); > +} > + > const struct amd_powerplay_funcs pp_dpm_funcs = { > .get_temperature = pp_dpm_get_temperature, > .load_firmware = pp_dpm_load_fw, > @@ -920,6 +939,7 @@ const struct amd_powerplay_funcs pp_dpm_funcs = { > .set_sclk_od = pp_dpm_set_sclk_od, > .get_mclk_od = pp_dpm_get_mclk_od, > .set_mclk_od = pp_dpm_set_mclk_od, > + .read_sensor = pp_dpm_read_sensor, As a future patch it would be nice to hook up this sensor interface to the existing amdgpu_pm_info code and make that asic indpendent. Series is: Reviewed-by: Alex Deucher <alexander.deuc...@amd.com> Alex > }; > > static int amd_pp_instance_init(struct amd_pp_init *pp_init, > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c > b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c > index 5ecef1732e20..9f3c5a8a903c 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c > @@ -1857,6 +1857,101 @@ static int cz_get_max_high_clocks(struct pp_hwmgr > *hwmgr, struct amd_pp_simple_c > return 0; > } > > +static int cz_read_sensor(struct pp_hwmgr *hwmgr, int idx, int32_t *value) > +{ > + struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend); > + > + struct phm_clock_voltage_dependency_table *table = > + hwmgr->dyn_state.vddc_dependency_on_sclk; > + > + struct phm_vce_clock_voltage_dependency_table *vce_table = > + hwmgr->dyn_state.vce_clock_voltage_dependency_table; > + > + struct phm_uvd_clock_voltage_dependency_table *uvd_table = > + hwmgr->dyn_state.uvd_clock_voltage_dependency_table; > + > + uint32_t sclk_index = > PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, > ixTARGET_AND_CURRENT_PROFILE_INDEX), > + TARGET_AND_CURRENT_PROFILE_INDEX, > CURR_SCLK_INDEX); > + uint32_t uvd_index = > PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, > ixTARGET_AND_CURRENT_PROFILE_INDEX_2), > + TARGET_AND_CURRENT_PROFILE_INDEX_2, > CURR_UVD_INDEX); > + uint32_t vce_index = > PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, > ixTARGET_AND_CURRENT_PROFILE_INDEX_2), > + TARGET_AND_CURRENT_PROFILE_INDEX_2, > CURR_VCE_INDEX); > + > + uint32_t sclk, vclk, dclk, ecclk, tmp, activity_percent; > + uint16_t vddnb, vddgfx; > + int result; &g
Re: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr (v3)
On Mon, Sep 19, 2016 at 9:10 AM, Tom St Deniswrote: > Provides standardized interface to read various sensors. > The API is extensible (by adding to the end of the > amd_pp_sensors enumeration list. > > Support has been added to Carrizo/smu7 > > (v2) Squashed the two sensor patches into one. > (v3) Updated to apply to smu7_hwmgr instead > > Signed-off-by: Tom St Denis > --- > drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 20 + > drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c| 96 > +++ > drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 36 + > drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 12 +++ > drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 + > 5 files changed, 165 insertions(+) > > diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > index b1d19409bf86..ee0368381e82 100644 > --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > @@ -894,6 +894,25 @@ static int pp_dpm_set_mclk_od(void *handle, uint32_t > value) > return hwmgr->hwmgr_func->set_mclk_od(hwmgr, value); > } > > +static int pp_dpm_read_sensor(void *handle, int idx, int32_t *value) > +{ > + struct pp_hwmgr *hwmgr; > + > + if (!handle) > + return -EINVAL; > + > + hwmgr = ((struct pp_instance *)handle)->hwmgr; > + > + PP_CHECK_HW(hwmgr); > + > + if (hwmgr->hwmgr_func->read_sensor == NULL) { > + printk(KERN_INFO "%s was not implemented.\n", __func__); > + return 0; > + } > + > + return hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value); > +} > + > const struct amd_powerplay_funcs pp_dpm_funcs = { > .get_temperature = pp_dpm_get_temperature, > .load_firmware = pp_dpm_load_fw, > @@ -920,6 +939,7 @@ const struct amd_powerplay_funcs pp_dpm_funcs = { > .set_sclk_od = pp_dpm_set_sclk_od, > .get_mclk_od = pp_dpm_get_mclk_od, > .set_mclk_od = pp_dpm_set_mclk_od, > + .read_sensor = pp_dpm_read_sensor, As a future patch it would be nice to hook up this sensor interface to the existing amdgpu_pm_info code and make that asic indpendent. Series is: Reviewed-by: Alex Deucher Alex > }; > > static int amd_pp_instance_init(struct amd_pp_init *pp_init, > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c > b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c > index 5ecef1732e20..9f3c5a8a903c 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c > @@ -1857,6 +1857,101 @@ static int cz_get_max_high_clocks(struct pp_hwmgr > *hwmgr, struct amd_pp_simple_c > return 0; > } > > +static int cz_read_sensor(struct pp_hwmgr *hwmgr, int idx, int32_t *value) > +{ > + struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend); > + > + struct phm_clock_voltage_dependency_table *table = > + hwmgr->dyn_state.vddc_dependency_on_sclk; > + > + struct phm_vce_clock_voltage_dependency_table *vce_table = > + hwmgr->dyn_state.vce_clock_voltage_dependency_table; > + > + struct phm_uvd_clock_voltage_dependency_table *uvd_table = > + hwmgr->dyn_state.uvd_clock_voltage_dependency_table; > + > + uint32_t sclk_index = > PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, > ixTARGET_AND_CURRENT_PROFILE_INDEX), > + TARGET_AND_CURRENT_PROFILE_INDEX, > CURR_SCLK_INDEX); > + uint32_t uvd_index = > PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, > ixTARGET_AND_CURRENT_PROFILE_INDEX_2), > + TARGET_AND_CURRENT_PROFILE_INDEX_2, > CURR_UVD_INDEX); > + uint32_t vce_index = > PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, > ixTARGET_AND_CURRENT_PROFILE_INDEX_2), > + TARGET_AND_CURRENT_PROFILE_INDEX_2, > CURR_VCE_INDEX); > + > + uint32_t sclk, vclk, dclk, ecclk, tmp, activity_percent; > + uint16_t vddnb, vddgfx; > + int result; > + > + switch (idx) { > + case AMDGPU_PP_SENSOR_GFX_SCLK: > + if (sclk_index < NUM_SCLK_LEVELS) { > + sclk = table->entries[sclk_index].clk; > + *value = sclk; > + return 0; > + } > + return -EINVAL; > + case AMDGPU_PP_SENSOR_VDDNB: > + tmp = (cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, > ixSMUSVI_NB_CURRENTVID) & > + CURRENT_NB_VID_MASK) >> CURRENT_NB_VID__SHIFT; > + vddnb = cz_convert_8Bit_index_to_voltage(hwmgr, tmp); > + *value = vddnb; > + return 0; > + case AMDGPU_PP_SENSOR_VDDGFX: > +