RE: [PATCH 1/8] drm/amdgpu: move dpm related definitions to amdgpu_dpm.h

[Zhu, Rex]

Patch3-8 are Reviewed-by: Rex Zhu <rex@amd.com>

Best Regards
Rex

-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of 
Christian König
Sent: Thursday, October 13, 2016 3:15 PM
To: Alex Deucher; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: Re: [PATCH 1/8] drm/amdgpu: move dpm related definitions to 
amdgpu_dpm.h

Am 12.10.2016 um 23:12 schrieb Alex Deucher:
> No intended functional change.
>
> Reviewed-by: Christian König <christian.koe...@amd.com>
> Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>

For the newer versions and where still missing in this series the patches are 
Reviewed-by: Christian König <christian.koe...@amd.com>.

Christian.

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h | 449 
> +---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h | 447 
> +++
>   2 files changed, 448 insertions(+), 448 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index fa99c0d..e6f86b8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -57,6 +57,7 @@
>   #include "amdgpu_ring.h"
>   #include "amdgpu_vm.h"
>   #include "amd_powerplay.h"
> +#include "amdgpu_dpm.h"
>   #include "amdgpu_acp.h"
>   
>   #include "gpu_scheduler.h"
> @@ -973,354 +974,6 @@ struct amdgpu_wb {
>   int amdgpu_wb_get(struct amdgpu_device *adev, u32 *wb);
>   void amdgpu_wb_free(struct amdgpu_device *adev, u32 wb);
>   
> -
> -
> -enum amdgpu_int_thermal_type {
> - THERMAL_TYPE_NONE,
> - THERMAL_TYPE_EXTERNAL,
> - THERMAL_TYPE_EXTERNAL_GPIO,
> - THERMAL_TYPE_RV6XX,
> - THERMAL_TYPE_RV770,
> - THERMAL_TYPE_ADT7473_WITH_INTERNAL,
> - THERMAL_TYPE_EVERGREEN,
> - THERMAL_TYPE_SUMO,
> - THERMAL_TYPE_NI,
> - THERMAL_TYPE_SI,
> - THERMAL_TYPE_EMC2103_WITH_INTERNAL,
> - THERMAL_TYPE_CI,
> - THERMAL_TYPE_KV,
> -};
> -
> -enum amdgpu_dpm_auto_throttle_src {
> - AMDGPU_DPM_AUTO_THROTTLE_SRC_THERMAL,
> - AMDGPU_DPM_AUTO_THROTTLE_SRC_EXTERNAL
> -};
> -
> -enum amdgpu_dpm_event_src {
> - AMDGPU_DPM_EVENT_SRC_ANALOG = 0,
> - AMDGPU_DPM_EVENT_SRC_EXTERNAL = 1,
> - AMDGPU_DPM_EVENT_SRC_DIGITAL = 2,
> - AMDGPU_DPM_EVENT_SRC_ANALOG_OR_EXTERNAL = 3,
> - AMDGPU_DPM_EVENT_SRC_DIGIAL_OR_EXTERNAL = 4
> -};
> -
> -#define AMDGPU_MAX_VCE_LEVELS 6
> -
> -enum amdgpu_vce_level {
> - AMDGPU_VCE_LEVEL_AC_ALL = 0, /* AC, All cases */
> - AMDGPU_VCE_LEVEL_DC_EE = 1,  /* DC, entropy encoding */
> - AMDGPU_VCE_LEVEL_DC_LL_LOW = 2,  /* DC, low latency queue, res <= 720 */
> - AMDGPU_VCE_LEVEL_DC_LL_HIGH = 3, /* DC, low latency queue, 1080 >= res 
> > 720 */
> - AMDGPU_VCE_LEVEL_DC_GP_LOW = 4,  /* DC, general purpose queue, res <= 
> 720 */
> - AMDGPU_VCE_LEVEL_DC_GP_HIGH = 5, /* DC, general purpose queue, 1080 >= 
> res > 720 */
> -};
> -
> -struct amdgpu_ps {
> - u32 caps; /* vbios flags */
> - u32 class; /* vbios flags */
> - u32 class2; /* vbios flags */
> - /* UVD clocks */
> - u32 vclk;
> - u32 dclk;
> - /* VCE clocks */
> - u32 evclk;
> - u32 ecclk;
> - bool vce_active;
> - enum amdgpu_vce_level vce_level;
> - /* asic priv */
> - void *ps_priv;
> -};
> -
> -struct amdgpu_dpm_thermal {
> - /* thermal interrupt work */
> - struct work_struct work;
> - /* low temperature threshold */
> - intmin_temp;
> - /* high temperature threshold */
> - intmax_temp;
> - /* was last interrupt low to high or high to low */
> - bool   high_to_low;
> - /* interrupt source */
> - struct amdgpu_irq_src   irq;
> -};
> -
> -enum amdgpu_clk_action
> -{
> - AMDGPU_SCLK_UP = 1,
> - AMDGPU_SCLK_DOWN
> -};
> -
> -struct amdgpu_blacklist_clocks
> -{
> - u32 sclk;
> - u32 mclk;
> - enum amdgpu_clk_action action;
> -};
> -
> -struct amdgpu_clock_and_voltage_limits {
> - u32 sclk;
> - u32 mclk;
> - u16 vddc;
> - u16 vddci;
> -};
> -
> -struct amdgpu_clock_array {
> - u32 count;
> - u32 *values;
> -};
> -
> -struct amdgpu_clock_voltage_dependency_entry {
> - u32 clk;
> - u16 v;
> -};
> -
> -struct amdgpu_clock_voltage_dependency_table {
> - u32 count;
> - struct amdgpu_clock_voltage_dependency_entry *entries;
> -};
> -
> -union amdgpu_cac_leakage_ent

Re: [PATCH 1/8] drm/amdgpu: move dpm related definitions to amdgpu_dpm.h

[Christian König]

Am 12.10.2016 um 23:12 schrieb Alex Deucher:

No intended functional change.

Reviewed-by: Christian König 
Signed-off-by: Alex Deucher 


For the newer versions and where still missing in this series the 
patches are Reviewed-by: Christian König .


Christian.


---
  drivers/gpu/drm/amd/amdgpu/amdgpu.h | 449 +---
  drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h | 447 +++
  2 files changed, 448 insertions(+), 448 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index fa99c0d..e6f86b8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -57,6 +57,7 @@
  #include "amdgpu_ring.h"
  #include "amdgpu_vm.h"
  #include "amd_powerplay.h"
+#include "amdgpu_dpm.h"
  #include "amdgpu_acp.h"
  
  #include "gpu_scheduler.h"

@@ -973,354 +974,6 @@ struct amdgpu_wb {
  int amdgpu_wb_get(struct amdgpu_device *adev, u32 *wb);
  void amdgpu_wb_free(struct amdgpu_device *adev, u32 wb);
  
-

-
-enum amdgpu_int_thermal_type {
-   THERMAL_TYPE_NONE,
-   THERMAL_TYPE_EXTERNAL,
-   THERMAL_TYPE_EXTERNAL_GPIO,
-   THERMAL_TYPE_RV6XX,
-   THERMAL_TYPE_RV770,
-   THERMAL_TYPE_ADT7473_WITH_INTERNAL,
-   THERMAL_TYPE_EVERGREEN,
-   THERMAL_TYPE_SUMO,
-   THERMAL_TYPE_NI,
-   THERMAL_TYPE_SI,
-   THERMAL_TYPE_EMC2103_WITH_INTERNAL,
-   THERMAL_TYPE_CI,
-   THERMAL_TYPE_KV,
-};
-
-enum amdgpu_dpm_auto_throttle_src {
-   AMDGPU_DPM_AUTO_THROTTLE_SRC_THERMAL,
-   AMDGPU_DPM_AUTO_THROTTLE_SRC_EXTERNAL
-};
-
-enum amdgpu_dpm_event_src {
-   AMDGPU_DPM_EVENT_SRC_ANALOG = 0,
-   AMDGPU_DPM_EVENT_SRC_EXTERNAL = 1,
-   AMDGPU_DPM_EVENT_SRC_DIGITAL = 2,
-   AMDGPU_DPM_EVENT_SRC_ANALOG_OR_EXTERNAL = 3,
-   AMDGPU_DPM_EVENT_SRC_DIGIAL_OR_EXTERNAL = 4
-};
-
-#define AMDGPU_MAX_VCE_LEVELS 6
-
-enum amdgpu_vce_level {
-   AMDGPU_VCE_LEVEL_AC_ALL = 0, /* AC, All cases */
-   AMDGPU_VCE_LEVEL_DC_EE = 1,  /* DC, entropy encoding */
-   AMDGPU_VCE_LEVEL_DC_LL_LOW = 2,  /* DC, low latency queue, res <= 720 */
-   AMDGPU_VCE_LEVEL_DC_LL_HIGH = 3, /* DC, low latency queue, 1080 >= res 
> 720 */
-   AMDGPU_VCE_LEVEL_DC_GP_LOW = 4,  /* DC, general purpose queue, res <= 
720 */
-   AMDGPU_VCE_LEVEL_DC_GP_HIGH = 5, /* DC, general purpose queue, 1080 >= res 
> 720 */
-};
-
-struct amdgpu_ps {
-   u32 caps; /* vbios flags */
-   u32 class; /* vbios flags */
-   u32 class2; /* vbios flags */
-   /* UVD clocks */
-   u32 vclk;
-   u32 dclk;
-   /* VCE clocks */
-   u32 evclk;
-   u32 ecclk;
-   bool vce_active;
-   enum amdgpu_vce_level vce_level;
-   /* asic priv */
-   void *ps_priv;
-};
-
-struct amdgpu_dpm_thermal {
-   /* thermal interrupt work */
-   struct work_struct work;
-   /* low temperature threshold */
-   intmin_temp;
-   /* high temperature threshold */
-   intmax_temp;
-   /* was last interrupt low to high or high to low */
-   bool   high_to_low;
-   /* interrupt source */
-   struct amdgpu_irq_src   irq;
-};
-
-enum amdgpu_clk_action
-{
-   AMDGPU_SCLK_UP = 1,
-   AMDGPU_SCLK_DOWN
-};
-
-struct amdgpu_blacklist_clocks
-{
-   u32 sclk;
-   u32 mclk;
-   enum amdgpu_clk_action action;
-};
-
-struct amdgpu_clock_and_voltage_limits {
-   u32 sclk;
-   u32 mclk;
-   u16 vddc;
-   u16 vddci;
-};
-
-struct amdgpu_clock_array {
-   u32 count;
-   u32 *values;
-};
-
-struct amdgpu_clock_voltage_dependency_entry {
-   u32 clk;
-   u16 v;
-};
-
-struct amdgpu_clock_voltage_dependency_table {
-   u32 count;
-   struct amdgpu_clock_voltage_dependency_entry *entries;
-};
-
-union amdgpu_cac_leakage_entry {
-   struct {
-   u16 vddc;
-   u32 leakage;
-   };
-   struct {
-   u16 vddc1;
-   u16 vddc2;
-   u16 vddc3;
-   };
-};
-
-struct amdgpu_cac_leakage_table {
-   u32 count;
-   union amdgpu_cac_leakage_entry *entries;
-};
-
-struct amdgpu_phase_shedding_limits_entry {
-   u16 voltage;
-   u32 sclk;
-   u32 mclk;
-};
-
-struct amdgpu_phase_shedding_limits_table {
-   u32 count;
-   struct amdgpu_phase_shedding_limits_entry *entries;
-};
-
-struct amdgpu_uvd_clock_voltage_dependency_entry {
-   u32 vclk;
-   u32 dclk;
-   u16 v;
-};
-
-struct amdgpu_uvd_clock_voltage_dependency_table {
-   u8 count;
-   struct amdgpu_uvd_clock_voltage_dependency_entry *entries;
-};
-
-struct amdgpu_vce_clock_voltage_dependency_entry {
-   u32 ecclk;
-   u32 evclk;
-   u16 v;
-};
-
-struct amdgpu_vce_clock_voltage_dependency_table {
-   u8 count;
-   struct amdgpu_vce_clock_voltage_dependency_entry *entries;