On Sat, 2019-05-25 at 21:27 +1000, Allan McRae via arch-dev-public wrote:
> On 25/5/19 9:19 pm, Bruno Pagani via arch-dev-public wrote:
> > Hi,
> >
> > Le 25/05/2019 à 02:17, Filipe Laíns via arch-dev-public a écrit :
> > > I would also like to explore the idea of adding an "high performance"
> >
On Sat, 2019-05-25 at 13:19 +0200, Bruno Pagani via arch-dev-public wrote:
> Hi,
>
> Le 25/05/2019 à 02:17, Filipe Laíns via arch-dev-public a écrit :
> > I would also like to explore the idea of adding an "high performance"
> > architecture which would be able to make use of SSE{,2,3,4,4.1,4.2}
On 25/5/19 9:34 pm, Bruno Pagani wrote:
> Out of curiosity, what did you rebuild of [core] lead to?
I had a potentially slightly faster system for a week... It was mainly
a test to see if I spotted some build issues of test suite failures
beyond what is seen for x86_64. All was good.
A
Le 25/05/2019 à 13:27, Allan McRae via arch-dev-public a écrit :
> On 25/5/19 9:19 pm, Bruno Pagani via arch-dev-public wrote:
>> Hi,
>>
>> Le 25/05/2019 à 02:17, Filipe Laíns via arch-dev-public a écrit :
>>> I would also like to explore the idea of adding an "high performance"
>>> architecture
On 25/5/19 9:19 pm, Bruno Pagani via arch-dev-public wrote:
> Hi,
>
> Le 25/05/2019 à 02:17, Filipe Laíns via arch-dev-public a écrit :
>> I would also like to explore the idea of adding an "high performance"
>> architecture which would be able to make use of SSE{,2,3,4,4.1,4.2} and
>> AVX, which
On 25/5/19 5:22 pm, Lukas Jirkovsky via arch-dev-public wrote:
> On Sat, 25 May 2019 at 04:27, Filipe Laíns via arch-dev-public
> wrote:
>> Setting `-mtune` to generic won't add any additional instruction sets
>> by itself, but it does not prevent instruction sets from being added.
>> Looks like
Hi,
Le 25/05/2019 à 02:17, Filipe Laíns via arch-dev-public a écrit :
> I would also like to explore the idea of adding an "high performance"
> architecture which would be able to make use of SSE{,2,3,4,4.1,4.2} and
> AVX, which seem to be the standard for newer processors (>=2013). This
> would
On Sat, 25 May 2019 at 04:27, Filipe Laíns via arch-dev-public
wrote:
> Setting `-mtune` to generic won't add any additional instruction sets
> by itself, but it does not prevent instruction sets from being added.
> Looks like GCC enables MMX, SSE and SSE2 by default, it isn't related
> at all to
On Sat, 2019-05-25 at 10:35 +1000, Allan McRae wrote:
> On 25/5/19 10:17 am, Filipe Laíns via arch-dev-public wrote:
> > Hello,
> >
> > Currently there are no guidelines stating which x86 extensions (ex.
> > SSE2, SEE3, SSE4, AVX, etc.) we support. This is a bit problematic
> > since it lets
On 25/5/19 10:17 am, Filipe Laíns via arch-dev-public wrote:
> Hello,
>
> Currently there are no guidelines stating which x86 extensions (ex.
> SSE2, SEE3, SSE4, AVX, etc.) we support. This is a bit problematic
> since it lets compilers do what they want and possible generate code
> that can't
Hello,
Currently there are no guidelines stating which x86 extensions (ex.
SSE2, SEE3, SSE4, AVX, etc.) we support. This is a bit problematic
since it lets compilers do what they want and possible generate code
that can't run on some systems.
Even though this is an issue, it's not complete
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