On Sun, Jul 24, 2016 at 6:03 PM, Jonathan Mizrahi wrote:
> When I tried this, Vivado failed to build the bit file. On further
> examination, it looked like I couldn't request any LED above 3. I see 8 user
> leds specified in /migen/build/platforms/kc705.py, and I see the first two
> being used
A documentation request for example code demonstrating how to do this
was requested in #270.
---
Joe Britton
Sensors and Electron Devices
Army Research Lab
2800 Powder Mill Rd
Adelphi, MD 20783
301-394-3130
joseph.w.britton5@mail.mil
On Sun, Jul 24, 2016 at 12:03 PM, Jonathan Mizrahi wro
On Tuesday, July 26, 2016 06:20 AM, j arl wrote:
Kintex UltraScale SYSMONE1 interface supports digitization of 4 power
supply voltages and up to 17 external analog signals. The resulting
data can be readout by FPGA (DRP), exposed to MMC using I2C and
readout using JTAG.
My read of the docs indic
