On 11/05/2014 11:53 AM, Britton, Joe wrote:
> I had not noticed this discrepancy between p 29 and p 33 of the
> AD9914 Data Sheet. Indeed the 100 MBps rate is slower than one would
> guess just adding up the required delays in Table 12. Daniel, do you
> understand this?
We both got this wrong. It'
> > The time to write an 8 bit word to the DDS is 1+3.8+2.1+3.8+10.5 ns =
> > 21.2 ns. From Table 13 of the AD9914 Data Sheet.
>
> It seems there are further limitations when using the register programming
> mode. Page 29 says:
> "The parallel mode allows the user to write to the device registers
On 11/05/2014 06:44 AM, Joe Britton wrote:
> Why do you anticipate this taking so long (>1000 ns)? It looks like the
> AD9914 can be written far faster.
The other operations. As explained in a previous email thread, a RTIO
transition takes ~1 microsecond to program, and a DDS programming takes
two
>
> > 1. If a DDS frequency needs to be changed, how long would it
> > take to load the required data for reprogramming into the output
> > queue of the RTIO core? Let’s assume we need to change freq, phase,
> > and amplitude – thus 64 bits sent over an 8 bit parallel bus to the
> > DDS board
On 10/30/2014 03:29 AM, Slichter, Daniel H. wrote:
> 1. If a DDS frequency needs to be changed, how long would it
> take to load the required data for reprogramming into the output
> queue of the RTIO core? Let’s assume we need to change freq, phase,
> and amplitude – thus 64 bits sent ove
Hi all,
Just wanted to give an update on the DDS/TTL breakout hardware discussion we
had yesterday afternoon. I am going to make some boards, modified versions of
what the clock team is using, to give us DDSs and TTLs for the KC705. The
summary of what was discussed and agreed upon yesterday
