Did send an email to Peter...with some documents I did write using that tool.
Hi Steve,
Thx for the input. Right. Yes, I know about the idea to have a macro to
align to a 256 bytes boundary.
Philippe
Hi Paul,
Thx much for the input.
ref:Is LOCTR a help?
Actually, I got nicely some infos from Martin T, about LOCTR possible use in
such case, this can be found at
http://www.pi-sysprog.de/free/makerel.html
Philippe
Hi Abe,
Very good point, about old processors. Thx much Philippe
Hi Steve,
Thx for the additional infos relating some similar experience you got. Philippe
Hi Aldo,
Thx much for the input. Unfortunately I cannot for that project to implement
Baseless processing therefore I cannot use EXRL instruction. Point is to keep
the target of the execute is in a I-bank cache line, to be ok.
regards Philippe
Hi Steve,
Thx for your input, yes this is my understanding of the process.
Philippe
Martin,
Thx for the input. Unfortunately for current project I am working on, to
convert old asm programs to Baseless processing is NOT an option, there is no
time and no budget to :) .
Later
Philippe
Hi Rob,
ref:It's in the same cache line or it's not.
Actually this was exactly my point and I was confused about seen various coding
approaches to reach that purpose to optimize
as much as possible CPU use.
later
Philippe
Hi,
My understanding is, we should keep as closest as possible, the EXECUTE
instruction and its target instruction...EXECUTE instruction being greedy
enough in term of CPU use...to be clear dozens of Cycles needed to complete its
execution.
Reviewing old Assembler programs, I guess I am
No way to register, by clicking on URL...not found lol
On Wed, Nov 16, 2016 at 4:51 PM, Ed Jaffe
wrote:
> The z/OS Bug Busterz SHARE Academy in Atlanta was a tremendous success,
> but there was room for more attendees.
>
> Many folks complained to me throughout the
Hi Pieter,
Yes I did figure out that to use of MF=E/L or SF=E/L will help to avoid the
SIIS scenario for IBM Macros.
Thx much for your input have a good day Philippe
Hi John,
Thx much for your input. Yes, I was planning to use newer instructions but I
did realize seeing current design of the applications I am reviewing this will
generate some extra needed time to be sure all is ok and I cannot afford this
in current context. To implement Baseless pgm or
Apparently this is needed for some...sure SIIS is NOT new for sure, BUT
performance issue was obviously revealed after upgrade
to a z13, please do read documents referenced in previous updates. Have a good
evening.
Hi Rob and Martin,
Thx for your input. MY primary purpose is to detect SIIS scenarios across code
I have to scan and to fix them. Code is not complicated I mean you do have
basic i/o processing against files and some characters and numerics fields are
processed.
There are some Ex(ecute)
Hi Martin and Rob,
First thx much for your input. Here are 3 links which relate the "issue" and
common code for which we fall into a SIIS scenario:
https://www.google.fr/#q=istream_flash_062606_v4
Hi,
As you may know, there is some kind of performance issue because of SIIS(Store
Into Instruction Stream) after upgrade to a z13 machine in some scenarios. CPU
increase of 30% can be seen in some case, so it may be good to perform to
related changes to avoid issue from reoccuring. Did start
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