Re: Self-documenting Bit Settings

2023-08-16 Thread John Dravnieks
https://bitsavers.org/pdf/ibm/share/Ehrman_-_Assembler_Language_as_a_Higher_Level_Language_SHARE_Summer_2002.pdf
This is the presentation that Abe is referring to.

Kind regards
John


Re: Self-documenting Bit Settings

2023-08-16 Thread Dave Clark
"IBM Mainframe Assembler List"  wrote on 
08/16/2023 11:23:52 AM:
> I don't object to using the length attribute this way, but with another
> macro, you can avoid that.  We have a set of macros that define, test, 
set,
> or clear flags very easily, but use a definition macro works like so:
>  @FLAG 
> _A EQU *-1
> _V EQU 


I did get one thing out of that...  I need to create a macro to 
define the mask flags -- since they use an unexpected equate format.  I 
created my definition macro to generate either relative mask flags (that 
have an unnamed base location assuming an immediately prior 1-byte flag 
field definition) or absolute mask flags (that have a named base location 
allowing for a multi-byte flag field definition using BASE+0, BASE+1, 
BASE+2, etc.).  Thanks.

 MACRO 
DF,,DEFINE FLAG BIT(s) 
...


Sincerely,

Dave Clark
-- 
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direct: (937) 531-6378
home: (937) 751-3300

Winsupply Group Services
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(937) 294-5331




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Re: Self-documenting Bit Settings

2023-08-16 Thread Steve Smith
I don't object to using the length attribute this way, but with another
macro, you can avoid that.  We have a set of macros that define, test, set,
or clear flags very easily, but use a definition macro works like so:
 @FLAG 
_A EQU *-1
_V EQU 

The other macros look like (e.g.):
  @SETFLAG FLAGX
and generate:
 OIFLAGX_A,FLAGX_V

@CLRFLAG would produce NIFLAGX_A,255-FLAG_V (of course).
You still have to code a DC B or something before the @FLAG macros,
labelled or not.  So, otherwise it works the same as using the length
attribute.

There are slight pros & cons to each, so I guess it comes down to
preference or possibly local standards.

sas



On Wed, Aug 16, 2023 at 10:08 AM Dave Clark 
wrote:

> "IBM Mainframe Assembler List"  wrote on
> 08/16/2023 10:05:25 AM:
> > I can see that point.
>
>
> So, now my three macros follow this pattern -- pending further
> recommendations.  Thanks.
>
>  MACRO
>TF,  TEST FLAG BIT(S)
>  AIF   (T' EQ 'O').GOOD
>  MNOTE 12,'TOO MANY OPERANDS SPECIFIED'
>  MEXIT
> .GOODAIF   (T' NE 'O').BEGIN
>  MNOTE 12,'AN OPERAND IS REQUIRED'
>  MEXIT
> .* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
> .* This is a simple macro to make it easier to accurately manipulate *
> .* a bit flag definition just by  the equated bit mask name -- i.e., *
> .* the macro does not need to know  the name of the actual flag byte *
> .* nor the flag byte even have to have a name at all.*
> .*   *
> .* As presented by the late Dr. John Ehrman of IBM at SHARE. *
> .*   *
> .* The idea is,  you can have a  definition similar to either of the *
> .* following.  The actual flag byte does not need a name but you can *
> .* specify one if you want it  to  show up in the cross-reference or *
> .* if you want the equated  bit  masks  to follow the flag byte def- *
> .* inition.   The equated bit masks then take on the location of the *
> .* flag byte and the length of  the  equated  bit mask is set to the *
> .* bit mask, itself. *
> .*   *
> .* FLAG1EQU   *,B'0001'  *
> .* FLAG2EQU   *,B'0010'  *
> .* FLAG3EQU   *,B'0100'  *
> .* FLAG4EQU   *,B'1000'  *
> .* FLAG5EQU   *,B'0001'  *
> .* FLAG6EQU   *,B'0010'  *
> .* FLAG7EQU   *,B'0100'  *
> .* FLAG8EQU   *,B'1000'  *
> .*  DSBL1   MY FLAG BYTE *
> .*   *
> .* MYFLAG   DSBL1   MY FLAG BYTE *
> .* FLAG1EQU   MYFLAG,B'0001' *
> .* FLAG2EQU   MYFLAG,B'0010' *
> .* FLAG3EQU   MYFLAG,B'0100' *
> .* FLAG4EQU   MYFLAG,B'1000' *
> .* FLAG5EQU   MYFLAG,B'0001' *
> .* FLAG6EQU   MYFLAG,B'0010' *
> .* FLAG7EQU   MYFLAG,B'0100' *
> .* FLAG8EQU   MYFLAG,B'1000' *
> .*   *
> .* NOTE:  See also the SF macro and the CF macro.*
> .* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
> .BEGIN   ANOP
>TM,L'   TEST FLAG BIT(s)
>  MEND
>
> Sincerely,
>
> Dave Clark
> --
> int.ext: 91078
> direct: (937) 531-6378
> home: (937) 751-3300
>
> Winsupply Group Services
> 3110 Kettering Boulevard
> Dayton, Ohio  45439  USA
> (937) 294-5331
>
>
>
>
>
>
> *
> This email message and any attachments is for use only by the named
> addressee(s) and may contain confidential, privileged and/or proprietary
> information. If you have received this message in error, please
> immediately notify the sender and delete and destroy the message and all
> copies. All unauthorized direct or indirect use or disclosure of this
> message is strictly prohibited. No right to confidentiality or privilege
> is waived or lost by any error in transmission.
>
> *
>


Re: Self-documenting Bit Settings

2023-08-16 Thread Dave Clark
"IBM Mainframe Assembler List"  wrote on 
08/16/2023 10:05:25 AM:
> I can see that point.


So, now my three macros follow this pattern -- pending further 
recommendations.  Thanks.

 MACRO 
   TF,  TEST FLAG BIT(S)
 AIF   (T' EQ 'O').GOOD 
 MNOTE 12,'TOO MANY OPERANDS SPECIFIED' 
 MEXIT 
.GOODAIF   (T' NE 'O').BEGIN 
 MNOTE 12,'AN OPERAND IS REQUIRED' 
 MEXIT 
.* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
.* This is a simple macro to make it easier to accurately manipulate *
.* a bit flag definition just by  the equated bit mask name -- i.e., *
.* the macro does not need to know  the name of the actual flag byte *
.* nor the flag byte even have to have a name at all.*
.*   *
.* As presented by the late Dr. John Ehrman of IBM at SHARE. *
.*   *
.* The idea is,  you can have a  definition similar to either of the *
.* following.  The actual flag byte does not need a name but you can *
.* specify one if you want it  to  show up in the cross-reference or *
.* if you want the equated  bit  masks  to follow the flag byte def- *
.* inition.   The equated bit masks then take on the location of the *
.* flag byte and the length of  the  equated  bit mask is set to the *
.* bit mask, itself. *
.*   *
.* FLAG1EQU   *,B'0001'  *
.* FLAG2EQU   *,B'0010'  *
.* FLAG3EQU   *,B'0100'  *
.* FLAG4EQU   *,B'1000'  *
.* FLAG5EQU   *,B'0001'  *
.* FLAG6EQU   *,B'0010'  *
.* FLAG7EQU   *,B'0100'  *
.* FLAG8EQU   *,B'1000'  *
.*  DSBL1   MY FLAG BYTE *
.*   *
.* MYFLAG   DSBL1   MY FLAG BYTE *
.* FLAG1EQU   MYFLAG,B'0001' *
.* FLAG2EQU   MYFLAG,B'0010' *
.* FLAG3EQU   MYFLAG,B'0100' *
.* FLAG4EQU   MYFLAG,B'1000' *
.* FLAG5EQU   MYFLAG,B'0001' *
.* FLAG6EQU   MYFLAG,B'0010' *
.* FLAG7EQU   MYFLAG,B'0100' *
.* FLAG8EQU   MYFLAG,B'1000' *
.*   *
.* NOTE:  See also the SF macro and the CF macro.*
.* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
.BEGIN   ANOP 
   TM,L'   TEST FLAG BIT(s)
 MEND  

Sincerely,

Dave Clark
-- 
int.ext: 91078
direct: (937) 531-6378
home: (937) 751-3300

Winsupply Group Services
3110 Kettering Boulevard
Dayton, Ohio  45439  USA
(937) 294-5331





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Re: Self-documenting Bit Settings

2023-08-16 Thread Seymour J Metz
With regard to someone calling the macros with a symbol that was not defined 
with them in mind, an additional hack is possible; use the type operand of the 
EQU to designate 8-bit, 16-bit HH, 16-bit HL, 16-bit LH or 16-bit LL, and test 
it in the macros.


From: IBM Mainframe Assembler List  on behalf 
of Peter Relson 
Sent: Wednesday, August 16, 2023 8:24 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Self-documenting Bit Settings

I'd think that many would find it strange to have the equates precede the field 
definition.
If you must use "*" for the equate, that is appropriate.

Or, you might choose an approach such as one of the following:
F1   DSB
F1B0 EQU   F1,X'80'
F1B1 EQU   *-1,X'40'
F1B2 EQU   *-L'F1,X'20'

Peter Relson
z/OS Core Technology Design


Re: Self-documenting Bit Settings

2023-08-16 Thread Peter Relson
I'd think that many would find it strange to have the equates precede the field 
definition.
If you must use "*" for the equate, that is appropriate.

Or, you might choose an approach such as one of the following:
F1   DSB
F1B0 EQU   F1,X'80'
F1B1 EQU   *-1,X'40'
F1B2 EQU   *-L'F1,X'20'

Peter Relson
z/OS Core Technology Design