Re: request: ACK timing setting required
Am 25.05.2015 um 19:13 schrieb Ben Greear: On 05/25/2015 10:10 AM, Sebastian Gottschall wrote: Hello could it be possible to add a ACK timing feature to the ath10k firmware (QCA9880 internal register 0x8014, mask 0x3FFF) You just need ability to set this register to some value? If so, probably something I could add to CT firmware, at least. not alone. this register is rewritten on each reset (channel change etc.) so it needs to be correct handled. yes. just writing and handling the ack value would be enough. the math behind is no problem. otherwise its impossible todo long range links with ath10k. (LSDK based firmware from compex do support this feature unlike ath10k) for distance handling the following parameters must be adjustable (in ath9k we implemented the coverageclass attribute for it which was based on my previous work on madwifi) since i just have a old ath10k firmware source which i never got working (working toolchain missing) i just write down you the register definitions here which must be adjustable. the math etc. for calculating these values can be done later by me in ath10k OS_REG_WRITE(MAC_DCU_GBL_IFS_SLOT_ADDRESS, MAC_DCU_GBL_IFS_SLOT_DURATION_SET(your_slot_time_here * 88)); //(default value is 9) OS_REG_WRITE(MAC_DCU_GBL_IFS_SIFS_ADDRESS, MAC_DCU_GBL_IFS_SIFS_DURATION_SET(your_sifs_time_here * 88)); //(default value is 14) OS_REG_WRITE(MAC_DCU_GBL_IFS_EIFS_ADDRESS, MAC_DCU_GBL_IFS_SIFS_DURATION_SET(your_eifs_time_here * 88)); //(default value is 92) OS_REG_WRITE(MAC_PCU_ACK_CTS_TIMEOUT_ADDRESS, MAC_PCU_ACK_CTS_TIMEOUT_ACK_TIMEOUT_SET(your_ack_time_here * 88) ); // (default value is 30) OS_REG_WRITE(MAC_PCU_ACK_CTS_TIMEOUT_ADDRESS, MAC_PCU_ACK_CTS_TIMEOUT_CTS_TIMEOUT_SET(your_cts_time_here * 88)); // (default value is 30) these registers are prewritten using the ini array named qca9880_peregrine_bimodal_asic_mac its possible to adjust them using debugfs reg_value and reg_addr, but as i said on each channel change or internal reset, the registers are overwritten with default values. so best is to adjust them direct after registers are written from ini array. Thanks, Ben ___ ath10k mailing list ath10k@lists.infradead.org http://lists.infradead.org/mailman/listinfo/ath10k
Re: request: ACK timing setting required
On 05/25/2015 12:21 PM, Sebastian Gottschall wrote: Am 25.05.2015 um 19:53 schrieb Ben Greear: On 05/25/2015 10:48 AM, Sebastian Gottschall wrote: Am 25.05.2015 um 19:13 schrieb Ben Greear: On 05/25/2015 10:10 AM, Sebastian Gottschall wrote: Hello could it be possible to add a ACK timing feature to the ath10k firmware (QCA9880 internal register 0x8014, mask 0x3FFF) You just need ability to set this register to some value? If so, probably something I could add to CT firmware, at least. not alone. this register is rewritten on each reset (channel change etc.) so it needs to be correct handled. yes. just writing and handling the ack value would be enough. the math behind is no problem. otherwise its impossible todo long range links with ath10k. (LSDK based firmware from compex do support this feature unlike ath10k) I'll see if I can add this to my firmware, probably will be a few days before I can get time to work on it. Will post to list when I have a FW build ready for testing. do you plan to bring up your codebase to 10.2.4 with api 5 one time? or is the code already up to date, just using the old api? I'm having a slow time getting updated source from QCA, but I plan to move to a newer code base when I can get access. For now, my firmware is based on 10.1.467, but it has quite a bit of improvements and changes. It does not support some of the newer chipsets that newer QCA firmware supports. Thanks, Ben -- Ben Greear gree...@candelatech.com Candela Technologies Inc http://www.candelatech.com ___ ath10k mailing list ath10k@lists.infradead.org http://lists.infradead.org/mailman/listinfo/ath10k
Re: request: ACK timing setting required
On 05/25/2015 10:48 AM, Sebastian Gottschall wrote: Am 25.05.2015 um 19:13 schrieb Ben Greear: On 05/25/2015 10:10 AM, Sebastian Gottschall wrote: Hello could it be possible to add a ACK timing feature to the ath10k firmware (QCA9880 internal register 0x8014, mask 0x3FFF) You just need ability to set this register to some value? If so, probably something I could add to CT firmware, at least. not alone. this register is rewritten on each reset (channel change etc.) so it needs to be correct handled. yes. just writing and handling the ack value would be enough. the math behind is no problem. otherwise its impossible todo long range links with ath10k. (LSDK based firmware from compex do support this feature unlike ath10k) I'll see if I can add this to my firmware, probably will be a few days before I can get time to work on it. Will post to list when I have a FW build ready for testing. Thanks, Ben -- Ben Greear gree...@candelatech.com Candela Technologies Inc http://www.candelatech.com ___ ath10k mailing list ath10k@lists.infradead.org http://lists.infradead.org/mailman/listinfo/ath10k
Re: request: ACK timing setting required
Am 25.05.2015 um 21:32 schrieb Ben Greear: On 05/25/2015 12:21 PM, Sebastian Gottschall wrote: Am 25.05.2015 um 19:53 schrieb Ben Greear: On 05/25/2015 10:48 AM, Sebastian Gottschall wrote: Am 25.05.2015 um 19:13 schrieb Ben Greear: On 05/25/2015 10:10 AM, Sebastian Gottschall wrote: Hello could it be possible to add a ACK timing feature to the ath10k firmware (QCA9880 internal register 0x8014, mask 0x3FFF) You just need ability to set this register to some value? If so, probably something I could add to CT firmware, at least. not alone. this register is rewritten on each reset (channel change etc.) so it needs to be correct handled. yes. just writing and handling the ack value would be enough. the math behind is no problem. otherwise its impossible todo long range links with ath10k. (LSDK based firmware from compex do support this feature unlike ath10k) I'll see if I can add this to my firmware, probably will be a few days before I can get time to work on it. Will post to list when I have a FW build ready for testing. do you plan to bring up your codebase to 10.2.4 with api 5 one time? or is the code already up to date, just using the old api? I'm having a slow time getting updated source from QCA, but I plan to move to a newer code base when I can get access. For now, my firmware is based on 10.1.467, but it has quite a bit of improvements and changes. It does not support some of the newer chipsets that newer QCA firmware supports. as soon as i have seen each new chipset has a own firmware. the standard firmware will only support AR9880 v2. since i'm only working on embedded devices which are only running on AR9880 v2 based chipsets, this isnt a big issue Sebastian Thanks, Ben ___ ath10k mailing list ath10k@lists.infradead.org http://lists.infradead.org/mailman/listinfo/ath10k
