You are right,
I have used; ath9k_hw_computetxtime()
ath_pkt_duration()
for data packets.
I have questions for RTS, ACK :
(1) I don't know if they use short/long preamble ?
There is no 40mhz ,gi for control packets, as far I can think
ath9k_hw_computetxtime() uses ieee80211_rate-bitrate {a
.. be64_to_cpu() ? That field is not already converted for you?
Adrian
On 29 November 2012 20:46, vikranth reddy
vikranth.reddydevelo...@gmail.com wrote:
Hi,
I have tested it using Sony BR-100 (AR7010 + AR9280). PFA the time diff logs
for the new firmware.(htc_7010.fw)
I added prints
Hi Adrian,
No its not already converted.
See the below code-snippet in ath9k_rx_prepare
rx_status-mactime = be64_to_cpu(rxbuf-rxstatus.rs_tstamp);
rx_status-band = hw-conf.channel-band;
rx_status-freq = hw-conf.channel-center_freq;
rx_status-signal = rxbuf-rxstatus.rs_rssi +
As I said, the cozybit guys reported that the TSF increment is
behaving correctly. Maybe it's only behaving correctly for beacons
here, hm.
Also, look:
Nov 29 10 36 49 [ 122.787519] ###now = 64609 prev = 2683598441314
diff = -2683598376705
Nov 29 10 36 49 [ 122.947963] ###now
Am 29.11.2012 00:50, schrieb Adrian Chadd:
Hi all,
I've done an updated build of the ath9k_htc firmware images. I don't
currently have a HTC setup working so this is just a recompilation of
the current firmware.
http://dev.qca.qualcomm.com/~adrian/htc/20121128/
Please let me know if it
hi,
In ath9k/reg.h,
there are some constants for the PHY error counters
#define AR_FILT_CCK0x8128
#define AR_PHY_ERR_1 0x812c
#define AR_PHY_ERR_MASK_1 0x8130
#define AR_PHY_ERR_2 0x8134
#define AR_PHY_ERR_MASK_2 0x8138
Can I change them to 0x or
Hi,
On 30 November 2012 16:34, abhinav narain abhinavnarai...@gmail.com wrote:
hi,
In ath9k/reg.h,
there are some constants for the PHY error counters
#define AR_FILT_CCK0x8128
#define AR_PHY_ERR_1 0x812c
#define AR_PHY_ERR_MASK_1 0x8130
#define AR_PHY_ERR_2
.. 0x24? Why's it ANDing with that? How big is that PHY error array?
And there's a separate RX PHY error mask register you can set to
0x for experiment:
ar5212reg.h:#define AR_PHY_ERR 0x810c /* Phy error filter */
Adrian
On 30 November 2012 20:20, abhinav narain
On Fri, Nov 30, 2012 at 11:27 PM, Adrian Chadd adr...@freebsd.org wrote:
.. 0x24? Why's it ANDing with that?
Not my code ! Its already present in debgufs.c
How big is that PHY error array?
Enum is indexed till 37
And there's a separate RX PHY error mask register you can set to
On 30 November 2012 21:05, abhinav narain abhinavnarai...@gmail.com wrote:
On Fri, Nov 30, 2012 at 11:27 PM, Adrian Chadd adr...@freebsd.org wrote:
.. 0x24? Why's it ANDing with that?
Not my code ! Its already present in debgufs.c
How big is that PHY error array?
Enum is indexed till
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