Anatoly Sokolov wrote:
Hi.
From: David Brown [EMAIL PROTECTED]
Sent: Sunday, January 27, 2008 10:57 PM
I'd imagine that the use of pgm_read_*_far macros
within interrupt functions is pretty rare - perhaps the best idea is to
use the patch, but make -mno-save-rampz the default?
Rare for 128K
Wouter van Gulik wrote:
Well, the GCC library provides most (if not all) functions for 64-bit
operations. Alas this is written in C and the compiler can't make this
nearly as good as an handwritten assembler routine. Mostly due to the lack
of carry support in gcc.
Is it feasible to introduce
I have not dug enough into the details of gcc, but I thought that flags
were only visible at a low level, such as in the avr.md file, where you
are defining the assembly code sequences for different effects. Thus it
is possible to define a 16-bit addition instruction with an add, adc
microcontroller compilers support - the ability to write things like if
(CARRY) ... can be a big win for some code.
A killer app for exposing some of the condition code flags to C may be
that this facilitates very efficient integer over/under flow detection.
Integer overflows are the source
John Regehr wrote:
microcontroller compilers support - the ability to write things like
if (CARRY) ... can be a big win for some code.
A killer app for exposing some of the condition code flags to C may be
that this facilitates very efficient integer over/under flow detection.
Integer
Wouter van Gulik wrote:
Yes this is exactly what I wanted to point out. The carry is now only
used in handwritten assembler (in avr.md). GCC's RTL does not know
anything about the carry bit being available when it's set/cleared and
when it's clobbered.
Is there some limitation in the RTL
Dave N6NZ wrote:
John Regehr wrote:
microcontroller compilers support - the ability to write things like
if (CARRY) ... can be a big win for some code.
A killer app for exposing some of the condition code flags to C may be
that this facilitates very efficient integer over/under flow
gcc uses its own status register cc0 that is set as a result of
compares and operators such as EQ,LT,GT. This is effectively a
translation of the avr status register effects for signed/unsigned
operations. So after each instruction gcc know what status is available
or not.
This register
-Original Message-
From:
[EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED]
org] On Behalf Of Andrew Hutchinson
Sent: Wednesday, January 30, 2008 3:55 PM
To: Wouter van Gulik
Cc: avr-gcc-list@nongnu.org
Subject: Re: [avr-gcc-list] testsuite saga continues
gcc uses its own status
