> -----Original Message----- > From: > [EMAIL PROTECTED] > [mailto:[EMAIL PROTECTED] > org] On Behalf Of Dmitry K. > Sent: Saturday, March 29, 2008 12:03 AM > To: avr-libc-dev@nongnu.org > Subject: [avr-libc-dev] XMEGA: are SP, EEAR 16-bit registers? > > Hi. > > The common X-less AVR has a set of 16-bit registers > (those have 16-bit atomic access). This registers are > listed implicitly, for example, with ATmega48p they > are: TCNT1, OCR1A/B, ICR1, TCNT2, ... > > But the 'ATxmega A manual' says (page 9): > ... each 16-bit register has an 8-bit register for > temporary storing the high byte... > > Is it true with SP? If so it is needed to verify all > sources: low byte must read first, high byte must > write first. >
Dmitry, Anatoly and I made sure that the 16-bit registers are accessed correctly. You can see this with the GCC patch that I sent to you. The SP is the only one that I am unsure of, and I will check into it, but it will have to be on Monday. Eric _______________________________________________ AVR-libc-dev mailing list AVR-libc-dev@nongnu.org http://lists.nongnu.org/mailman/listinfo/avr-libc-dev