The bootrom only reads an image if the correct checksum is present in the
header. The calculation is pretty simple:
sum over all words from 0x20 to 0x44
Two of this words are the image length. That is why the checksum can not be
calculated until barebox_image_size is known.
The easiest solution is
The Avnet ZedBoard is an evalboard with a Zynq-7020 based MPSoC.
There is also a Digilent ZedBoard, that is the same but only for
academic customers.
Signed-off-by: Steffen Trumtrar s.trumt...@pengutronix.de
---
arch/arm/boards/avnet-zedboard/Makefile| 1 +
Support for Cadence UART core.
Signed-off-by: Steffen Trumtrar s.trumt...@pengutronix.de
---
drivers/serial/Kconfig | 4 +
drivers/serial/Makefile | 1 +
drivers/serial/serial_cadence.c | 307
3 files changed, 312 insertions(+)
On Tue, Mar 19, 2013 at 10:21:57AM +0100, Steffen Trumtrar wrote:
Add basic support for the Xilinx Zynq-7000 EPP architecture.
The Zynq-7000 is an embedded processing platform that combines a Cortex A9
dualcore MPSoC with an Artix-7 FPGA.
Signed-off-by: Steffen Trumtrar
On Tue, Mar 19, 2013 at 10:21:57AM +0100, Steffen Trumtrar wrote:
Add basic support for the Xilinx Zynq-7000 EPP architecture.
The Zynq-7000 is an embedded processing platform that combines a Cortex A9
dualcore MPSoC with an Artix-7 FPGA.
Signed-off-by: Steffen Trumtrar
On Tue, Mar 19, 2013 at 08:40:42AM -0500, Josh Cartwright wrote:
On Tue, Mar 19, 2013 at 10:22:00AM +0100, Steffen Trumtrar wrote:
The Avnet ZedBoard is an evalboard with a Zynq-7020 based MPSoC.
There is also a Digilent ZedBoard, that is the same but only for
academic customers.
On Tue, Mar 19, 2013 at 02:57:58PM +0100, Steffen Trumtrar wrote:
On Tue, Mar 19, 2013 at 07:59:27AM -0500, Josh Cartwright wrote:
On Tue, Mar 19, 2013 at 10:21:55AM +0100, Steffen Trumtrar wrote:
Hi!
Still nothing fancy. Boots a little faster from SD and has a console.
For
On 10:21 Tue 19 Mar , Steffen Trumtrar wrote:
Add basic support for the Xilinx Zynq-7000 EPP architecture.
The Zynq-7000 is an embedded processing platform that combines a Cortex A9
dualcore MPSoC with an Artix-7 FPGA.
Signed-off-by: Steffen Trumtrar s.trumt...@pengutronix.de
---
On 10:21 Tue 19 Mar , Steffen Trumtrar wrote:
Support for Cadence UART core.
Signed-off-by: Steffen Trumtrar s.trumt...@pengutronix.de
---
drivers/serial/Kconfig | 4 +
drivers/serial/Makefile | 1 +
drivers/serial/serial_cadence.c | 307
The macb/gem core is used by the Zynq SoC. In preparation of sharing
the macb driver between at91 and Zynq, rename the platform data to
'struct macb_platform_data', and move the definition to a common
location.
Signed-off-by: Josh Cartwright jo...@eso.teric.us
---
On Fri, Mar 15, 2013 at 06:26:00PM -0500, Josh Cartwright wrote:
[..]
From 0d51dc731ff3934e22e78405a992658a8d3bf1de Mon Sep 17 00:00:00 2001
From: Josh Cartwright jo...@eso.teric.us
Date: Tue, 19 Mar 2013 10:22:48 -0500
Subject: [PATCH] parameter: fix build warning when !CONFIG_PARAMETER
To:
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