Re: [PATCH urgent] ARM: fix the memset fix

Hi Nico, ignore this one, you were not meant to be on Cc. Sascha On Thu, May 23, 2013 at 08:31:15AM +0200, Sascha Hauer wrote: > From: Nicolas Pitre > > From Kernel commit 418df63a ARM: 7670/1: fix the memset fix > > | Commit 455bd4c430b0 ("ARM: 7668/1: fix memset-related crashes caused by >

[PATCH urgent] ARM: fix the memset fix

From: Nicolas Pitre >From Kernel commit 418df63a ARM: 7670/1: fix the memset fix | Commit 455bd4c430b0 ("ARM: 7668/1: fix memset-related crashes caused by | recent GCC (4.7.2) optimizations") attempted to fix a compliance issue | with the memset return value. However the memset itself became br

[PATCH] mtd-core: fix mtd erase operation for non-uniform flashes.

This patch supports the erasing of CFI flash with non-uniform sector. When more than one erase region exists, the mtd_erasesize function assigns the erase size of the sector to the erase_info structure. The problem was discovered when erasing /dev/env0 on my PPC board. This is a partition of size

[PATCH] defaultenv-2: Fix settings entry

There is no "settings-entries-edit" command. This results in a recursive call to the settings menu. Use the missing "boot-entries-edit" command instead. Signed-off-by: Steffen Trumtrar --- defaultenv-2/menu/menu/settings | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/default

imx31 bcb

Is there anybody out there who successfully used the bcb command in barebox? I just can't seem to get a valid bcb without using the Freescale kobs-ng tools (which is not my preferred way of preparing the nand). ___ barebox mailing list barebox@lists.inf

[PATCH 1/2 v2] cfi_flash: add shift option for some cfi memory chips

From: Oleksij Rempel Many cfi chips support 16 and 8 bit modes. Most important difference is use of so called "Q15/A-1" pin. In 16bit mode this pin is used for data IO. In 8bit mode, it is an address input which add one more least significant bit (LSB). In this case we should shift all adresses b

[PATCH 2/2] cfi_flash: size_ratio should not be 0

We will get size = 0 if size_ratio = 0 Signed-off-by: Oleksij Rempel --- drivers/mtd/nor/cfi_flash.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nor/cfi_flash.c b/drivers/mtd/nor/cfi_flash.c index 4b4e29d..85e96ce 100644 --- a/drivers/mtd/nor/cfi_flash.c +++

[PATCH 0/2] cfi fixes

this patch set will fix autodetection of cfi flash devicese with extra LSB bit. Oleksij Rempel (2): cfi_flash: add shift option for some cfi memory chips cfi_flash: size_ratio should not be 0 drivers/mtd/nor/cfi_flash.c | 26 +- drivers/mtd/nor/cfi_flash.h | 4 +++-

[PATCH v2] mci i.MX esdhc: Fix clock divider calculation

From: Sascha Hauer This updates the i.MX esdhc divider settings to FSLs U-Boot. Current timings work fine for SD cards, but not for eMMC. Although the calculation is fine according to the datasheet and reading from eMMC works, writing is broken. Atleast on i.MX53/tqma53. With this patch the resul

[RFC, PATCH v2 2/3] net: add ar231x-eth support

This driver should work with some Atheros WiSoCs: - ar2312, ar2313 - ar2315, ar2316 ... Signed-off-by: Oleksij Rempel --- drivers/net/Kconfig | 7 + drivers/net/Makefile | 1 + drivers/net/ar231x.c | 429 +++ drivers/net/ar231x.h | 219 +++

[RFC, PATCH v2 0/3] work on atheros ar2313

Hello all, here is next version of pachtes for atheros ar2313. Previous comments was handled and some more work was done Oleksij Rempel (3): MIPS: add Atheros ar531x family support net: add ar231x-eth support MIPS: ar231x: add netgear-wg102 arch/mips/Kconfig

[RFC, PATCH v2 1/3] MIPS: add Atheros ar531x family support

Signed-off-by: Oleksij Rempel Signed-off-by: Antony Pavlov --- arch/mips/Kconfig | 10 + arch/mips/Makefile | 2 + arch/mips/mach-ar231x/Kconfig | 7 + arch/mips/mach-ar231x/Makefile |

[RFC, PATCH v2 3/3] MIPS: ar231x: add netgear-wg102

Signed-off-by: Antony Pavlov Signed-off-by: Oleksij Rempel --- arch/mips/Makefile | 1 + arch/mips/boards/netgear-wg102/Kconfig | 6 ++ arch/mips/boards/netgear-wg102/Makefile | 1 + arch/mips/boards/netgear-wg102/ram.c| 13 + arch/mips/mach-ar231x/Kc

Re: [PATCH] mci i.MX esdhc: Fix clock divider calculation

On Tue, May 21, 2013 at 09:27:08PM +0200, Sascha Hauer wrote: > On Tue, May 21, 2013 at 12:29:20PM +0200, Steffen Trumtrar wrote: > > From: Sascha Hauer > > > > This updates the i.MX esdhc divider settings to FSLs U-Boot. > > Current timings work fine for SD cards, but not for eMMC. > > Although