Hello Ezequiel,
On Sun, Nov 09, 2014 at 11:56:14AM -0300, Ezequiel Garcia wrote:
Very delayed third round of the support for the network controller present
on Marvell Armada 370/XP SoC.
The first patch enables the peripherals in a PUP register, which is required
on RGMII ports.
The
LBAs are numbered starting from zero so the last LBA # would be equal
to total number of blocks minus one.
Signed-off-by: Andrey Smirnov andrew.smir...@gmail.com
---
common/partitions/efi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/partitions/efi.c
imx6_bbu_nand_register_handler is not availible if
CONFIG_BAREBOX_UPDATE_IMX6_NAND is not selected. Fix this by wrapping
it's usage in preprocessor statements.
Signed-off-by: Andrey Smirnov andrew.smir...@gmail.com
---
arch/arm/boards/phytec-phyflex-imx6/board.c | 3 ++-
1 file changed, 2
This commit adds support for Marvell's 88E1543 PHY chip. This chip is
almost identical to the 88EE1545, except the 88E1545 supports QSGMII
and the 88EE1543 supports SGMII.
Therefore, the same configuration function is used for both PHYs. For now,
the only initialization provided for the 88EE1543
Just a cosmetic clean-up to fix the indentation of the entries
in the phys array.
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
drivers/net/phy/marvell.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/net/phy/marvell.c
As reported by Sebastian, we need to enable this explicitly for the
Tx clock on RGMII. While here, let's enable all the other peripherals.
Although this is documented to be required only for Armada XP SoC,
it has been found to be harmless on Armada 370, so we do it unconditionally
to simplify the
This commit adds support for Marvell's 88E1545 PHY chip. In particular, this
allows to support QSGMII interfaces.
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
drivers/net/phy/marvell.c | 58 +
include/linux/marvell_phy.h | 1
Changes from v3:
* As requested by Sascha, added a patch to fix the indentation
in the marvell phys array.
Changes from v2:
* Included SPI in the PUP register as noted by Sebastian.
* Added MAC flow control configuration. Added missing support
for TX-delayed RGMII (RGMII_TXID)
This patch introduces the mvneta driver to support the network controller
found in Armada 370/XP SoCs.
Tested-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
drivers/net/Kconfig | 6 +
drivers/net/Makefile | 1 +
Hello Ezequiel,
On Mon, Nov 10, 2014 at 03:10:56PM -0300, Ezequiel Garcia wrote:
On 11/10/2014 05:06 AM, Uwe Kleine-König wrote:
I tested this series on top of 784b352aeeed with a patch to support my
ReadyNAS 104 (by Netgear, Armada 370 system, currently only second stage
booting from
On 11/10/2014 07:43 PM, Uwe Kleine-König wrote:
On Mon, Nov 10, 2014 at 03:10:56PM -0300, Ezequiel Garcia wrote:
On 11/10/2014 05:06 AM, Uwe Kleine-König wrote:
I tested this series on top of 784b352aeeed with a patch to support my
ReadyNAS 104 (by Netgear, Armada 370 system, currently only
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