Barebox-version of the Linux v5.2 patch:
40ae25505fe834648ce4aa70b073ee934942bfdb
net: stmmac: socfpga: fix phy and ptp_ref setup for Arria10/Stratix10
On the Arria10, Agilex, and Stratix10 SoC, there are a few differences from
the Cyclone5 and Arria5:
- The emac PHY setup
The Arria10 DTS uses the state framework.
Enable the driver so it gets probed.
Signed-off-by: Steffen Trumtrar
---
arch/arm/configs/socfpga-arria10_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/socfpga-arria10_defconfig
These defines are common for arria10 and cyclone5.
Instead of having them here, they are moved to drivers/net/designware_socfpga.c.
Signed-off-by: Steffen Trumtrar
---
.../include/mach/cyclone5-system-manager.h| 11 ---
1 file changed, 11 deletions(-)
diff --git
On Wed, Oct 16, 2019 at 09:47:05PM +0800, duhuanpeng wrote:
> >
> > FWIW, in bash on both my tty2 and urxvt, Ctrl-U clears the whole line.
>
> did you try to move your cursor in the middle of a line.
Ah, I misread your first mail. Yes, my bash only discards characters
before the cursor until
Yes I have tried with 2019.01.0 barebox but no change. On linux I
cannot even connect with PUTTY even though /dev/ttyACM0 is present. On
Windows at least I can connect via PUTTY
On both OSes fastboot does not list any device. But the board is
detected in device manager/dmesg.
Best regards,
Fix the warning:
arch/arm/mach-socfpga/arria10-xload.c:17:5: warning: no previous prototype for
'a10_update_bits' [-Wmissing-prototypes]
17 | int a10_update_bits(unsigned int reg, unsigned int mask,
| ^~~
Signed-off-by: Steffen Trumtrar
---
Fix the warning
arch/arm/mach-socfpga/arria10-clock-manager.c:113:14: warning: no previous
prototype for
'arria10_cm_get_mmc_controller_clk_hz' [-Wmissing-prototypes]
113 | unsigned int arria10_cm_get_mmc_controller_clk_hz(void)
| ^~~~
Fix the following warnings
arch/arm/mach-socfpga/arria10-reset-manager.c:152:6: warning: no previous
prototype for
'arria10_reset_deassert_shared_peripherals_q1' [-Wmissing-prototypes]
152 | void arria10_reset_deassert_shared_peripherals_q1(uint32_t *mask0,
|
