On 2019-11-12 12:00 p.m., Sascha Hauer wrote:
Sorry for the delay, I probably knew this issue will be something
unfortunate to look at...
No Problem, thanks for your hard work. :)
The second solution is to add -fPIE to CPPFLAGS which is a more general
approach. I'd like to give this a try
On Mon, Nov 11, 2019 at 10:56:07AM +0100, Ahmad Fatoum wrote:
> designware_eqos.c contains an eqos_stop implementation to stop the NIC
> when halting the interface. Unfortunately it wasn't used leading to
> memory corruption on boot, possibly due to DMA. Fix this.
>
> Signed-off-by: Ahmad Fatoum
On Thu, Nov 07, 2019 at 09:12:56PM +0100, Lucas Stach wrote:
> A valid DTB may reside low in the Barebox binary address map. If this
> binary is started at a very low address, we might mistake the pointer
> for a machine type. Make sure to check for all other possibilities first
> before
Hi Maik,
On Wed, Aug 21, 2019 at 04:21:44PM +0200, Maik Otto wrote:
> the habv4-imx6-gencsf.h is necessary in the board flash header to build
> a signed barebox
Applied now. Please note that in the meantime it is no longer necessary
to put the public key for the FIT image into the device tree
Early code in barebox often runs at an address the binary is not linked
at. This causes problems for example when simple initializations in a
switch are converted to an array lookup (-ftree-switch-conversion).
These arrays are then addressed where they are linked at. Some code
where this is known
Hi Andreas,
On Tue, Nov 12, 2019 at 08:48:04AM +0100, Andreas Geisenhainer wrote:
> Good day, everyone.
>
> *bump*
>
> On 2019-10-25 10:48 a.m., Andreas Geisenhainer wrote:
> > Hello Sascha, hello barebox-ml.
> >
> > > On 2019-07-10 9:58 a.m., Sascha Hauer wrote:
> > >> On Mon, Jul 08, 2019
The stm32_iwdg watchdog can't be disabled. To have the wd commant report
this fact correctly to the user, the ->set_timeout needs to return -ENOSYS
which is interpreted as "Watchdog cannot be disabled" instead of -EINVAL
which means "Timeout value out of range".
Signed-off-by: Ahmad Fatoum
---
The STM32MP DDR Controller has a very flexible way of mapping address
bits to columns/rows/banks. This is so far configured by the ARM TF-A
as part of the SDRAM setup, so we don't need to do this in barebox.
Nevertheless reading it out in barebox, allows us to determine unused
address bits and
A previous commit has copied over the upstream
header. Use it instead of replicating register definitions in the
MFD and watchdog cell driver. No functional change.
Signed-off-by: Ahmad Fatoum
---
drivers/mfd/stpmic1.c | 3 +--
drivers/watchdog/stpmic1_wdt.c | 28
The TF-A sets up pin muxing and clocking for the UART4 which is the UART
suggested by ST for use as debug console.
Eventually, we might want to do this ourselves to be sure, but for now
lets just stick in a putc_ll('>'), so user selecting DEBUG_LL can see
that barebox started.
Signed-off-by:
The STM32MP DDR Controller has a very flexible way of mapping address
bits to columns/rows/banks. This is so far configured by the ARM TF-A
as part of the SDRAM setup, so we don't need to do this in barebox.
Nevertheless reading it out in barebox, allows us to determine unused
address bits and
There's new infrastructure for runtime determining RAM size. Use it so
we don't need to hard code it in PBL and board code.
Because this new infrastructure has some nested function calls, my
arm-v7a-linux-gnueabihf-gcc 9.2.1 (OSELAS.Toolchain-2019.09.0)
spills to the stack. Add
The exact sequence is already available in form of device_reset_us. Make
use of it.
Signed-off-by: Ahmad Fatoum
---
drivers/i2c/busses/i2c-stm32.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/drivers/i2c/busses/i2c-stm32.c b/drivers/i2c/busses/i2c-stm32.c
We'll want reliable ordering for other SD/MMC using boards as well, thus
move the alias out of the board device tree into the SoC's.
Signed-off-by: Ahmad Fatoum
---
arch/arm/dts/stm32mp157a-dk1.dtsi | 4
arch/arm/dts/stm32mp157c.dtsi | 1 +
2 files changed, 1 insertion(+), 4
The STM32MP Evaluation Kits place a LED on PA13 to display boot status.
Document its blinking patterns.
Signed-off-by: Ahmad Fatoum
---
Documentation/boards/stm32mp.rst | 10 ++
1 file changed, 10 insertions(+)
diff --git a/Documentation/boards/stm32mp.rst
When barebox is invoked out of the TF-A v2.1, it's started with
sp, r0, r1, r2 all equal to zero. To use the new RAM size calculating
stm32mp1_barebox_entry, we need to have a stack to handle spillage.
Add a stm32mp_cpu_lowlevel_init wrapper around arm_cpu_lowlevel_init,
which additionally
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