Refactoring and cleanup of vc fdt parsing based on advice
from Ahmad Fatoum.
Signed-off-by: Daniel Brát
---
I originally wanted to send these as part of v5 of
'ARM: rpi: parse useful data from vc fdt' patch, but you
were quicker with accepting the v4 :)
Hope that's not a problem.
Hi!
Am Montag, dem 20.06.2022 um 15:19 +0200 schrieb Ahmad Fatoum:
> Hi,
>
> On 20.06.22 14:47, Teresa Remmet wrote:
> > Am Montag, dem 20.06.2022 um 14:38 +0200 schrieb Ahmad Fatoum:
> > > On 20.06.22 14:27, Teresa Remmet wrote:
> > > > I have set the DDRC_ADDRMAP7 register manually in the RAM
A DMA cmd + data transfer can finish or stop (i.e. on a block gap) before
the status register is cleared. In that case we'll lose track of state
causing sdhci_transfer_data_dma() to loop forever waiting for status bits
that are already cleared.
Clearing SDHCI_INT_CMD_COMPLETE should suffice here.
On 2022-06-21 09:46, Sascha Hauer wrote:
Hi Robin,
...
We should only ever
clear the bits we have handled, like sdhci_transfer_data_dma() does with
sdhci_write32(sdhci, SDHCI_INT_STATUS, SDHCI_INT_DMA);
I just noticed that the tegra-sdmmc mci driver might have the same issue.
Hi Sascha,
On 2022-06-21 09:46, Sascha Hauer wrote:
Hi Robin,
On Mon, Jun 20, 2022 at 04:33:02PM +0200, Robin van der Gracht wrote:
Hi,
Today I tried to run barebox with CONFIG_KEYBOARD_GPIO=y added to my
config.
and noticed my board hangs during boot. When I modify the probe function to
Enable deep probe support on the Radxa ROCK3 boards.
Signed-off-by: Michael Riesch
---
arch/arm/boards/radxa-rock3/board.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boards/radxa-rock3/board.c
b/arch/arm/boards/radxa-rock3/board.c
index 30ad594d0a..aef5ec5df6 100644
---
Hi Robin,
On Mon, Jun 20, 2022 at 04:33:02PM +0200, Robin van der Gracht wrote:
> Hi,
>
> Today I tried to run barebox with CONFIG_KEYBOARD_GPIO=y added to my config.
> and noticed my board hangs during boot. When I modify the probe function to
> run without registering the poller[1] it boots as
On Fri, Jun 17, 2022 at 11:58:11PM +0200, Daniel Brát wrote:
> Videocore first-stage loader on rpi passes us many useful information
> inside the vc fdt, including the real value of PM_RSTS register, not
> easily available by other means and which we can use to determine
> the reset cause.
> Also
