On Thu, 11 Jan 2024 17:19:51 +0100, Ahmad Fatoum wrote:
> dev may be NULL, e.g. when
>
> dma_sync_single_for_cpu(NULL,
>
> is called. Such instances are broken anyway, but we still have them,
> e.g. in Raspberry Pi code for mailbox, so add a NULL check.
>
> [...]
Applied, thanks!
[1/1]
On 24-01-11, Sascha Hauer wrote:
> On Thu, Jan 11, 2024 at 12:51:20PM +0100, Marco Felsch wrote:
> > Convert the i.MX8M machine init code to the previously introduced soc
> > framework. The soc driver was mostly copied from Linux with slightly
> > adaptions for barebox. To the soc driver is called
dev may be NULL, e.g. when
dma_sync_single_for_cpu(NULL,
is called. Such instances are broken anyway, but we still have them,
e.g. in Raspberry Pi code for mailbox, so add a NULL check.
Fixes qemu-rpi0@multi_v7 CI breakage on next.
Signed-off-by: Ahmad Fatoum
---
include/driver.h | 16
Hello Stefan,
On 11.01.24 16:42, Stefan Kerkmann wrote:
> All function signatures have been taken from the NXP manual "High
> Assurance Boot Version 4 Application Programming Interface Reference
> Manual" revision 1.4 under section "4.5 ROM vector table". A copy can be
> obtained from the imx
The existing habv4 rom vector table had some mismatches in the API of
the function pointers which broke calling into the HAB rom - mainly
observed with the `report_event` function. The suspected culprit here is
the `bytes` pointer which was `uint32_t*` vs. the documented `size_t*`.
When compiled
All function signatures have been taken from the NXP manual "High
Assurance Boot Version 4 Application Programming Interface Reference
Manual" revision 1.4 under section "4.5 ROM vector table". A copy can be
obtained from the imx code signing tool (imx-cst).
Signed-off-by: Stefan Kerkmann
---
+++--
1 file changed, 68 insertions(+), 25 deletions(-)
---
base-commit: 62748c3bf91d4f91f9f5c12c5fcd590c281d7b7f
change-id: 20240111-fix-habv4-event-report-aa1cc1fb7c95
Best regards,
--
Stefan Kerkmann
On Thu, Jan 11, 2024 at 12:51:20PM +0100, Marco Felsch wrote:
> Convert the i.MX8M machine init code to the previously introduced soc
> framework. The soc driver was mostly copied from Linux with slightly
> adaptions for barebox. To the soc driver is called during the
> postcore_initcall to keep
On 11.01.24 13:16, Marco Felsch wrote:
> On 24-01-11, Ahmad Fatoum wrote:
>> On 11.01.24 12:48, Marco Felsch wrote:
>>> if (IS_ENABLED(CONFIG_FIRMWARE_IMX8MN_OPTEE)) {
>>> @@ -305,9 +305,9 @@ __noreturn void
>>> imx8mq_load_and_start_image_via_tfa(void)
>>> const void *bl31;
>>>
On 11.01.24 13:14, Marco Felsch wrote:
> On 24-01-11, Ahmad Fatoum wrote:
>> On 11.01.24 12:48, Marco Felsch wrote:
>>> Use the dynamic optee memory base address for the early mapping if
>>> possible and fallback to the static mapping if the query failed.
>>>
>>> Signed-off-by: Marco Felsch
>>
>>
On Thu, 11 Jan 2024 14:00:14 +0100, Ahmad Fatoum wrote:
> char is generally unsigned on ARM, but we shouldn't rely on that. HAB
> code does though and compare a char against 0xdb, which would never
> succeed if chars were signed. Switch to an explicitly unsigned type to
> fix this.
>
>
On Thu, Jan 11, 2024 at 03:15:35PM +0100, Ahmad Fatoum wrote:
> Hello Sascha,
>
> On 11.01.24 15:11, Sascha Hauer wrote:
> >
> > On Wed, 10 Jan 2024 17:01:02 +0100, Ahmad Fatoum wrote:
> >> Upstream DT changed /soc of NXP Layerscape LS1046A to be dma-coherent.
> >> This means that:
> >>
> >> 1)
Hello Sascha,
On 11.01.24 15:11, Sascha Hauer wrote:
>
> On Wed, 10 Jan 2024 17:01:02 +0100, Ahmad Fatoum wrote:
>> Upstream DT changed /soc of NXP Layerscape LS1046A to be dma-coherent.
>> This means that:
>>
>> 1) Linux v6.1 expects bootloader to configure DMA masters to snoop
>> caches
On Wed, 10 Jan 2024 15:20:14 +0100, Sascha Hauer wrote:
> scripts/get_maintainer.pl prints "Maintained" on an otherwise empty
> line. Drop this wrong line as it triggers "b4 send" to try take this as
> an EMail address.
>
>
Applied, thanks!
[1/1] scripts/get_maintainer.pl: Drop wrong line
On Thu, 11 Jan 2024 08:34:12 +0100, Ahmad Fatoum wrote:
> We already have documentation for the member that was taken from Linux,
> but still managed to use it wrongly at multiple places that were
> recently fixed. To prevent such issues from reoccurring in the future,
> expand the documentation
On Wed, 10 Jan 2024 17:01:02 +0100, Ahmad Fatoum wrote:
> Upstream DT changed /soc of NXP Layerscape LS1046A to be dma-coherent.
> This means that:
>
> 1) Linux v6.1 expects bootloader to configure DMA masters to snoop
> caches
> 2) bootloader needs to skip cache maintenance when talking
On Wed, 10 Jan 2024 15:17:10 +0100, Sascha Hauer wrote:
> This contains a few fixes for the omap3-usb-loader tool
>
>
Applied, thanks!
[1/2] omap3-usb-loader: Fix compilation
commit: 542d86f3c1f9442a4a4bd224f95d2d7c07eb09a0
[2/2] omap3-usb-loader: Fix for big endian hosts
commit:
On 24-01-11, Marco Felsch wrote:
> An size of 4M seems quite large and upstream OP-TEE code mostly uses 2M
> for all i.MX platforms. However keep the 4M as default but make it
> configurable for integrators which want to use the autom. OF fixup
> logic.
>
> Signed-off-by: Marco Felsch
> ---
>
The function has space for up to 10 HAB events. On the off-chance that
there are more found, it will scribble them over stack memory.
Fix this by only collecting up to 10 events and printing a warning if
that's exceeded. Once we have reports that this issue manifests, we can
consider extending
char is generally unsigned on ARM, but we shouldn't rely on that. HAB
code does though and compare a char against 0xdb, which would never
succeed if chars were signed. Switch to an explicitly unsigned type to
fix this.
Signed-off-by: Ahmad Fatoum
---
v1 -> v2:
- no change
---
On 24-01-11, Ahmad Fatoum wrote:
> On 11.01.24 12:48, Marco Felsch wrote:
> > if (IS_ENABLED(CONFIG_FIRMWARE_IMX8MN_OPTEE)) {
> > @@ -305,9 +305,9 @@ __noreturn void
> > imx8mq_load_and_start_image_via_tfa(void)
> > const void *bl31;
> > size_t bl31_size;
> > void *bl33 = (void
On 24-01-11, Ahmad Fatoum wrote:
> On 11.01.24 12:48, Marco Felsch wrote:
> > Use the dynamic optee memory base address for the early mapping if
> > possible and fallback to the static mapping if the query failed.
> >
> > Signed-off-by: Marco Felsch
>
> This patch fails to apply on next.
char is generally unsigned on ARM, but we shouldn't rely on that. HAB
code does though and compare a char against 0xdb, which would never
succeed if chars were signed. Switch to an explicitly unsigned type to
fix this.
Signed-off-by: Ahmad Fatoum
---
drivers/hab/habv4.c | 4 ++--
1 file
The function has space for up to 10 HAB events. On the off-chance that
there are more found, it will scribble them over stack memory.
Fix this by only collecting up to 10 events and printing a warning if
that's exceeded. Once we have reports that this issue manifests, we can
consider extending
On 11.01.24 12:48, Marco Felsch wrote:
> Use the dynamic optee memory base address for the early mapping if
> possible and fallback to the static mapping if the query failed.
>
> Signed-off-by: Marco Felsch
This patch fails to apply on next.
> ---
> arch/arm/cpu/mmu_64.c | 14
On 11.01.24 12:48, Marco Felsch wrote:
> if (IS_ENABLED(CONFIG_FIRMWARE_IMX8MN_OPTEE)) {
> @@ -305,9 +305,9 @@ __noreturn void imx8mq_load_and_start_image_via_tfa(void)
> const void *bl31;
> size_t bl31_size;
> void *bl33 = (void *)MX8M_ATF_BL33_BASE_ADDR;
> - unsigned
This adds the initial support for the Linux soc framework which can be
used to register all SoC relevant informations. The framework can be
used by driver to check for errata for an specific soc(-revision) in the
future since this require porting the matching function.
For now it gathers all
Convert the i.MX8M machine init code to the previously introduced soc
framework. The soc driver was mostly copied from Linux with slightly
adaptions for barebox. To the soc driver is called during the
postcore_initcall to keep the level aligned with the previous imx_init().
The ocotp clock must
At an helper to load_and_start the image on arbitrary load addresses.
This should be taken with caution since it requires to configure the
TF-A correctly as well, therefore the functions are prefixt with '__'.
One use case of the new helper is to place OP-TEE at the very beginning
of the DRAM and
Instead of having three defines for the same just use the base
definition which is MX8M_ATF_BL33_BASE_ADDR and drop the others.
Signed-off-by: Marco Felsch
---
Documentation/boards/imx/zii-imx8mq-dev/openocd.cfg | 10 +-
arch/arm/boards/phytec-som-imx8mq/lowlevel.c| 2 +-
The OP-TEE binary can contain a header with useful information like
loadaddr and size. This commit adds the support to take the header
loadaddr into account. If the header is not found the common builtin
loadaddr is used.
Signed-off-by: Marco Felsch
---
arch/arm/mach-imx/atf.c | 27
The current code checks only if "/firmware/optee" exist on the builtin
dtb and applys the fixup if not found and if found nothing is done. If a
builtin dts contains the node but an external don't the fixup won't be
applied. Also if the external dts does have a node + the reserved memory
region
Try to set the dynamic optee memory base address if the builtin optee
binary had an header.
Signed-off-by: Marco Felsch
---
arch/arm/mach-imx/imx8m.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-imx/imx8m.c b/arch/arm/mach-imx/imx8m.c
index 90dc12ca18cc..6f8574199113
Make use of the platform provided optee memory base address. Fallback to
the current behaviour if the platform doesn't provide the optee memory
base.
Signed-off-by: Marco Felsch
---
drivers/tee/optee/of.c | 20
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git
Saving the bootrom log to the scratch area was the last open coded part.
Move the code to the scratch module to make the scratch handling
completely opaque.
Signed-off-by: Marco Felsch
---
arch/arm/mach-imx/atf.c | 12
arch/arm/mach-imx/romapi.c | 6 ++
The scatch code spread over the code base which is ok as long as we use
it for the bootrom-log only.
This commit bundles the scratch code into a own module to make it easier
to adapt later on and to make the scratch space independent of
CONFIG_ARCH_IMX_ROMAPI.
Signed-off-by: Marco Felsch
---
Use the dynamic optee memory base address for the early mapping if
possible and fallback to the static mapping if the query failed.
Signed-off-by: Marco Felsch
---
arch/arm/cpu/mmu_64.c | 14 --
arch/arm/mach-imx/esdctl.c | 4
common/Makefile| 2 +-
3 files
Signed-off-by: Marco Felsch
---
common/optee.c | 2 +-
include/tee/optee.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/optee.c b/common/optee.c
index 2ae28b172bbb..34667f1f51e0 100644
--- a/common/optee.c
+++ b/common/optee.c
@@ -8,7 +8,7 @@
static u64
Add a new scratch storage slot for possible optee-hdr information which
have to passed between barebox-pbl and barebox-proper. Reserve 512 bytes
between the bootrom-log and the optee-hdr in case the bootrom-log need
more space in the future.
Signed-off-by: Marco Felsch
---
An size of 4M seems quite large and upstream OP-TEE code mostly uses 2M
for all i.MX platforms. However keep the 4M as default but make it
configurable for integrators which want to use the autom. OF fixup
logic.
Signed-off-by: Marco Felsch
---
arch/arm/mach-imx/imx8m.c | 2 +-
common/Kconfig
OPTEE supports two header versions right now we do only support V1.
Signed-off-by: Marco Felsch
---
common/optee.c | 5 +
include/tee/optee.h | 3 ++-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/common/optee.c b/common/optee.c
index fd2b03d06d2d..6a8084839619 100644
Make the scratch layout opaque and provide required accessor functions
to make it easier to extent it later on.
Signed-off-by: Marco Felsch
---
arch/arm/mach-imx/romapi.c | 6 ++
arch/arm/mach-imx/scratch.c | 12 +++-
include/mach/imx/scratch.h | 6 ++
3 files changed, 15
Provide helper functions to set/get the optee memory base address
gathered previously from the builtin optee binary header.
Signed-off-by: Marco Felsch
---
common/optee.c | 27 +++
include/tee/optee.h | 2 ++
2 files changed, 29 insertions(+)
diff --git
Hi all,
by this series it is supported to load OP-TEE to random DRAM locations.
The location is parsed and configured if the builtin OP-TEE contains a
header-v1. For this to work we needed to cleanup the imx-scratch code
(patches1-4).
I've tested this series on i.MX8MM and i.MX8MP SoCs using the
From: Rouven Czerwinski
Guard the check by IS_ENABLED() to make it possible to verify 32-bit and
64-bit optee headers.
Signed-off-by: Rouven Czerwinski
Signed-off-by: Marco Felsch
---
common/optee.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/common/optee.c
On ARM64 OP-TEE loading requires to be in EL3 so we can't load OP-TEE
via bootm on these systems.
Signed-off-by: Marco Felsch
---
common/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/Kconfig b/common/Kconfig
index 76b28ceaafe0..1de76651fddf 100644
---
Make use of the already existing macros and fix the memory bus width for
the i.MX8MQ.
Signed-off-by: Marco Felsch
---
arch/arm/mach-imx/atf.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-imx/atf.c b/arch/arm/mach-imx/atf.c
index
Thanks!
Acked-by: Robin van der Gracht
On Thu, 11 Jan 2024 08:34:12 +0100
Ahmad Fatoum wrote:
> We already have documentation for the member that was taken from Linux,
> but still managed to use it wrongly at multiple places that were
> recently fixed. To prevent such issues from reoccurring
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