Re: [PATCH v2 0/9] at91: Support PMC clock bindings
Hi all.
> Sam Ravnborg (9):
> clocksource: Do not mix depends and select for ATMEL_PIT
> arm: at91: fix at91_configure_usart6 warning
> arm: at91: add SOC_SAMA5{D3,D4}
> clk: at91: add at91sam9260
> clk: at91: add at91sam9rl
> clk: at91: add at91sam9x5
> clk: at91: add sama5d2
> clk: at91: add sama5d4
This patch is bogus, fails to build.
> clk: at91: update to new bindings
Likewise, at least part of it.
Both issues discovered while working on adding DT support
to sama5d4 xplained board.
Will repost an updated series when I have it fixed.
Sam
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Re: [PATCH] dts: Revert at91 switch to new PMC clock bindings
On Sat, Feb 16, 2019 at 11:14:33PM +0100, Sam Ravnborg wrote: > Hi Ladislav > > > Recent DTS update brought in switch to the new PMC clock > > bindings, however we do not support that yet. Revert this > > change until PMC clock bindings support is implemented. > > I have now ported the clk code from the kernel so barebox > have support for PMC bindings. > Can you give it a try and see if this works for you. > > So far I have only tested this on at91sam9263ek - a DT enabled board. > It builds for non-DT boards. > > Patch needs a bit love before it is ready to submit. > Could I get early feedback that would be great. Updated patchset sent please try this is possible. Thanks, Sam ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH v2 1/9] clocksource: Do not mix depends and select for ATMEL_PIT
CLOCKSOURCE_ATMEL_PIT was both set to yes using depends on and using select. Use only select to set this non-visible symbol to 'y' Signed-off-by: Sam Ravnborg --- drivers/clocksource/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 7b04663d2..b0502c303 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -69,7 +69,6 @@ config CLOCKSOURCE_ROCKCHIP config CLOCKSOURCE_ATMEL_PIT bool - depends on SOC_AT91SAM9 || SOC_SAMA5 config CLOCKSOURCE_ARMV8_TIMER bool -- 2.12.0 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH v2 0/9] at91: Support PMC clock bindings
The following patchset add supports for the PMC clk
bindings for at91.
The patchset was tested on:
- at91sam9264ek - DT enabled
- sama5d4-xplained - non DT
The patchset includes sama5d2.c which is not used today.
I have a sama5d27-som1-ek board that I hope to find time to work
with and then this will be needed.
Patch 4-8 add drivers but do not wire then into the build.
This was done to somehow ease review of the final patch.
Patches are rather big but trying to split them up more
than already done seems not worth it.
Patch was made on top of:
12cd92023788fdc67ad72c6e7d96251a6234ca3e ("Merge branch 'for-next/rpi' into
next")
On stray patch sneaked in - to kill a warning.
The patchset triggers some checkpatch warnings:
- SPDX, the barebox variant of checkpatch is missing support for these (anyone?)
- Too long lines. As code is copied from the kernel I left them as-is
Comments/testing very welcome!
v2:
- Split up in smaller patches
- Fix builds in various configs
- Reworked Kconfig changes
- Fix checkpatch warnings (mostly whitespace)
v1:
- Posted to mailing list as a WIP patch
Sam
Sam Ravnborg (9):
clocksource: Do not mix depends and select for ATMEL_PIT
arm: at91: fix at91_configure_usart6 warning
arm: at91: add SOC_SAMA5{D3,D4}
clk: at91: add at91sam9260
clk: at91: add at91sam9rl
clk: at91: add at91sam9x5
clk: at91: add sama5d2
clk: at91: add sama5d4
clk: at91: update to new bindings
arch/arm/mach-at91/Kconfig | 31 +-
arch/arm/mach-at91/include/mach/board.h | 1 +
drivers/clk/at91/Makefile | 5 +
drivers/clk/at91/at91sam9260.c | 497
drivers/clk/at91/at91sam9rl.c | 177
drivers/clk/at91/at91sam9x5.c | 315
drivers/clk/at91/clk-generated.c| 185 ++--
drivers/clk/at91/clk-h32mx.c| 21 +-
drivers/clk/at91/clk-main.c | 112 +--
drivers/clk/at91/clk-master.c | 94 +-
drivers/clk/at91/clk-peripheral.c | 82 +-
drivers/clk/at91/clk-pll.c | 174 +--
drivers/clk/at91/clk-plldiv.c | 27 +-
drivers/clk/at91/clk-programmable.c | 83 +-
drivers/clk/at91/clk-slow.c | 33 +--
drivers/clk/at91/clk-smd.c | 33 +--
drivers/clk/at91/clk-system.c | 42 +--
drivers/clk/at91/clk-usb.c | 94 +-
drivers/clk/at91/clk-utmi.c | 100 ---
drivers/clk/at91/pmc.c | 248
drivers/clk/at91/pmc.h | 169 +++
drivers/clk/at91/sama5d2.c | 342 ++
drivers/clk/at91/sama5d4.c | 270 +
drivers/clocksource/Kconfig | 1 -
include/linux/clk.h | 7 +
include/soc/at91/atmel-sfr.h| 34 +++
26 files changed, 2216 insertions(+), 961 deletions(-)
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[PATCH v2 2/9] arm: at91: fix at91_configure_usart6 warning
Add declaration to silence following warning: arch/arm/mach-at91/sama5d4_devices.c:487:24: warning: no previous prototype for ‘at91_configure_usart6’ Signed-off-by: Sam Ravnborg --- arch/arm/mach-at91/include/mach/board.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h index 886f81e9a..4c4b51180 100644 --- a/arch/arm/mach-at91/include/mach/board.h +++ b/arch/arm/mach-at91/include/mach/board.h @@ -102,6 +102,7 @@ resource_size_t __init at91_configure_usart2(unsigned pins); resource_size_t __init at91_configure_usart3(unsigned pins); resource_size_t __init at91_configure_usart4(unsigned pins); resource_size_t __init at91_configure_usart5(unsigned pins); +resource_size_t __init at91_configure_usart6(unsigned pins); #if defined(CONFIG_DRIVER_SERIAL_ATMEL) static inline struct device_d * at91_register_uart(unsigned id, unsigned pins) -- 2.12.0 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH v2 6/9] clk: at91: add at91sam9x5
Add at91sam9x5 as part of supporting the PMC bindings for ARM at91.
The file will be wired into the build in a follow-up patch.
The file is a copy from kernel 5.0-rc6 modified to build
with barebox.
Signed-off-by: Sam Ravnborg
---
drivers/clk/at91/at91sam9x5.c | 315 ++
1 file changed, 315 insertions(+)
create mode 100644 drivers/clk/at91/at91sam9x5.c
diff --git a/drivers/clk/at91/at91sam9x5.c b/drivers/clk/at91/at91sam9x5.c
new file mode 100644
index 0..5e0aacfbf
--- /dev/null
+++ b/drivers/clk/at91/at91sam9x5.c
@@ -0,0 +1,315 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+
+#include "pmc.h"
+
+static const struct clk_master_characteristics mck_characteristics = {
+ .output = { .min = 0, .max = 1 },
+ .divisors = { 1, 2, 4, 3 },
+ .have_div3_pres = 1,
+};
+
+static u8 plla_out[] = { 0, 1, 2, 3, 0, 1, 2, 3 };
+
+static u16 plla_icpll[] = { 0, 0, 0, 0, 1, 1, 1, 1 };
+
+static struct clk_range plla_outputs[] = {
+ { .min = 74500, .max = 8 },
+ { .min = 69500, .max = 75000 },
+ { .min = 64500, .max = 7 },
+ { .min = 59500, .max = 65000 },
+ { .min = 54500, .max = 6 },
+ { .min = 49500, .max = 55500 },
+ { .min = 44500, .max = 5 },
+ { .min = 4, .max = 45000 },
+};
+
+static const struct clk_pll_characteristics plla_characteristics = {
+ .input = { .min = 200, .max = 3200 },
+ .num_output = ARRAY_SIZE(plla_outputs),
+ .output = plla_outputs,
+ .icpll = plla_icpll,
+ .out = plla_out,
+};
+
+static const struct {
+ char *n;
+ char *p;
+ u8 id;
+} at91sam9x5_systemck[] = {
+ { .n = "ddrck", .p = "masterck", .id = 2 },
+ { .n = "smdck", .p = "smdclk", .id = 4 },
+ { .n = "uhpck", .p = "usbck",.id = 6 },
+ { .n = "udpck", .p = "usbck",.id = 7 },
+ { .n = "pck0", .p = "prog0",.id = 8 },
+ { .n = "pck1", .p = "prog1",.id = 9 },
+};
+
+struct pck {
+ char *n;
+ u8 id;
+};
+
+static const struct pck at91sam9x5_periphck[] = {
+ { .n = "pioAB_clk", .id = 2, },
+ { .n = "pioCD_clk", .id = 3, },
+ { .n = "smd_clk",.id = 4, },
+ { .n = "usart0_clk", .id = 5, },
+ { .n = "usart1_clk", .id = 6, },
+ { .n = "usart2_clk", .id = 7, },
+ { .n = "twi0_clk", .id = 9, },
+ { .n = "twi1_clk", .id = 10, },
+ { .n = "twi2_clk", .id = 11, },
+ { .n = "mci0_clk", .id = 12, },
+ { .n = "spi0_clk", .id = 13, },
+ { .n = "spi1_clk", .id = 14, },
+ { .n = "uart0_clk", .id = 15, },
+ { .n = "uart1_clk", .id = 16, },
+ { .n = "tcb0_clk", .id = 17, },
+ { .n = "pwm_clk",.id = 18, },
+ { .n = "adc_clk",.id = 19, },
+ { .n = "dma0_clk", .id = 20, },
+ { .n = "dma1_clk", .id = 21, },
+ { .n = "uhphs_clk", .id = 22, },
+ { .n = "udphs_clk", .id = 23, },
+ { .n = "mci1_clk", .id = 26, },
+ { .n = "ssc0_clk", .id = 28, },
+};
+
+static const struct pck at91sam9g15_periphck[] = {
+ { .n = "lcdc_clk", .id = 25, },
+ { /* sentinel */}
+};
+
+static const struct pck at91sam9g25_periphck[] = {
+ { .n = "usart3_clk", .id = 8, },
+ { .n = "macb0_clk", .id = 24, },
+ { .n = "isi_clk", .id = 25, },
+ { /* sentinel */}
+};
+
+static const struct pck at91sam9g35_periphck[] = {
+ { .n = "macb0_clk", .id = 24, },
+ { .n = "lcdc_clk", .id = 25, },
+ { /* sentinel */}
+};
+
+static const struct pck at91sam9x25_periphck[] = {
+ { .n = "usart3_clk", .id = 8, },
+ { .n = "macb0_clk", .id = 24, },
+ { .n = "macb1_clk", .id = 27, },
+ { .n = "can0_clk", .id = 29, },
+ { .n = "can1_clk", .id = 30, },
+ { /* sentinel */}
+};
+
+static const struct pck at91sam9x35_periphck[] = {
+ { .n = "macb0_clk", .id = 24, },
+ { .n = "lcdc_clk", .id = 25, },
+ { .n = "can0_clk", .id = 29, },
+ { .n = "can1_clk", .id = 30, },
+ { /* sentinel */}
+};
+
+static void __init at91sam9x5_pmc_setup(struct device_node *np,
+ const struct pck *extra_pcks,
+ bool has_lcdck)
+{
+ struct clk_range range = CLK_RANGE(0, 0);
+ const char *slck_name, *mainxtal_name;
+ struct pmc_data *at91sam9x5_pmc;
+ const char *parent_names[6];
+ struct regmap *regmap;
+ struct clk *hw;
+ int i;
+ bool bypass;
+
+ i = of_property_match_string(np, "clock-names", "slow_clk");
+ if (i < 0)
+ return;
+
+ slck_name = of_clk_get_parent_name(np, i);
+
+ i = of_property_match_string(np, "clock-names", "main_xtal");
+ if (i < 0)
+
[PATCH v2 8/9] clk: at91: add sama5d4
Add sama5d4 as part of supporting the PMC bindings for ARM at91.
The file will be wired into the build in a follow-up patch.
The file is a copy from kernel 5.0-rc6 modified to build
with barebox.
Signed-off-by: Sam Ravnborg
---
drivers/clk/at91/sama5d4.c | 270 +
1 file changed, 270 insertions(+)
create mode 100644 drivers/clk/at91/sama5d4.c
diff --git a/drivers/clk/at91/sama5d4.c b/drivers/clk/at91/sama5d4.c
new file mode 100644
index 0..090a3503d
--- /dev/null
+++ b/drivers/clk/at91/sama5d4.c
@@ -0,0 +1,270 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+
+#include "pmc.h"
+
+static const struct clk_master_characteristics mck_characteristics = {
+ .output = { .min = 12500, .max = 2 },
+ .divisors = { 1, 2, 4, 3 },
+};
+
+static u8 plla_out[] = { 0 };
+
+static u16 plla_icpll[] = { 0 };
+
+static struct clk_range plla_outputs[] = {
+ { .min = 6, .max = 12 },
+};
+
+static const struct clk_pll_characteristics plla_characteristics = {
+ .input = { .min = 1200, .max = 1200 },
+ .num_output = ARRAY_SIZE(plla_outputs),
+ .output = plla_outputs,
+ .icpll = plla_icpll,
+ .out = plla_out,
+};
+
+static const struct {
+ char *n;
+ char *p;
+ u8 id;
+} sama5d4_systemck[] = {
+ { .n = "ddrck", .p = "masterck", .id = 2 },
+ { .n = "lcdck", .p = "masterck", .id = 3 },
+ { .n = "smdck", .p = "smdclk", .id = 4 },
+ { .n = "uhpck", .p = "usbck",.id = 6 },
+ { .n = "udpck", .p = "usbck",.id = 7 },
+ { .n = "pck0", .p = "prog0",.id = 8 },
+ { .n = "pck1", .p = "prog1",.id = 9 },
+ { .n = "pck2", .p = "prog2",.id = 10 },
+};
+
+static const struct {
+ char *n;
+ u8 id;
+} sama5d4_periph32ck[] = {
+ { .n = "pioD_clk", .id = 5 },
+ { .n = "usart0_clk", .id = 6 },
+ { .n = "usart1_clk", .id = 7 },
+ { .n = "icm_clk", .id = 9 },
+ { .n = "aes_clk", .id = 12 },
+ { .n = "tdes_clk", .id = 14 },
+ { .n = "sha_clk", .id = 15 },
+ { .n = "matrix1_clk", .id = 17 },
+ { .n = "hsmc_clk", .id = 22 },
+ { .n = "pioA_clk", .id = 23 },
+ { .n = "pioB_clk", .id = 24 },
+ { .n = "pioC_clk", .id = 25 },
+ { .n = "pioE_clk", .id = 26 },
+ { .n = "uart0_clk", .id = 27 },
+ { .n = "uart1_clk", .id = 28 },
+ { .n = "usart2_clk", .id = 29 },
+ { .n = "usart3_clk", .id = 30 },
+ { .n = "usart4_clk", .id = 31 },
+ { .n = "twi0_clk", .id = 32 },
+ { .n = "twi1_clk", .id = 33 },
+ { .n = "twi2_clk", .id = 34 },
+ { .n = "mci0_clk", .id = 35 },
+ { .n = "mci1_clk", .id = 36 },
+ { .n = "spi0_clk", .id = 37 },
+ { .n = "spi1_clk", .id = 38 },
+ { .n = "spi2_clk", .id = 39 },
+ { .n = "tcb0_clk", .id = 40 },
+ { .n = "tcb1_clk", .id = 41 },
+ { .n = "tcb2_clk", .id = 42 },
+ { .n = "pwm_clk", .id = 43 },
+ { .n = "adc_clk", .id = 44 },
+ { .n = "dbgu_clk", .id = 45 },
+ { .n = "uhphs_clk", .id = 46 },
+ { .n = "udphs_clk", .id = 47 },
+ { .n = "ssc0_clk", .id = 48 },
+ { .n = "ssc1_clk", .id = 49 },
+ { .n = "trng_clk", .id = 53 },
+ { .n = "macb0_clk", .id = 54 },
+ { .n = "macb1_clk", .id = 55 },
+ { .n = "fuse_clk", .id = 57 },
+ { .n = "securam_clk", .id = 59 },
+ { .n = "smd_clk", .id = 61 },
+ { .n = "twi3_clk", .id = 62 },
+ { .n = "catb_clk", .id = 63 },
+};
+
+static const struct {
+ char *n;
+ u8 id;
+} sama5d4_periphck[] = {
+ { .n = "dma0_clk", .id = 8 },
+ { .n = "cpkcc_clk", .id = 10 },
+ { .n = "aesb_clk", .id = 13 },
+ { .n = "mpddr_clk", .id = 16 },
+ { .n = "matrix0_clk", .id = 18 },
+ { .n = "vdec_clk", .id = 19 },
+ { .n = "dma1_clk", .id = 50 },
+ { .n = "lcdc_clk", .id = 51 },
+ { .n = "isi_clk", .id = 52 },
+};
+
+static void __init sama5d4_pmc_setup(struct device_node *np)
+{
+ struct clk_range range = CLK_RANGE(0, 0);
+ const char *slck_name, *mainxtal_name;
+ struct pmc_data *sama5d4_pmc;
+ const char *parent_names[5];
+ struct regmap *regmap;
+ struct clk *hw;
+ int i;
+ bool bypass;
+
+ i = of_property_match_string(np, "clock-names", "slow_clk");
+ if (i < 0)
+ return;
+
+ slck_name = of_clk_get_parent_name(np, i);
+
+ i = of_property_match_string(np, "clock-names", "main_xtal");
+ if (i < 0)
+ return;
+ mainxtal_name = of_clk_get_parent_name(np, i);
+
+ regmap = syscon_node_to_regmap(np);
+ if (IS_ERR(regmap))
+ return;
+
+ sama5d4_pmc = pmc_data_allocate(PMC_MCK2 + 1,
+ nck(sama5d4_systemck),
+
[PATCH v2 7/9] clk: at91: add sama5d2
Add sama5d2 as part of supporting the PMC bindings for ARM at91.
The file will be wired into the build in a follow-up patch.
The file is a copy from kernel 5.0-rc6 modified to build
with barebox.
Signed-off-by: Sam Ravnborg
---
drivers/clk/at91/sama5d2.c | 342 +
1 file changed, 342 insertions(+)
create mode 100644 drivers/clk/at91/sama5d2.c
diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c
new file mode 100644
index 0..dc15f7d9c
--- /dev/null
+++ b/drivers/clk/at91/sama5d2.c
@@ -0,0 +1,342 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+
+#include "pmc.h"
+
+static const struct clk_master_characteristics mck_characteristics = {
+ .output = { .min = 12400, .max = 16600 },
+ .divisors = { 1, 2, 4, 3 },
+};
+
+static u8 plla_out[] = { 0 };
+
+static u16 plla_icpll[] = { 0 };
+
+static struct clk_range plla_outputs[] = {
+ { .min = 6, .max = 12 },
+};
+
+static const struct clk_pll_characteristics plla_characteristics = {
+ .input = { .min = 1200, .max = 1200 },
+ .num_output = ARRAY_SIZE(plla_outputs),
+ .output = plla_outputs,
+ .icpll = plla_icpll,
+ .out = plla_out,
+};
+
+static const struct {
+ char *n;
+ char *p;
+ u8 id;
+} sama5d2_systemck[] = {
+ { .n = "ddrck", .p = "masterck", .id = 2 },
+ { .n = "lcdck", .p = "masterck", .id = 3 },
+ { .n = "uhpck", .p = "usbck",.id = 6 },
+ { .n = "udpck", .p = "usbck",.id = 7 },
+ { .n = "pck0", .p = "prog0",.id = 8 },
+ { .n = "pck1", .p = "prog1",.id = 9 },
+ { .n = "pck2", .p = "prog2",.id = 10 },
+ { .n = "iscck", .p = "masterck", .id = 18 },
+};
+
+static const struct {
+ char *n;
+ u8 id;
+ struct clk_range r;
+} sama5d2_periph32ck[] = {
+ { .n = "macb0_clk", .id = 5, .r = { .min = 0, .max = 8300 }, },
+ { .n = "tdes_clk",.id = 11, .r = { .min = 0, .max = 8300 }, },
+ { .n = "matrix1_clk", .id = 14, },
+ { .n = "hsmc_clk",.id = 17, },
+ { .n = "pioA_clk",.id = 18, .r = { .min = 0, .max = 8300 }, },
+ { .n = "flx0_clk",.id = 19, .r = { .min = 0, .max = 8300 }, },
+ { .n = "flx1_clk",.id = 20, .r = { .min = 0, .max = 8300 }, },
+ { .n = "flx2_clk",.id = 21, .r = { .min = 0, .max = 8300 }, },
+ { .n = "flx3_clk",.id = 22, .r = { .min = 0, .max = 8300 }, },
+ { .n = "flx4_clk",.id = 23, .r = { .min = 0, .max = 8300 }, },
+ { .n = "uart0_clk", .id = 24, .r = { .min = 0, .max = 8300 }, },
+ { .n = "uart1_clk", .id = 25, .r = { .min = 0, .max = 8300 }, },
+ { .n = "uart2_clk", .id = 26, .r = { .min = 0, .max = 8300 }, },
+ { .n = "uart3_clk", .id = 27, .r = { .min = 0, .max = 8300 }, },
+ { .n = "uart4_clk", .id = 28, .r = { .min = 0, .max = 8300 }, },
+ { .n = "twi0_clk",.id = 29, .r = { .min = 0, .max = 8300 }, },
+ { .n = "twi1_clk",.id = 30, .r = { .min = 0, .max = 8300 }, },
+ { .n = "spi0_clk",.id = 33, .r = { .min = 0, .max = 8300 }, },
+ { .n = "spi1_clk",.id = 34, .r = { .min = 0, .max = 8300 }, },
+ { .n = "tcb0_clk",.id = 35, .r = { .min = 0, .max = 8300 }, },
+ { .n = "tcb1_clk",.id = 36, .r = { .min = 0, .max = 8300 }, },
+ { .n = "pwm_clk", .id = 38, .r = { .min = 0, .max = 8300 }, },
+ { .n = "adc_clk", .id = 40, .r = { .min = 0, .max = 8300 }, },
+ { .n = "uhphs_clk", .id = 41, .r = { .min = 0, .max = 8300 }, },
+ { .n = "udphs_clk", .id = 42, .r = { .min = 0, .max = 8300 }, },
+ { .n = "ssc0_clk",.id = 43, .r = { .min = 0, .max = 8300 }, },
+ { .n = "ssc1_clk",.id = 44, .r = { .min = 0, .max = 8300 }, },
+ { .n = "trng_clk",.id = 47, .r = { .min = 0, .max = 8300 }, },
+ { .n = "pdmic_clk", .id = 48, .r = { .min = 0, .max = 8300 }, },
+ { .n = "securam_clk", .id = 51, },
+ { .n = "i2s0_clk",.id = 54, .r = { .min = 0, .max = 8300 }, },
+ { .n = "i2s1_clk",.id = 55, .r = { .min = 0, .max = 8300 }, },
+ { .n = "can0_clk",.id = 56, .r = { .min = 0, .max = 8300 }, },
+ { .n = "can1_clk",.id = 57, .r = { .min = 0, .max = 8300 }, },
+ { .n = "classd_clk", .id = 59, .r = { .min = 0, .max = 8300 }, },
+};
+
+static const struct {
+ char *n;
+ u8 id;
+} sama5d2_periphck[] = {
+ { .n = "dma0_clk",.id = 6, },
+ { .n = "dma1_clk",.id = 7, },
+ { .n = "aes_clk", .id = 9, },
+ { .n = "aesb_clk",.id = 10, },
+ { .n = "sha_clk", .id = 12, },
+ { .n = "mpddr_clk", .id = 13, },
+ { .n = "matrix0_clk",
[PATCH v2 5/9] clk: at91: add at91sam9rl
Add at91sam9rl as part of supporting the PMC bindings for ARM at91.
The file will be wired into the build in a follow-up patch.
The file is a copy from kernel 5.0-rc6 modified to build
with barebox.
Signed-off-by: Sam Ravnborg
---
drivers/clk/at91/at91sam9rl.c | 177 ++
1 file changed, 177 insertions(+)
create mode 100644 drivers/clk/at91/at91sam9rl.c
diff --git a/drivers/clk/at91/at91sam9rl.c b/drivers/clk/at91/at91sam9rl.c
new file mode 100644
index 0..82acb3825
--- /dev/null
+++ b/drivers/clk/at91/at91sam9rl.c
@@ -0,0 +1,177 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+
+#include "pmc.h"
+
+static const struct clk_master_characteristics sam9rl_mck_characteristics = {
+ .output = { .min = 0, .max = 9400 },
+ .divisors = { 1, 2, 4, 0 },
+};
+
+static u8 sam9rl_plla_out[] = { 0, 2 };
+
+static struct clk_range sam9rl_plla_outputs[] = {
+ { .min = 8000, .max = 2 },
+ { .min = 19000, .max = 24000 },
+};
+
+static const struct clk_pll_characteristics sam9rl_plla_characteristics = {
+ .input = { .min = 100, .max = 3200 },
+ .num_output = ARRAY_SIZE(sam9rl_plla_outputs),
+ .output = sam9rl_plla_outputs,
+ .out = sam9rl_plla_out,
+};
+
+static const struct {
+ char *n;
+ char *p;
+ u8 id;
+} at91sam9rl_systemck[] = {
+ { .n = "pck0", .p = "prog0",.id = 8 },
+ { .n = "pck1", .p = "prog1",.id = 9 },
+};
+
+static const struct {
+ char *n;
+ u8 id;
+} at91sam9rl_periphck[] = {
+ { .n = "pioA_clk", .id = 2, },
+ { .n = "pioB_clk", .id = 3, },
+ { .n = "pioC_clk", .id = 4, },
+ { .n = "pioD_clk", .id = 5, },
+ { .n = "usart0_clk", .id = 6, },
+ { .n = "usart1_clk", .id = 7, },
+ { .n = "usart2_clk", .id = 8, },
+ { .n = "usart3_clk", .id = 9, },
+ { .n = "mci0_clk", .id = 10, },
+ { .n = "twi0_clk", .id = 11, },
+ { .n = "twi1_clk", .id = 12, },
+ { .n = "spi0_clk", .id = 13, },
+ { .n = "ssc0_clk", .id = 14, },
+ { .n = "ssc1_clk", .id = 15, },
+ { .n = "tc0_clk",.id = 16, },
+ { .n = "tc1_clk",.id = 17, },
+ { .n = "tc2_clk",.id = 18, },
+ { .n = "pwm_clk",.id = 19, },
+ { .n = "adc_clk",.id = 20, },
+ { .n = "dma0_clk", .id = 21, },
+ { .n = "udphs_clk", .id = 22, },
+ { .n = "lcd_clk",.id = 23, },
+};
+
+static void __init at91sam9rl_pmc_setup(struct device_node *np)
+{
+ const char *slck_name, *mainxtal_name;
+ struct pmc_data *at91sam9rl_pmc;
+ const char *parent_names[6];
+ struct regmap *regmap;
+ struct clk *hw;
+ int i;
+
+ i = of_property_match_string(np, "clock-names", "slow_clk");
+ if (i < 0)
+ return;
+
+ slck_name = of_clk_get_parent_name(np, i);
+
+ i = of_property_match_string(np, "clock-names", "main_xtal");
+ if (i < 0)
+ return;
+ mainxtal_name = of_clk_get_parent_name(np, i);
+
+ regmap = syscon_node_to_regmap(np);
+ if (IS_ERR(regmap))
+ return;
+
+ at91sam9rl_pmc = pmc_data_allocate(PMC_MAIN + 1,
+ nck(at91sam9rl_systemck),
+ nck(at91sam9rl_periphck), 0);
+ if (!at91sam9rl_pmc)
+ return;
+
+ hw = at91_clk_register_rm9200_main(regmap, "mainck", mainxtal_name);
+ if (IS_ERR(hw))
+ goto err_free;
+
+ at91sam9rl_pmc->chws[PMC_MAIN] = hw;
+
+ hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
+ _pll_layout,
+ _plla_characteristics);
+ if (IS_ERR(hw))
+ goto err_free;
+
+ hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck");
+ if (IS_ERR(hw))
+ goto err_free;
+
+ at91sam9rl_pmc->chws[PMC_UTMI] = hw;
+
+ parent_names[0] = slck_name;
+ parent_names[1] = "mainck";
+ parent_names[2] = "pllack";
+ parent_names[3] = "utmick";
+ hw = at91_clk_register_master(regmap, "masterck", 4, parent_names,
+ _master_layout,
+ _mck_characteristics);
+ if (IS_ERR(hw))
+ goto err_free;
+
+ at91sam9rl_pmc->chws[PMC_MCK] = hw;
+
+ parent_names[0] = slck_name;
+ parent_names[1] = "mainck";
+ parent_names[2] = "pllack";
+ parent_names[3] = "utmick";
+ parent_names[4] = "masterck";
+ for (i = 0; i < 2; i++) {
+ char *name;
+
+ name = xasprintf("prog%d", i);
+
+ hw = at91_clk_register_programmable(regmap, name,
+ parent_names, 5,
[PATCH v2 4/9] clk: at91: add at91sam9260
Add at91sam9260 as part of supporting the PMC bindings for ARM at91.
The file will be wired into the build in a follow-up patch.
The file is a copy from kernel 5.0-rc6 modified to build
with barebox.
Signed-off-by: Sam Ravnborg
---
drivers/clk/at91/at91sam9260.c | 497 +
1 file changed, 497 insertions(+)
create mode 100644 drivers/clk/at91/at91sam9260.c
diff --git a/drivers/clk/at91/at91sam9260.c b/drivers/clk/at91/at91sam9260.c
new file mode 100644
index 0..ac67dcc8f
--- /dev/null
+++ b/drivers/clk/at91/at91sam9260.c
@@ -0,0 +1,497 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+
+#include "pmc.h"
+
+struct sck {
+ char *n;
+ char *p;
+ u8 id;
+};
+
+struct pck {
+ char *n;
+ u8 id;
+};
+
+struct at91sam926x_data {
+ const struct clk_pll_layout *plla_layout;
+ const struct clk_pll_characteristics *plla_characteristics;
+ const struct clk_pll_layout *pllb_layout;
+ const struct clk_pll_characteristics *pllb_characteristics;
+ const struct clk_master_characteristics *mck_characteristics;
+ const struct sck *sck;
+ const struct pck *pck;
+ u8 num_sck;
+ u8 num_pck;
+ u8 num_progck;
+ bool has_slck;
+};
+
+static const struct clk_master_characteristics sam9260_mck_characteristics = {
+ .output = { .min = 0, .max = 10500 },
+ .divisors = { 1, 2, 4, 0 },
+};
+
+static u8 sam9260_plla_out[] = { 0, 2 };
+
+static u16 sam9260_plla_icpll[] = { 1, 1 };
+
+static struct clk_range sam9260_plla_outputs[] = {
+ { .min = 8000, .max = 16000 },
+ { .min = 15000, .max = 24000 },
+};
+
+static const struct clk_pll_characteristics sam9260_plla_characteristics = {
+ .input = { .min = 100, .max = 3200 },
+ .num_output = ARRAY_SIZE(sam9260_plla_outputs),
+ .output = sam9260_plla_outputs,
+ .icpll = sam9260_plla_icpll,
+ .out = sam9260_plla_out,
+};
+
+static u8 sam9260_pllb_out[] = { 1 };
+
+static u16 sam9260_pllb_icpll[] = { 1 };
+
+static struct clk_range sam9260_pllb_outputs[] = {
+ { .min = 7000, .max = 13000 },
+};
+
+static const struct clk_pll_characteristics sam9260_pllb_characteristics = {
+ .input = { .min = 100, .max = 500 },
+ .num_output = ARRAY_SIZE(sam9260_pllb_outputs),
+ .output = sam9260_pllb_outputs,
+ .icpll = sam9260_pllb_icpll,
+ .out = sam9260_pllb_out,
+};
+
+static const struct sck at91sam9260_systemck[] = {
+ { .n = "uhpck", .p = "usbck",.id = 6 },
+ { .n = "udpck", .p = "usbck",.id = 7 },
+ { .n = "pck0", .p = "prog0",.id = 8 },
+ { .n = "pck1", .p = "prog1",.id = 9 },
+};
+
+static const struct pck at91sam9260_periphck[] = {
+ { .n = "pioA_clk", .id = 2 },
+ { .n = "pioB_clk", .id = 3 },
+ { .n = "pioC_clk", .id = 4 },
+ { .n = "adc_clk",.id = 5 },
+ { .n = "usart0_clk", .id = 6 },
+ { .n = "usart1_clk", .id = 7 },
+ { .n = "usart2_clk", .id = 8 },
+ { .n = "mci0_clk", .id = 9 },
+ { .n = "udc_clk",.id = 10 },
+ { .n = "twi0_clk", .id = 11 },
+ { .n = "spi0_clk", .id = 12 },
+ { .n = "spi1_clk", .id = 13 },
+ { .n = "ssc0_clk", .id = 14 },
+ { .n = "tc0_clk",.id = 17 },
+ { .n = "tc1_clk",.id = 18 },
+ { .n = "tc2_clk",.id = 19 },
+ { .n = "ohci_clk", .id = 20 },
+ { .n = "macb0_clk", .id = 21 },
+ { .n = "isi_clk",.id = 22 },
+ { .n = "usart3_clk", .id = 23 },
+ { .n = "uart0_clk", .id = 24 },
+ { .n = "uart1_clk", .id = 25 },
+ { .n = "tc3_clk",.id = 26 },
+ { .n = "tc4_clk",.id = 27 },
+ { .n = "tc5_clk",.id = 28 },
+};
+
+static struct at91sam926x_data at91sam9260_data = {
+ .plla_layout = _pll_layout,
+ .plla_characteristics = _plla_characteristics,
+ .pllb_layout = _pll_layout,
+ .pllb_characteristics = _pllb_characteristics,
+ .mck_characteristics = _mck_characteristics,
+ .sck = at91sam9260_systemck,
+ .num_sck = ARRAY_SIZE(at91sam9260_systemck),
+ .pck = at91sam9260_periphck,
+ .num_pck = ARRAY_SIZE(at91sam9260_periphck),
+ .num_progck = 2,
+ .has_slck = true,
+};
+
+static const struct clk_master_characteristics sam9g20_mck_characteristics = {
+ .output = { .min = 0, .max = 13300 },
+ .divisors = { 1, 2, 4, 6 },
+};
+
+static u8 sam9g20_plla_out[] = { 0, 1, 2, 3, 0, 1, 2, 3 };
+
+static u16 sam9g20_plla_icpll[] = { 0, 0, 0, 0, 1, 1, 1, 1 };
+
+static struct clk_range sam9g20_plla_outputs[] = {
+ { .min = 74500, .max = 8 },
+ { .min = 69500, .max = 75000 },
+ { .min = 64500, .max = 7 },
+ { .min = 59500, .max = 65000 },
+ { .min =
[PATCH v2 3/9] arm: at91: add SOC_SAMA5{D3,D4}
This split allows us to distingush between the two SOC types. The SOC_SAMA5D3 and SOC_SAMA5D4 symbols will be used in following patches. Signed-off-by: Sam Ravnborg --- arch/arm/mach-at91/Kconfig | 14 -- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index b101e61d2..a2737a367 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -57,6 +57,16 @@ config SOC_AT91SAM9 config SOC_SAMA5 bool select CPU_V7 + +config SOC_SAMA5D3 + bool + select SOC_SAMA5 + select AT91SAM9_SMC + select CLOCKSOURCE_ATMEL_PIT + +config SOC_SAMA5D4 + bool + select SOC_SAMA5 select AT91SAM9_SMC select CLOCKSOURCE_ATMEL_PIT @@ -188,14 +198,14 @@ config ARCH_AT91SAM9N12 config ARCH_SAMA5D3 bool "SAMA5D3x" - select SOC_SAMA5 + select SOC_SAMA5D3 select HAVE_AT91_DBGU1 select HAS_MACB select HAVE_MACH_ARM_HEAD config ARCH_SAMA5D4 bool "SAMA5D4" - select SOC_SAMA5 + select SOC_SAMA5D4 select HAVE_AT91_DBGU2 select HAS_MACB select HAVE_MACH_ARM_HEAD -- 2.12.0 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH v2 9/9] clk: at91: update to new bindings
Based on kernel 5.0-rc6 update at91 clk support to match the new PMC bindings. Manually added all changes done in the kernel from 4.9-rc3 to 5.0-rc6. New drivers required was added as seperate commits. The kernel has a dt-compat file for all the backward compatibility code. As barebox has only a few DT enabled at91 targets this was not ported over. clk-programmable saw some extra changes - it had never been bulit. It is used only by at91sama5d2 - and barebox has no baord support for this cpu (yet). For the SOC config symbols updated these to match the kernel, to enable the same set of clk features in barebox as in the kernel. In the kernel CLK_OF_DECLARE_DRIVER() can be used for a two step init. In barebox this is a simple one step init. It was added to have less differences between the kernel and the barebox versions of the drivers. Signed-off-by: Sam Ravnborg --- arch/arm/mach-at91/Kconfig | 17 ++- drivers/clk/at91/Makefile | 5 + drivers/clk/at91/clk-generated.c| 185 +-- drivers/clk/at91/clk-h32mx.c| 21 +-- drivers/clk/at91/clk-main.c | 112 +--- drivers/clk/at91/clk-master.c | 94 +- drivers/clk/at91/clk-peripheral.c | 82 +--- drivers/clk/at91/clk-pll.c | 174 + drivers/clk/at91/clk-plldiv.c | 27 +--- drivers/clk/at91/clk-programmable.c | 83 +--- drivers/clk/at91/clk-slow.c | 33 + drivers/clk/at91/clk-smd.c | 33 + drivers/clk/at91/clk-system.c | 42 +- drivers/clk/at91/clk-usb.c | 94 +- drivers/clk/at91/clk-utmi.c | 100 +-- drivers/clk/at91/pmc.c | 248 drivers/clk/at91/pmc.h | 169 include/linux/clk.h | 7 + include/soc/at91/atmel-sfr.h| 34 + 19 files changed, 602 insertions(+), 958 deletions(-) create mode 100644 include/soc/at91/atmel-sfr.h diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index a2737a367..344344429 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -53,6 +53,9 @@ config SOC_AT91SAM9 select AT91SAM9_SMC select CLOCKSOURCE_ATMEL_PIT select PINCTRL + select HAVE_AT91_SMD + select HAVE_AT91_USB_CLK + select HAVE_AT91_UTMI config SOC_SAMA5 bool @@ -63,12 +66,19 @@ config SOC_SAMA5D3 select SOC_SAMA5 select AT91SAM9_SMC select CLOCKSOURCE_ATMEL_PIT + select HAVE_AT91_SMD + select HAVE_AT91_USB_CLK + select HAVE_AT91_UTMI config SOC_SAMA5D4 bool select SOC_SAMA5 select AT91SAM9_SMC select CLOCKSOURCE_ATMEL_PIT + select HAVE_AT91_H32MX + select HAVE_AT91_SMD + select HAVE_AT91_USB_CLK + select HAVE_AT91_UTMI config ARCH_TEXT_BASE hex @@ -92,8 +102,9 @@ comment "Atmel AT91 System-on-Chip" config SOC_AT91RM9200 bool select CPU_ARM920T - select HAVE_AT91_DBGU0 select HAS_AT91_ETHER + select HAVE_AT91_DBGU0 + select HAVE_AT91_USB_CLK config SOC_AT91SAM9260 bool @@ -132,9 +143,6 @@ config SOC_AT91SAM9X5 select SOC_AT91SAM9 select HAVE_AT91_DBGU0 select HAS_MACB - select HAVE_AT91_SMD - select HAVE_AT91_USB_CLK - select HAVE_AT91_UTMI select COMMON_CLK_OF_PROVIDER help Select this if you are using one of Atmel's AT91SAM9x5 family SoC. @@ -532,7 +540,6 @@ config MACH_AT91SAM9263EK depends on ARCH_AT91SAM9263 select OFDEVICE select COMMON_CLK_OF_PROVIDER - select HAVE_AT91_USB_CLK select HAVE_NAND_ATMEL_BUSWIDTH_16 select HAVE_AT91_BOOTSTRAP select AT91SAM926X_BOARD_INIT diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile index 13e67bd35..ec41c15fa 100644 --- a/drivers/clk/at91/Makefile +++ b/drivers/clk/at91/Makefile @@ -11,3 +11,8 @@ obj-$(CONFIG_HAVE_AT91_USB_CLK) += clk-usb.o obj-$(CONFIG_HAVE_AT91_SMD)+= clk-smd.o obj-$(CONFIG_HAVE_AT91_H32MX) += clk-h32mx.o obj-$(CONFIG_HAVE_AT91_GENERATED_CLK) += clk-generated.o +obj-$(CONFIG_SOC_AT91SAM9) += at91sam9260.o +obj-$(CONFIG_SOC_AT91SAM9) += at91sam9rl.o +obj-$(CONFIG_SOC_AT91SAM9) += at91sam9x5.o +obj-$(CONFIG_SOC_SAMA5D2) += sama5d2.o +obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o diff --git a/drivers/clk/at91/clk-generated.c b/drivers/clk/at91/clk-generated.c index 4e1cd5aa6..60516ca10 100644 --- a/drivers/clk/at91/clk-generated.c +++ b/drivers/clk/at91/clk-generated.c @@ -11,26 +11,23 @@ * */ -#include -#include +#include +#include +#include +#include +#include #include -#include -#include -#include +#include +#include #include "pmc.h" -#define PERIPHERAL_MAX
Re: [PATCH v2 0/9] at91: Support PMC clock bindings
Hi Sam,
On Sun, Feb 17, 2019 at 07:44:15PM +0100, Sam Ravnborg wrote:
> Hi all.
>
> > Sam Ravnborg (9):
> > clocksource: Do not mix depends and select for ATMEL_PIT
> > arm: at91: fix at91_configure_usart6 warning
> > arm: at91: add SOC_SAMA5{D3,D4}
> > clk: at91: add at91sam9260
> > clk: at91: add at91sam9rl
> > clk: at91: add at91sam9x5
> > clk: at91: add sama5d2
>
> > clk: at91: add sama5d4
> This patch is bogus, fails to build.
>
> > clk: at91: update to new bindings
> Likewise, at least part of it.
Well, it builds for at91sam9260 (at91sam9g20) and is runtime tested now.
So for that configuration here is my
Tested-by: Ladislav Michl
Besides, current master plus your patches is about 1,3kB bigger, so
it does not fit Dataflash anymore, but that is separate issue to solve :)
Thanks a lot for your work!
ladis
> Both issues discovered while working on adding DT support
> to sama5d4 xplained board.
>
> Will repost an updated series when I have it fixed.
>
> Sam
>
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Re: [PATCH v2 0/9] at91: Support PMC clock bindings
Hi Ladislav
On Sun, Feb 17, 2019 at 10:32:55PM +0100, Ladislav Michl wrote:
> Hi Sam,
>
> On Sun, Feb 17, 2019 at 07:44:15PM +0100, Sam Ravnborg wrote:
> > Hi all.
> >
> > > Sam Ravnborg (9):
> > > clocksource: Do not mix depends and select for ATMEL_PIT
> > > arm: at91: fix at91_configure_usart6 warning
> > > arm: at91: add SOC_SAMA5{D3,D4}
> > > clk: at91: add at91sam9260
> > > clk: at91: add at91sam9rl
> > > clk: at91: add at91sam9x5
> > > clk: at91: add sama5d2
> >
> > > clk: at91: add sama5d4
> > This patch is bogus, fails to build.
> >
> > > clk: at91: update to new bindings
> > Likewise, at least part of it.
>
> Well, it builds for at91sam9260 (at91sam9g20) and is runtime tested now.
> So for that configuration here is my
> Tested-by: Ladislav Michl
Thanks, very good to know it works for others.
The build failure started when I pulled in clk-h32mx and sama5d4.
They are not used by SAM9 so you are safe.
> Besides, current master plus your patches is about 1,3kB bigger, so
> it does not fit Dataflash anymore, but that is separate issue to solve :)
The current patch pulls in at91sam9260 + at91sam9rl + at91sam9x5
for the SAM9 targets. This is like done in the kernel today.
We may have to look at splitting this up.
The patchset also enabled some clocks that was not enabled before.
Maybe we can avoid them as they may not be required in the bootloader.
This is also something inherited from the kernel.
Sam
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[PATCH v2] Documentation: add watchdog documentation
Signed-off-by: Oleksij Rempel --- Documentation/user/user-manual.rst | 1 + Documentation/user/watchdog.rst| 116 + 2 files changed, 117 insertions(+) create mode 100644 Documentation/user/watchdog.rst diff --git a/Documentation/user/user-manual.rst b/Documentation/user/user-manual.rst index 516b760b1b..d5526de285 100644 --- a/Documentation/user/user-manual.rst +++ b/Documentation/user/user-manual.rst @@ -33,6 +33,7 @@ Contents: system-reset state random + watchdog * :ref:`search` * :ref:`genindex` diff --git a/Documentation/user/watchdog.rst b/Documentation/user/watchdog.rst new file mode 100644 index 00..2c453d9fa5 --- /dev/null +++ b/Documentation/user/watchdog.rst @@ -0,0 +1,116 @@ +Watchdog Support + + +Warnings and Design Consideration +- + +A watchdog is the last line of defense on misbehaving systems. Thus, proper +hardware and watchdog design considerations should be made to be able to reduce +the impact of failing systems in the field. In the best case, the bootloader +should not touch it at all. No watchdog feeding should be done until +application-critical software (or a userspace service manager such as +'systemd') was started. + +In case the bootloader is responsible for watchdog activation, the system can +be considered as failed by design. The following threats can affect the system +which are mostly addressable by properly designed watchdog and watchdog +strategy: + +- software-based miss-configurations or bugs prevent the system from starting. +- glitches caused by under-voltage, inappropriate power-on sequence or noisy + power supply. +- physical damages caused by humidity, vibration or temperature. +- temperature-based misbehavior of the system, e.g. clock is not running or + running with wrong frequency. +- chemical reactions, e.g. some clock crystals will stop to work in contact + with Helium, see for example: + https://ifixit.org/blog/11986/iphones-are-allergic-to-helium/ +- failed storage prevents booting. NAND, SD, SSD, HDD, SPI-flash all of this + some day stop to work because their read/write cycles are exceeded. + +In all these cases, the bootloader won't be able to start and a properly +designed watchdog may take some action. For example: recover the system by +resetting it, or power it off to reduce the damage. + +Barebox Watchdog Functionality +-- + +Nevertheless, in some cases we are not able to influence the hardware design +anymore or while developing one needs to be able to feed the watchdog to +disable it from within the bootloader. For these scenarios barebox provides the +watchdog framework with the following functionality and at least +``CONFIG_WATCHDOG`` should be enabled: + +Polling +~~~ + +Watchdog polling/feeding allows to feed the watchdog and keep it running on one +side and to not reset the system on the other side. It is needed on hardware +with short-time watchdogs. For example the Atheros ar9331 watchdog has a +maximal timeout of 7 seconds, so it may reset even on netboot. +Or it can be used on systems where the watchdog is already running and can't be +disabled, an example for that is the watchdog of the i.MX2 series. +This functionally can be seen as a threat, since in error cases barebox will +continue to feed the watchdog even if that is not desired. So, depending on +your needs ``CONFIG_WATCHDOG_POLLER`` can be enabled or disabled at compile +time. Even if barebox was built with watchdog polling support, it is not +enabled by default. To start polling from command line run: + +.. code-block:: console + + wdog0.autoping=1 + +The poller interval is not configurable, but fixed at 500ms and the watchdog +timeout is configured by default to the maximum of the supported values by +hardware. To change the timeout used by the poller, run: + +.. code-block:: console + + wdog0.timeout_cur=7 + +To read the current watchdog's configuration, run: + +.. code-block:: console + + devinfo wdog0 + +The output may look as follows where ``timeout_cur`` and ``timeout_max`` are +measured in seconds: + +.. code-block:: console + + barebox@DPTechnics DPT-Module:/ devinfo wdog0 + Parameters: +autoping: 1 (type: bool) +timeout_cur: 7 (type: uint32) +timeout_max: 10 (type: uint32) + +Use barebox' environment to persist these changes between reboots: + +.. code-block:: console + + nv dev.wdog0.autoping=1 + nv dev.wdog0.timeout_cur=7 + +Boot Watchdog Timeout +~ + +With this functionality barebox may start a watchdog or update the timeout of +an already-running one, just before kicking the boot image. It can be +configured temporarily via + +.. code-block:: console + + global boot.watchdog_timeout=10 + +or persistently by + +.. code-block:: console + + nv boot.watchdog_timeout=10 + +where the used value again is measured in seconds. + +On a system with multiple watchdogs, only the first one
[PATCH v1 3/4] MIPS: relocation: do not use configurable memory layout
The relocator is not able to patch properly new location of
the stack. To make it work properly it is better to disable
HAVE_CONFIGURABLE_MEMORY_LAYOUT.
Signed-off-by: Oleksij Rempel
---
arch/mips/Kconfig | 1 -
arch/mips/boot/main_entry-pbl.c| 4 ++--
arch/mips/boot/main_entry.c| 17 +++--
arch/mips/include/asm/pbl_macros.h | 4 ++--
arch/mips/lib/cpu-probe.c | 14 ++
arch/mips/lib/pbl.lds.S| 2 +-
6 files changed, 34 insertions(+), 8 deletions(-)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 49f238df58..b59c3a9e87 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -7,7 +7,6 @@ config MIPS
select GENERIC_LIB_ASHRDI3
select GENERIC_LIB_LSHRDI3
select HAS_KALLSYMS
- select HAVE_CONFIGURABLE_MEMORY_LAYOUT
select HAVE_CONFIGURABLE_TEXT_BASE
select HAVE_PBL_MULTI_IMAGES
select HAS_DMA
diff --git a/arch/mips/boot/main_entry-pbl.c b/arch/mips/boot/main_entry-pbl.c
index 60be645148..02ddd5ec24 100644
--- a/arch/mips/boot/main_entry-pbl.c
+++ b/arch/mips/boot/main_entry-pbl.c
@@ -25,7 +25,7 @@ static unsigned long *ttb;
static void barebox_uncompress(void *compressed_start, unsigned int len)
{
/* set 128 KiB at the end of the MALLOC_BASE for early malloc */
- free_mem_ptr = MALLOC_BASE + MALLOC_SIZE - SZ_128K;
+ free_mem_ptr = TEXT_BASE - SZ_128K;
free_mem_end_ptr = free_mem_ptr + SZ_128K;
ttb = (void *)((free_mem_ptr - 0x4000) & ~0x3fff);
@@ -52,7 +52,7 @@ void __section(.text_entry) pbl_main_entry(void *fdt, void
*fdt_end,
barebox_uncompress(_data, pg_len);
fdt_len = (u32)fdt_end - (u32)fdt;
- fdt_new = (void *)PAGE_ALIGN_DOWN(STACK_BASE - fdt_len);
+ fdt_new = (void *)PAGE_ALIGN_DOWN(TEXT_BASE - MALLOC_SIZE - STACK_SIZE
- fdt_len);
memcpy(fdt_new, fdt, fdt_len);
barebox = (void *)TEXT_BASE;
diff --git a/arch/mips/boot/main_entry.c b/arch/mips/boot/main_entry.c
index 84325da93a..5b88730b07 100644
--- a/arch/mips/boot/main_entry.c
+++ b/arch/mips/boot/main_entry.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
extern void handle_reserved(void);
@@ -61,6 +62,7 @@ static void trap_init(void)
extern void *glob_fdt;
extern u32 glob_fdt_size;
+extern unsigned long mips_stack_top;
/**
* Called plainly from assembler code
@@ -69,6 +71,7 @@ extern u32 glob_fdt_size;
*/
void __bare_init main_entry(void *fdt, u32 fdt_size)
{
+ unsigned long malloc_start, malloc_end;
/* clear the BSS first */
memset(__bss_start, 0x00, __bss_stop - __bss_start);
@@ -82,8 +85,18 @@ void __bare_init main_entry(void *fdt, u32 fdt_size)
trap_init();
- mem_malloc_init((void *)MALLOC_BASE,
- (void *)(MALLOC_BASE + MALLOC_SIZE - 1));
+ malloc_end = _stext;
+
+ if (MALLOC_SIZE > 0)
+ malloc_start = malloc_end - MALLOC_SIZE;
+ else
+ malloc_start = malloc_end - SZ_8M;
+
+ pr_debug("initializing malloc pool at 0x%08lx (size 0x%08lx)\n",
+ malloc_start, malloc_end - malloc_start);
+
+ mem_malloc_init((void *)malloc_start, (void *)_stext - 1);
+ mips_stack_top = malloc_start;
glob_fdt = fdt;
glob_fdt_size = fdt_size;
diff --git a/arch/mips/include/asm/pbl_macros.h
b/arch/mips/include/asm/pbl_macros.h
index e78d1afe6a..c62910ff60 100644
--- a/arch/mips/include/asm/pbl_macros.h
+++ b/arch/mips/include/asm/pbl_macros.h
@@ -187,7 +187,7 @@ copy_loop_exit:
*
*/
-#if (STACK_BASE + STACK_SIZE) % 16 != 0
+#if (TEXT_BASE - MALLOC_SIZE) % 16 != 0
#error stack pointer must be 16-byte-aligned
#endif
@@ -196,7 +196,7 @@ copy_loop_exit:
.setnoreorder
/* set stack pointer; reserve four 32-bit argument slots */
- la sp, STACK_BASE + STACK_SIZE - 16
+ la sp, (TEXT_BASE - MALLOC_SIZE - 16)
.setpop
.endm
diff --git a/arch/mips/lib/cpu-probe.c b/arch/mips/lib/cpu-probe.c
index cf63849743..2556a8b240 100644
--- a/arch/mips/lib/cpu-probe.c
+++ b/arch/mips/lib/cpu-probe.c
@@ -11,6 +11,9 @@
#include
#include
#include
+#include
+#include
+#include
const char *__cpu_name;
struct cpuinfo_mips cpu_data[1];
@@ -161,3 +164,14 @@ void cpu_probe(void)
break;
}
}
+
+unsigned long mips_stack_top;
+
+static int mips_request_stack(void)
+{
+ if (!request_sdram_region("stack", mips_stack_top - STACK_SIZE,
STACK_SIZE))
+ pr_err("Error: Cannot request SDRAM region for stack\n");
+
+ return 0;
+}
+coredevice_initcall(mips_request_stack);
diff --git a/arch/mips/lib/pbl.lds.S b/arch/mips/lib/pbl.lds.S
index 1f0285dd6f..2be90b8e5f 100644
--- a/arch/mips/lib/pbl.lds.S
+++ b/arch/mips/lib/pbl.lds.S
@@ -10,7 +10,7 @@
OUTPUT_ARCH("mips")
SECTIONS
{
- . = HEAD_TEXT_BASE;
+ . = TEXT_BASE -
[PATCH v1 1/4] MIPS: relocation: pass ram size to pbl_main_entry
From: Oleksij Rempel To make barebox dynamically relocatable it should know the RAM size to be able to calculate proper new location. Signed-off-by: Oleksij Rempel --- arch/mips/boards/8devices-lima/lowlevel.S | 3 ++- arch/mips/boards/black-swift/lowlevel.S | 3 ++- arch/mips/boards/dlink-dir-320/lowlevel.S | 3 ++- arch/mips/boards/dptechnics-dpt-module/lowlevel.S | 3 ++- arch/mips/boards/img-ci20/lowlevel.S | 3 ++- arch/mips/boards/loongson-ls1b/lowlevel.S | 3 ++- arch/mips/boards/qemu-malta/lowlevel.S| 3 ++- arch/mips/boards/ritmix-rzx50/lowlevel.S | 3 ++- arch/mips/boards/tplink-mr3020/lowlevel.S | 3 ++- arch/mips/boards/tplink-wdr4300/lowlevel.S| 3 ++- arch/mips/boot/main_entry-pbl.c | 5 +++-- arch/mips/include/asm/asm.h | 3 ++- 12 files changed, 25 insertions(+), 13 deletions(-) diff --git a/arch/mips/boards/8devices-lima/lowlevel.S b/arch/mips/boards/8devices-lima/lowlevel.S index b53b23b42a..dd1ab6247d 100644 --- a/arch/mips/boards/8devices-lima/lowlevel.S +++ b/arch/mips/boards/8devices-lima/lowlevel.S @@ -11,6 +11,7 @@ #include #include #include +#include ENTRY_FUNCTION(BOARD_PBL_START) @@ -38,4 +39,4 @@ skip_flash_test: dcache_enable skip_pll_ram_config: -ENTRY_FUNCTION_END(BOARD_PBL_START, qca4531_8devices_lima) +ENTRY_FUNCTION_END(BOARD_PBL_START, qca4531_8devices_lima, SZ_64M) diff --git a/arch/mips/boards/black-swift/lowlevel.S b/arch/mips/boards/black-swift/lowlevel.S index 0ba77435f8..5c5afcdf09 100644 --- a/arch/mips/boards/black-swift/lowlevel.S +++ b/arch/mips/boards/black-swift/lowlevel.S @@ -11,9 +11,10 @@ #include #include #include +#include ENTRY_FUNCTION(BOARD_PBL_START) ar9331_pbl_generic_start -ENTRY_FUNCTION_END(BOARD_PBL_START, black_swift) +ENTRY_FUNCTION_END(BOARD_PBL_START, black_swift, SZ_64M) diff --git a/arch/mips/boards/dlink-dir-320/lowlevel.S b/arch/mips/boards/dlink-dir-320/lowlevel.S index 9f3bd5dead..da969bc74e 100644 --- a/arch/mips/boards/dlink-dir-320/lowlevel.S +++ b/arch/mips/boards/dlink-dir-320/lowlevel.S @@ -9,6 +9,7 @@ #include #include #include +#include ENTRY_FUNCTION(BOARD_PBL_START) @@ -19,4 +20,4 @@ ENTRY_FUNCTION(BOARD_PBL_START) /* CPU/SoC specific setup ... */ /* ... absent */ -ENTRY_FUNCTION_END(BOARD_PBL_START, dlink_dir_320) +ENTRY_FUNCTION_END(BOARD_PBL_START, dlink_dir_320, SZ_32M) diff --git a/arch/mips/boards/dptechnics-dpt-module/lowlevel.S b/arch/mips/boards/dptechnics-dpt-module/lowlevel.S index 28b8f4fac7..b5621963c3 100644 --- a/arch/mips/boards/dptechnics-dpt-module/lowlevel.S +++ b/arch/mips/boards/dptechnics-dpt-module/lowlevel.S @@ -12,9 +12,10 @@ #include #include #include +#include ENTRY_FUNCTION(BOARD_PBL_START) ar9331_pbl_generic_start -ENTRY_FUNCTION_END(BOARD_PBL_START, ar9331_dptechnics_dpt_module) +ENTRY_FUNCTION_END(BOARD_PBL_START, ar9331_dptechnics_dpt_module, SZ_64M) diff --git a/arch/mips/boards/img-ci20/lowlevel.S b/arch/mips/boards/img-ci20/lowlevel.S index 056df17bf8..0295e44d1a 100644 --- a/arch/mips/boards/img-ci20/lowlevel.S +++ b/arch/mips/boards/img-ci20/lowlevel.S @@ -10,6 +10,7 @@ #include #include #include +#include ENTRY_FUNCTION(BOARD_PBL_START) @@ -23,4 +24,4 @@ ENTRY_FUNCTION(BOARD_PBL_START) debug_ll_outc '.' debug_ll_ns16550_outnl -ENTRY_FUNCTION_END(BOARD_PBL_START, img_ci20) +ENTRY_FUNCTION_END(BOARD_PBL_START, img_ci20, SZ_1G) diff --git a/arch/mips/boards/loongson-ls1b/lowlevel.S b/arch/mips/boards/loongson-ls1b/lowlevel.S index 37744e9fac..c533df3ce5 100644 --- a/arch/mips/boards/loongson-ls1b/lowlevel.S +++ b/arch/mips/boards/loongson-ls1b/lowlevel.S @@ -9,6 +9,7 @@ #include #include #include +#include ENTRY_FUNCTION(BOARD_PBL_START) @@ -21,4 +22,4 @@ ENTRY_FUNCTION(BOARD_PBL_START) debug_ll_outc '.' debug_ll_ns16550_outnl -ENTRY_FUNCTION_END(BOARD_PBL_START, loongson_ls1b) +ENTRY_FUNCTION_END(BOARD_PBL_START, loongson_ls1b, SZ_64M) diff --git a/arch/mips/boards/qemu-malta/lowlevel.S b/arch/mips/boards/qemu-malta/lowlevel.S index 3861ae9e46..e4ecde45cf 100644 --- a/arch/mips/boards/qemu-malta/lowlevel.S +++ b/arch/mips/boards/qemu-malta/lowlevel.S @@ -10,6 +10,7 @@ #include #include #include +#include #include #include @@ -82,4 +83,4 @@ __start: li t0, GT_LD(0x1bdf) sw t0, GT_PCI0M1HD_OFS(t1) -ENTRY_FUNCTION_END(BOARD_PBL_START, qemu_malta) +ENTRY_FUNCTION_END(BOARD_PBL_START, qemu_malta, SZ_256M) diff --git a/arch/mips/boards/ritmix-rzx50/lowlevel.S b/arch/mips/boards/ritmix-rzx50/lowlevel.S index 7a9743835e..33810f67f5 100644 --- a/arch/mips/boards/ritmix-rzx50/lowlevel.S +++ b/arch/mips/boards/ritmix-rzx50/lowlevel.S @@ -10,6 +10,7 @@ #include #include #include +#include ENTRY_FUNCTION(BOARD_PBL_START) @@ -23,4 +24,4 @@
[PATCH v1 2/4] MIPS: relocation: add relocation support
From: Oleksij Rempel this patch i a port of following patch from u-boot with some additional integration changes and fixes of original code: | Subject: [PATCH] MIPS: Stop building position independent code | | U-Boot has up until now built with -fpic for the MIPS architecture, | producing position independent code which uses indirection through a | global offset table, making relocation fairly straightforward as it | simply involves patching up GOT entries. | | Using -fpic does however have some downsides. The biggest of these is | that generated code is bloated in various ways. For example, function | calls are indirected through the GOT & the t9 register: | | 8f998064 lw t9,-32668(gp) | 0320f809 jalr t9 | | Without -fpic the call is simply: | | 0f803f01 jalbe00fc04 | | This is more compact & faster (due to the lack of the load & the | dependency the jump has on its result). It is also easier to read & | debug because the disassembly shows what function is being called, | rather than just an offset from gp which would then have to be looked up | in the ELF to discover the target function. | | Another disadvantage of -fpic is that each function begins with a | sequence to calculate the value of the gp register, for example: | | 3c1c0004 luigp,0x4 | 279c3384 addiu gp,gp,13188 | 0399e021 addu gp,gp,t9 | | Without using -fpic this sequence no longer appears at the start of each | function, reducing code size considerably. | | This patch switches U-Boot from building with -fpic to building with | -fno-pic, in order to gain the benefits described above. The cost of | this is an extra step during the build process to extract relocation | data from the ELF & write it into a new .rel section in a compact | format, plus the added complexity of dealing with multiple types of | relocation rather than the single type that applied to the GOT. The | benefit is smaller, cleaner, more debuggable code. The relocate_code() | function is reimplemented in C to handle the new relocation scheme, | which also makes it easier to read & debug. | | Taking maltael_defconfig as an example the size of u-boot.bin built | using the Codescape MIPS 2016.05-06 toolchain (gcc 4.9.2, binutils | 2.24.90) shrinks from 254KiB to 224KiB. | | Signed-off-by: Paul Burton Signed-off-by: Oleksij Rempel --- Makefile | 2 +- arch/mips/Kconfig| 18 ++ arch/mips/Makefile | 11 +- arch/mips/boot/main_entry-pbl.c | 4 +- arch/mips/boot/start.S | 4 +- arch/mips/include/asm/relocs.h | 23 ++ arch/mips/include/asm/sections.h | 14 + arch/mips/lib/Makefile | 2 + arch/mips/lib/barebox.lds.S | 27 +- arch/mips/lib/reloc.c| 182 + arch/mips/lib/sections.c | 9 + scripts/Makefile | 1 + scripts/mips-relocs.c| 426 +++ 13 files changed, 714 insertions(+), 9 deletions(-) create mode 100644 arch/mips/include/asm/relocs.h create mode 100644 arch/mips/lib/reloc.c create mode 100644 arch/mips/lib/sections.c create mode 100644 scripts/mips-relocs.c diff --git a/Makefile b/Makefile index f8c3d75575..ad4d0d319c 100644 --- a/Makefile +++ b/Makefile @@ -183,7 +183,7 @@ HOST_LFS_LIBS := $(shell getconf LFS_LIBS) HOSTCC = gcc HOSTCXX = g++ -HOSTCFLAGS = -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer $(HOST_LFS_CFLAGS) +HOSTCFLAGS = -Wall -ggdb -Wstrict-prototypes -O2 -fomit-frame-pointer $(HOST_LFS_CFLAGS) HOSTCXXFLAGS = -O2 $(HOST_LFS_CFLAGS) HOSTLDFLAGS = $(HOST_LFS_LDFLAGS) HOST_LOADLIBES = $(HOST_LFS_LIBS) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index eab9452de9..49f238df58 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -32,6 +32,24 @@ config PHYS_ADDR_T_64BIT menu "Machine selection" +config MIPS_RELOCATION_TABLE_SIZE + hex "Relocation table size" + range 0x100 0x1 + default "0x8000" + ---help--- + A table of relocation data will be appended to the Barebox binary + and parsed in relocate_code() to fix up all offsets in the relocated + Barebox. + + This option allows the amount of space reserved for the table to be + adjusted in a range from 256 up to 64k. The default is 32k and should + be ok in most cases. Reduce this value to shrink the size of U-Boot + binary. + + The build will fail and a valid size suggested if this is too small. + + If unsure, leave at the default value. + config BUILTIN_DTB bool "link a DTB into the barebox image" depends on OFTREE diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 5fbd51ceee..5eccf18fe4 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -11,7 +11,7 @@ endif CPPFLAGS += -D__MIPS__ -fno-strict-aliasing -fno-merge-constants -cflags-y += -G 0 -mno-abicalls -fno-pic -pipe +cflags-y += -G 0 -mno-abicalls
[PATCH v1 4/4] MIPS: remove request_sdram_region "fdt"
It is actually not needed at barebox runtime
Signed-off-by: Oleksij Rempel
---
arch/mips/boot/dtb.c | 4
1 file changed, 4 deletions(-)
diff --git a/arch/mips/boot/dtb.c b/arch/mips/boot/dtb.c
index ea30e16f21..5e316270f6 100644
--- a/arch/mips/boot/dtb.c
+++ b/arch/mips/boot/dtb.c
@@ -29,10 +29,6 @@ void of_add_memory_bank(struct device_node *node, bool dump,
int r,
if (dump)
pr_info("%s: %s: 0x%llx@0x%llx\n", node->name, str, size, base);
-
- if (glob_fdt && glob_fdt_size)
- request_sdram_region("fdt", (resource_size_t)glob_fdt,
-glob_fdt_size);
}
extern char __dtb_start[];
--
2.20.1
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Re: [PATCH v2] Documentation: add watchdog documentation
On 18.02.19 08:05, Oleksij Rempel wrote: Signed-off-by: Oleksij Rempel --- Documentation/user/user-manual.rst | 1 + Documentation/user/watchdog.rst| 116 + 2 files changed, 117 insertions(+) create mode 100644 Documentation/user/watchdog.rst diff --git a/Documentation/user/user-manual.rst b/Documentation/user/user-manual.rst index 516b760b1b..d5526de285 100644 --- a/Documentation/user/user-manual.rst +++ b/Documentation/user/user-manual.rst @@ -33,6 +33,7 @@ Contents: system-reset state random + watchdog * :ref:`search` * :ref:`genindex` diff --git a/Documentation/user/watchdog.rst b/Documentation/user/watchdog.rst new file mode 100644 index 00..2c453d9fa5 --- /dev/null +++ b/Documentation/user/watchdog.rst @@ -0,0 +1,116 @@ +Watchdog Support + + +Warnings and Design Consideration +- + +A watchdog is the last line of defense on misbehaving systems. Thus, proper +hardware and watchdog design considerations should be made to be able to reduce +the impact of failing systems in the field. In the best case, the bootloader +should not touch it at all. No watchdog feeding should be done until +application-critical software (or a userspace service manager such as +'systemd') was started. + +In case the bootloader is responsible for watchdog activation, the system can +be considered as failed by design. The following threats can affect the system +which are mostly addressable by properly designed watchdog and watchdog +strategy: + +- software-based miss-configurations or bugs prevent the system from starting. gr... forgot to fix miss... +- glitches caused by under-voltage, inappropriate power-on sequence or noisy + power supply. +- physical damages caused by humidity, vibration or temperature. +- temperature-based misbehavior of the system, e.g. clock is not running or + running with wrong frequency. +- chemical reactions, e.g. some clock crystals will stop to work in contact + with Helium, see for example: + https://ifixit.org/blog/11986/iphones-are-allergic-to-helium/ +- failed storage prevents booting. NAND, SD, SSD, HDD, SPI-flash all of this + some day stop to work because their read/write cycles are exceeded. + +In all these cases, the bootloader won't be able to start and a properly +designed watchdog may take some action. For example: recover the system by +resetting it, or power it off to reduce the damage. + +Barebox Watchdog Functionality +-- + +Nevertheless, in some cases we are not able to influence the hardware design +anymore or while developing one needs to be able to feed the watchdog to +disable it from within the bootloader. For these scenarios barebox provides the +watchdog framework with the following functionality and at least +``CONFIG_WATCHDOG`` should be enabled: + +Polling +~~~ + +Watchdog polling/feeding allows to feed the watchdog and keep it running on one +side and to not reset the system on the other side. It is needed on hardware +with short-time watchdogs. For example the Atheros ar9331 watchdog has a +maximal timeout of 7 seconds, so it may reset even on netboot. +Or it can be used on systems where the watchdog is already running and can't be +disabled, an example for that is the watchdog of the i.MX2 series. +This functionally can be seen as a threat, since in error cases barebox will +continue to feed the watchdog even if that is not desired. So, depending on +your needs ``CONFIG_WATCHDOG_POLLER`` can be enabled or disabled at compile +time. Even if barebox was built with watchdog polling support, it is not +enabled by default. To start polling from command line run: + +.. code-block:: console + + wdog0.autoping=1 + +The poller interval is not configurable, but fixed at 500ms and the watchdog +timeout is configured by default to the maximum of the supported values by +hardware. To change the timeout used by the poller, run: + +.. code-block:: console + + wdog0.timeout_cur=7 + +To read the current watchdog's configuration, run: + +.. code-block:: console + + devinfo wdog0 + +The output may look as follows where ``timeout_cur`` and ``timeout_max`` are +measured in seconds: + +.. code-block:: console + + barebox@DPTechnics DPT-Module:/ devinfo wdog0 + Parameters: +autoping: 1 (type: bool) +timeout_cur: 7 (type: uint32) +timeout_max: 10 (type: uint32) + +Use barebox' environment to persist these changes between reboots: + +.. code-block:: console + + nv dev.wdog0.autoping=1 + nv dev.wdog0.timeout_cur=7 + +Boot Watchdog Timeout +~ + +With this functionality barebox may start a watchdog or update the timeout of +an already-running one, just before kicking the boot image. It can be +configured temporarily via + +.. code-block:: console + + global boot.watchdog_timeout=10 + +or persistently by + +.. code-block:: console + + nv boot.watchdog_timeout=10 + +where the used value
[PATCH v3] Documentation: add watchdog documentation
Signed-off-by: Oleksij Rempel --- Documentation/user/user-manual.rst | 1 + Documentation/user/watchdog.rst| 116 + 2 files changed, 117 insertions(+) create mode 100644 Documentation/user/watchdog.rst diff --git a/Documentation/user/user-manual.rst b/Documentation/user/user-manual.rst index 516b760b1b..d5526de285 100644 --- a/Documentation/user/user-manual.rst +++ b/Documentation/user/user-manual.rst @@ -33,6 +33,7 @@ Contents: system-reset state random + watchdog * :ref:`search` * :ref:`genindex` diff --git a/Documentation/user/watchdog.rst b/Documentation/user/watchdog.rst new file mode 100644 index 00..87c63aa078 --- /dev/null +++ b/Documentation/user/watchdog.rst @@ -0,0 +1,116 @@ +Watchdog Support + + +Warnings and Design Consideration +- + +A watchdog is the last line of defense on misbehaving systems. Thus, proper +hardware and watchdog design considerations should be made to be able to reduce +the impact of failing systems in the field. In the best case, the bootloader +should not touch it at all. No watchdog feeding should be done until +application-critical software (or a userspace service manager such as +'systemd') was started. + +In case the bootloader is responsible for watchdog activation, the system can +be considered as failed by design. The following threats can affect the system +which are mostly addressable by properly designed watchdog and watchdog +strategy: + +- software-based misconfigurations or bugs prevent the system from starting. +- glitches caused by under-voltage, inappropriate power-on sequence or noisy + power supply. +- physical damages caused by humidity, vibration or temperature. +- temperature-based misbehavior of the system, e.g. clock is not running or + running with wrong frequency. +- chemical reactions, e.g. some clock crystals will stop to work in contact + with Helium, see for example: + https://ifixit.org/blog/11986/iphones-are-allergic-to-helium/ +- failed storage prevents booting. NAND, SD, SSD, HDD, SPI-flash all of this + some day stop to work because their read/write cycles are exceeded. + +In all these cases, the bootloader won't be able to start and a properly +designed watchdog may take some action. For example: recover the system by +resetting it, or power it off to reduce the damage. + +Barebox Watchdog Functionality +-- + +Nevertheless, in some cases we are not able to influence the hardware design +anymore or while developing one needs to be able to feed the watchdog to +disable it from within the bootloader. For these scenarios barebox provides the +watchdog framework with the following functionality and at least +``CONFIG_WATCHDOG`` should be enabled: + +Polling +~~~ + +Watchdog polling/feeding allows to feed the watchdog and keep it running on one +side and to not reset the system on the other side. It is needed on hardware +with short-time watchdogs. For example the Atheros ar9331 watchdog has a +maximal timeout of 7 seconds, so it may reset even on netboot. +Or it can be used on systems where the watchdog is already running and can't be +disabled, an example for that is the watchdog of the i.MX2 series. +This functionally can be seen as a threat, since in error cases barebox will +continue to feed the watchdog even if that is not desired. So, depending on +your needs ``CONFIG_WATCHDOG_POLLER`` can be enabled or disabled at compile +time. Even if barebox was built with watchdog polling support, it is not +enabled by default. To start polling from command line run: + +.. code-block:: console + + wdog0.autoping=1 + +The poller interval is not configurable, but fixed at 500ms and the watchdog +timeout is configured by default to the maximum of the supported values by +hardware. To change the timeout used by the poller, run: + +.. code-block:: console + + wdog0.timeout_cur=7 + +To read the current watchdog's configuration, run: + +.. code-block:: console + + devinfo wdog0 + +The output may look as follows where ``timeout_cur`` and ``timeout_max`` are +measured in seconds: + +.. code-block:: console + + barebox@DPTechnics DPT-Module:/ devinfo wdog0 + Parameters: +autoping: 1 (type: bool) +timeout_cur: 7 (type: uint32) +timeout_max: 10 (type: uint32) + +Use barebox' environment to persist these changes between reboots: + +.. code-block:: console + + nv dev.wdog0.autoping=1 + nv dev.wdog0.timeout_cur=7 + +Boot Watchdog Timeout +~ + +With this functionality barebox may start a watchdog or update the timeout of +an already-running one, just before kicking the boot image. It can be +configured temporarily via + +.. code-block:: console + + global boot.watchdog_timeout=10 + +or persistently by + +.. code-block:: console + + nv boot.watchdog_timeout=10 + +where the used value again is measured in seconds. + +On a system with multiple watchdogs, only the first one
Re: [PATCH v3] Documentation: add watchdog documentation
On 18. 02. 19 08:12, Oleksij Rempel wrote: +A watchdog is the last line of defense on misbehaving systems. Thus, proper +hardware and watchdog design considerations should be made to be able to reduce +the impact of failing systems in the field. In the best case, the bootloader +should not touch it at all. No watchdog feeding should be done until +application-critical software (or a userspace service manager such as +'systemd') was started. + +In case the bootloader is responsible for watchdog activation, the system can +be considered as failed by design. I think this is too strongly worded and I would leave out this last sentence. It seems arrogant for documentation to judge what is "failed by design" like this, without considering any other requirements for a system. Such a "failed" watchdog is still better than no watchdog in many cases and sometimes it's the only option, as the text in later paragraphs explains. The paragraph above already recommends that in the ideal case the bootloader shouldn't touch the watchdog. I think that is enough. Also, as far as I know, the Linux kernel will feed the watchdog on a kernel timer during boot and until a userspace process grabs /dev/watchdog. So based on this basically all systems based on Linux are already a failed design. Best regards Tomaž ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
