Re: MFGTools from NXP
Hi Mihaita, On 19-10-10 15:03, Mihaita Ivascu wrote: > Hello all, > > Does anybody have experience with using MFGTools to flash the > barebox and kernel in NAND for imx6ul platforms? Hm.. I think the most of us are using the imx-usb-loader tool ;) I used it a long time ago but let's try if I can help you. So what is your question? Regards, Marco > Thanks, >Mihaita > > ___ > barebox mailing list > barebox@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/barebox > -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH] fixup! gpio: add DA9062 MFD gpio support
Signed-off-by: Marco Felsch
---
Hi,
We need to move the gpio-controller to the mfd root node due to
hierarchical GPIO irqchips to keep inline with the linux bindings.
Please see the discussion [1] for further information.
[1] https://patchwork.ozlabs.org/patch/1163309/
Regards,
Marco
drivers/gpio/Kconfig | 4 -
drivers/gpio/Makefile | 1 -
drivers/gpio/gpio-da9062.c | 206 -
drivers/mfd/da9063.c | 136
4 files changed, 136 insertions(+), 211 deletions(-)
delete mode 100644 drivers/gpio/gpio-da9062.c
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 806b96ae26..7a1503198b 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -13,10 +13,6 @@ config GPIO_DIGIC
bool "GPIO support for Canon DIGIC"
depends on ARCH_DIGIC
-config GPIO_DA9062
- bool "GPIO support for DA9062 MFD"
- depends on MFD_DA9063
-
config GPIO_74164
bool "Generic SPI attached shift register"
depends on SPI
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 6f2bf11af8..990df01788 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -4,7 +4,6 @@ obj-$(CONFIG_GPIO_74164)+= gpio-74164.o
obj-$(CONFIG_MACH_MIPS_ATH79) += gpio-ath79.o
obj-$(CONFIG_GPIO_DAVINCI) += gpio-davinci.o
obj-$(CONFIG_GPIO_CLPS711X)+= gpio-clps711x.o
-obj-$(CONFIG_GPIO_DA9062) += gpio-da9062.o
obj-$(CONFIG_GPIO_DIGIC) += gpio-digic.o
obj-$(CONFIG_GPIO_GENERIC) += gpio-generic.o
obj-$(CONFIG_GPIO_IMX) += gpio-imx.o
diff --git a/drivers/gpio/gpio-da9062.c b/drivers/gpio/gpio-da9062.c
deleted file mode 100644
index 2f018166cc..00
--- a/drivers/gpio/gpio-da9062.c
+++ /dev/null
@@ -1,206 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2019 Pengutronix, Marco Felsch
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-
-struct da9062_gpio {
- struct gpio_chipgpio;
- struct i2c_client *client;
- struct device_d *dev;
-};
-
-#define DA9062AA_STATUS_B 0x002
-#define DA9062AA_GPIO_0_1 0x015
-#define DA9062AA_GPIO_MODE0_4 0x01D
-
-/* DA9062AA_GPIO_0_1 (addr=0x015) */
-#define DA9062AA_GPIO0_PIN_MASK 0x03
-
-#define DA9062_PIN_SHIFT(offset) (4 * (offset % 2))
-#define DA9062_PIN_ALTERNATE 0x00 /* gpio alternate mode */
-#define DA9062_PIN_GPI 0x01 /* gpio in */
-#define DA9062_PIN_GPO_OD 0x02 /* gpio out open-drain */
-#define DA9062_PIN_GPO_PP 0x03 /* gpio out push-pull */
-
-static inline struct da9062_gpio *to_da9062(struct gpio_chip *chip)
-{
- return container_of(chip, struct da9062_gpio, gpio);
-}
-
-static int gpio_da9062_reg_update(struct da9062_gpio *priv, unsigned int reg,
- uint8_t mask, uint8_t val)
-{
- struct i2c_client *client;
- uint8_t tmp;
- int ret;
-
- if (reg < 0x100)
- client = priv->client;
-
- if (WARN_ON(!client))
- return -EINVAL;
-
- ret = i2c_read_reg(client, reg & 0xffu, , 1);
- if (ret < 0) {
- dev_warn(priv->dev, "failed to read reg %02x\n", reg);
- return ret;
- }
-
- tmp &= ~mask;
- tmp |= val;
-
- ret = i2c_write_reg(client, reg & 0xffu, , 1);
- if (ret < 0) {
- dev_warn(priv->dev, "failed to write %02x into reg %02x\n",
-tmp, reg);
- return ret;
- }
-
- return 0;
-}
-
-static int gpio_da9062_direction_input(struct gpio_chip *chip, unsigned offset)
-{
- struct da9062_gpio *priv = to_da9062(chip);
- u8 mask, mode;
-
- mode = DA9062_PIN_GPI << DA9062_PIN_SHIFT(offset);
- mask = DA9062AA_GPIO0_PIN_MASK << DA9062_PIN_SHIFT(offset);
-
- return gpio_da9062_reg_update(priv, DA9062AA_GPIO_0_1 + (offset >> 1),
- mask, mode);
-}
-
-static int gpio_da9062_direction_output(struct gpio_chip *chip, unsigned
offset,
- int value)
-{
- struct da9062_gpio *priv = to_da9062(chip);
-
- return gpio_da9062_reg_update(priv, DA9062AA_GPIO_MODE0_4, BIT(offset),
- value << offset);
-}
-
-static int gpio_da9062_get_pin_mode(struct da9062_gpio *priv, unsigned offset)
-{
- int ret;
- u8 val;
-
- ret = i2c_read_reg(priv->client, DA9062AA_GPIO_0_1 + (offset >> 1),
- , 1);
- if (ret < 0)
- return ret;
-
- val >>= DA9062_PIN_SHIFT(offset);
- val &= DA9062AA_GPIO0_PIN_MASK;
-
- return val;
-}
-
-static int gpio_da9062_get(struct gpio_chip *chip, unsigned offset)
-{
- struct da9062_gpio *priv = to_da9062(chip);
- int gpio_dir;
- int ret;
- u8 val;
-
- gpio_dir = gpio_da9062_get_pin_mode(priv, offset);
-
[PATCH 3/4] watchdog: add support for Fintek F718xx and, F818xx Super I/O
This is an adaptation of the Linux v5.3 f71808e_wdt driver for the watchdog
component of the Fintek Super I/O chips.
Signed-off-by: Ahmad Fatoum
---
drivers/watchdog/Kconfig | 10 +
drivers/watchdog/Makefile | 1 +
drivers/watchdog/f71808e_wdt.c | 379 +
3 files changed, 390 insertions(+)
create mode 100644 drivers/watchdog/f71808e_wdt.c
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index fbaab896d460..b1c2a39b6629 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -90,10 +90,20 @@ config STM32_IWDG_WATCHDOG
Enable to support configuration of the STM32's on-SoC IWDG watchdog.
Once started by the user, the IWDG can't be disabled.
+
config STPMIC1_WATCHDOG
bool "STPMIC1 Watchdog"
depends on MFD_STPMIC1
help
Enable to support configuration of the stpmic1's built-in watchdog.
+config F71808E_WDT
+ bool "Fintek F718xx, F818xx Super I/O Watchdog"
+ depends on X86
+ select FINTEK_SUPERIO
+ help
+ This is the driver for the hardware watchdog on the Fintek F71808E,
+ F71862FG, F71868, F71869, F71882FG, F71889FG, F81865 and F81866
+ Super I/O controllers.
+
endif
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 1fbd780885cb..63efc2a87ec4 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_ARCH_BCM283X) += bcm2835_wdt.o
obj-$(CONFIG_RAVE_SP_WATCHDOG) += rave-sp-wdt.o
obj-$(CONFIG_STM32_IWDG_WATCHDOG) += stm32_iwdg.o
obj-$(CONFIG_STPMIC1_WATCHDOG) += stpmic1_wdt.o
+obj-$(CONFIG_F71808E_WDT) += f71808e_wdt.o
diff --git a/drivers/watchdog/f71808e_wdt.c b/drivers/watchdog/f71808e_wdt.c
new file mode 100644
index ..4f881a1d02bc
--- /dev/null
+++ b/drivers/watchdog/f71808e_wdt.c
@@ -0,0 +1,379 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/***
+ * Copyright (C) 2006 by Hans Edgington *
+ * Copyright (C) 2007-2009 Hans de Goede*
+ * Copyright (C) 2010 Giel van Schijndel *
+ * Copyright (C) 2019 Ahmad Fatoum *
+ * *
+ ***/
+
+#define pr_fmt(fmt) "f71808e_wdt: " fmt
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SIO_F71808FG_LD_WDT0x07/* Watchdog timer logical device */
+#define SIO_UNLOCK_KEY 0x87/* Key to enable Super-I/O */
+#define SIO_LOCK_KEY 0xAA/* Key to disable Super-I/O */
+
+#define SIO_REG_LDSEL 0x07/* Logical device select */
+#define SIO_REG_DEVREV 0x22/* Device revision */
+#define SIO_REG_ROM_ADDR_SEL 0x27/* ROM address select */
+#define SIO_F81866_REG_PORT_SEL0x27/* F81866 Multi-Function
Register */
+#define SIO_REG_MFUNCT10x29/* Multi function select 1 */
+#define SIO_REG_MFUNCT20x2a/* Multi function select 2 */
+#define SIO_REG_MFUNCT30x2b/* Multi function select 3 */
+#define SIO_F81866_REG_GPIO1 0x2c/* F81866 GPIO1 Enable Register */
+#define SIO_REG_ENABLE 0x30/* Logical device enable */
+#define SIO_REG_ADDR 0x60/* Logical device address (2 bytes) */
+
+#define F71808FG_REG_WDO_CONF 0xf0
+#define F71808FG_REG_WDT_CONF 0xf5
+#define F71808FG_REG_WD_TIME 0xf6
+
+#define F71808FG_FLAG_WDOUT_EN 7
+
+#define F71808FG_FLAG_WDTMOUT_STS 6
+#define F71808FG_FLAG_WD_EN5
+#define F71808FG_FLAG_WD_PULSE 4
+#define F71808FG_FLAG_WD_UNIT 3
+
+#define F81865_REG_WDO_CONF0xfa
+#define F81865_FLAG_WDOUT_EN 0
+
+/* Default values */
+#define WATCHDOG_MAX_TIMEOUT (60 * 255)
+
+enum pulse_width {
+ PULSE_WIDTH_LEVEL, PULSE_WIDTH_1MS,
+ PULSE_WIDTH_LOW, PULSE_WIDTH_MID, PULSE_WIDTH_HIGH
+};
+
+const char *pulse_width_names[] = { "level", "1", "25", "125", "5000" };
+const char *pulse_width_names_f71868[] = { "level", "1", "30", "150", "6000" };
+
+enum wdtrst_pin {
+ WDTRST_PIN_56, WDTRST_PIN_63,
+};
+
+const char *f71862fg_pin_names[] = { "56", "63" };
+
+enum chips { f71808fg, f71858fg, f71862fg, f71868, f71869, f71882fg, f71889fg,
+f81865, f81866};
+
+struct f71808e_wdt;
+
+struct f71808e_variant_data {
+ enum chips type;
+ void (*pinconf)(struct f71808e_wdt *wd);
+};
+
+struct f71808e_wdt {
+ struct watchdog wdd;
+ u16 sioaddr;
+ const struct f71808e_variant_data *variant;
+ unsigned inttimeout;
+ u8 timer_val; /* content for the wd_time register */
+ charminutes_mode;
+ int pulse_width;
+
[PATCH 2/4] mfd: superio: add Fintek MFD driver
Super I/O chips require a password to unlock access to the I/O ports.
Add a driver that pokes the password and registers the appropriate GPIO
and Watchdog devices as well as a regmap reflecting the Super I/O chip.
Signed-off-by: Ahmad Fatoum
---
drivers/mfd/Kconfig | 6 ++
drivers/mfd/Makefile | 1 +
drivers/mfd/fintek-superio.c | 122 +++
3 files changed, 129 insertions(+)
create mode 100644 drivers/mfd/fintek-superio.c
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index bd6f14a59f56..e2c74a575da4 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -70,4 +70,10 @@ config MFD_STPMIC1
config MFD_SUPERIO
bool
+config FINTEK_SUPERIO
+ bool "Fintek Super I/O chip"
+ select MFD_SUPERIO
+ help
+ Select this to probe for IO-port connected Fintek Super I/O chips.
+
endmenu
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 690788eefb44..59b401dd2ea0 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_MFD_TWL6030) += twl6030.o
obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o
obj-$(CONFIG_MFD_STPMIC1) += stpmic1.o
obj-$(CONFIG_MFD_SUPERIO) += superio.o
+obj-$(CONFIG_FINTEK_SUPERIO) += fintek-superio.o
diff --git a/drivers/mfd/fintek-superio.c b/drivers/mfd/fintek-superio.c
new file mode 100644
index ..60785bce279f
--- /dev/null
+++ b/drivers/mfd/fintek-superio.c
@@ -0,0 +1,122 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Ahmad Fatoum, Pengutronix
+ */
+
+#define pr_fmt(fmt) "fintek-superio: " fmt
+
+#include
+#include
+#include
+#include
+
+#define SIO_UNLOCK_KEY 0x87/* Key to enable Super-I/O */
+#define SIO_LOCK_KEY 0xAA/* Key to disable Super-I/O */
+
+#define SIO_REG_LDSEL 0x07/* Logical device select */
+
+#define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
+
+#define SIO_F71808_ID 0x0901
+#define SIO_F71858_ID 0x0507
+#define SIO_F71862_ID 0x0601
+#define SIO_F71868_ID 0x1106
+#define SIO_F71869_ID 0x0814
+#define SIO_F71869A_ID 0x1007
+#define SIO_F71882_ID 0x0541
+#define SIO_F71889_ID 0x0723
+#define SIO_F71889A_ID 0x1005
+#define SIO_F81865_ID 0x0704
+#define SIO_F81866_ID 0x1010
+
+static void superio_enter(u16 sioaddr)
+{
+ /* according to the datasheet the key must be sent twice! */
+ outb(SIO_UNLOCK_KEY, sioaddr);
+ outb(SIO_UNLOCK_KEY, sioaddr);
+}
+
+static void superio_exit(u16 sioaddr)
+{
+ outb(SIO_LOCK_KEY, sioaddr);
+}
+
+static void fintek_superio_find(u16 sioaddr)
+{
+ struct superio_chip *chip;
+ u16 vid;
+
+ superio_enter(sioaddr);
+
+ vid = superio_inw(sioaddr, SIO_REG_MANID);
+ if (vid != SIO_FINTEK_ID) {
+ pr_debug("Not a Fintek device (port=0x%02x, vid=0x%04x)\n",
+sioaddr, vid);
+ return;
+ }
+
+ chip = xzalloc(sizeof(*chip));
+
+ chip->devid = superio_inw(sioaddr, SIO_REG_DEVID);
+ chip->vid = vid;
+ chip->sioaddr = sioaddr;
+ chip->enter = superio_enter;
+ chip->exit = superio_exit;
+
+ superio_chip_add(chip);
+
+ switch (chip->devid) {
+ case SIO_F71808_ID:
+ superio_func_add(chip, "f71808fg_wdt");
+ break;
+ case SIO_F71862_ID:
+ superio_func_add(chip, "f71862fg_wdt");
+ break;
+ case SIO_F71868_ID:
+ superio_func_add(chip, "f71868_wdt");
+ break;
+ case SIO_F71869_ID:
+ superio_func_add(chip, "f71869_wdt");
+ superio_func_add(chip, "gpio-f71869");
+ break;
+ case SIO_F71869A_ID:
+ superio_func_add(chip, "f71869_wdt");
+ superio_func_add(chip, "gpio-f71869a");
+ break;
+ case SIO_F71882_ID:
+ superio_func_add(chip, "f71882fg_wdt");
+ superio_func_add(chip, "gpio-f71882fg");
+ break;
+ case SIO_F71889_ID:
+ superio_func_add(chip, "f71889fg_wdt");
+ superio_func_add(chip, "gpio-f71889f");
+ break;
+ case SIO_F71889A_ID:
+ superio_func_add(chip, "f71889fg_wdt");
+ superio_func_add(chip, "gpio-f71889a");
+ break;
+ case SIO_F71858_ID:
+ /* Confirmed (by datasheet) not to have a watchdog. */
+ break;
+ case SIO_F81865_ID:
+ superio_func_add(chip, "f81865_wdt");
+ break;
+ case SIO_F81866_ID:
+ superio_func_add(chip, "f81866_wdt");
+ superio_func_add(chip, "gpio-f81866");
+ break;
+ default:
+ pr_info("Unrecognized Fintek device: 0x%04x\n", chip->devid);
+ }
+
+ superio_exit(sioaddr);
+}
+
[PATCH 4/4] mfd: superio: add base SMSC MFD driver
From: Ahmad Fatoum
The SMSC FDC37C93xAPM is the Super I/O chip on the Dell Latitude 7490.
This adds device detection for it and its siblings, so device drivers
can be written against it or init scripts can use its regmap interface.
Signed-off-by: Ahmad Fatoum
---
drivers/mfd/Kconfig| 6 ++
drivers/mfd/Makefile | 1 +
drivers/mfd/smsc-superio.c | 115 +
3 files changed, 122 insertions(+)
create mode 100644 drivers/mfd/smsc-superio.c
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index e2c74a575da4..f4cc71ef0ec8 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -76,4 +76,10 @@ config FINTEK_SUPERIO
help
Select this to probe for IO-port connected Fintek Super I/O chips.
+config SMSC_SUPERIO
+ bool "SMSC Super I/O chip"
+ select MFD_SUPERIO
+ help
+ Select this to probe for IO-port connected SMSC Super I/O chips.
+
endmenu
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 59b401dd2ea0..0c24493e3d86 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -14,3 +14,4 @@ obj-$(CONFIG_RAVE_SP_CORE)+= rave-sp.o
obj-$(CONFIG_MFD_STPMIC1) += stpmic1.o
obj-$(CONFIG_MFD_SUPERIO) += superio.o
obj-$(CONFIG_FINTEK_SUPERIO) += fintek-superio.o
+obj-$(CONFIG_SMSC_SUPERIO) += smsc-superio.o
diff --git a/drivers/mfd/smsc-superio.c b/drivers/mfd/smsc-superio.c
new file mode 100644
index ..349c878cefe0
--- /dev/null
+++ b/drivers/mfd/smsc-superio.c
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Ahmad Fatoum, Pengutronix
+ */
+
+#define pr_fmt(fmt) "smsc-superio: " fmt
+
+#include
+#include
+#include
+#include
+
+#define SIO_UNLOCK_KEY 0x55/* Key to enable Super-I/O */
+#define SIO_LOCK_KEY 0xAA/* Key to disable Super-I/O */
+
+#define SMSC_ID0x10b8 /* Standard Microsystems Corp
PCI ID */
+
+static void superio_enter(u16 sioaddr)
+{
+ outb(SIO_UNLOCK_KEY, sioaddr);
+ mdelay(1);
+ outb(SIO_UNLOCK_KEY, sioaddr);
+}
+
+static void superio_exit(u16 sioaddr)
+{
+ outb(SIO_LOCK_KEY, sioaddr);
+}
+
+static void smsc_superio_find(u16 sioaddr, u16 id_reg)
+{
+ struct superio_chip *chip;
+ u16 devid;
+
+ superio_enter(sioaddr);
+
+ devid = superio_inw(sioaddr, id_reg);
+ switch(devid >> 8) {
+ case 0x02:
+ case 0x03:
+ case 0x07:
+ case 0x09:
+ case 0x0a:
+ case 0x0b:
+ case 0x0e:
+ case 0x14:
+ case 0x30:
+ case 0x40:
+ case 0x42:
+ case 0x43:
+ case 0x44:
+ case 0x46:
+ case 0x47:
+ case 0x4c:
+ case 0x4d:
+ case 0x51:
+ case 0x52:
+ case 0x54:
+ case 0x56:
+ case 0x57:
+ case 0x59:
+ case 0x5d:
+ case 0x5f:
+ case 0x60:
+ case 0x62:
+ case 0x67:
+ case 0x6b:
+ case 0x6e:
+ case 0x6f:
+ case 0x74:
+ case 0x76:
+ case 0x77:
+ case 0x78:
+ case 0x79:
+ case 0x7a:
+ case 0x7c:
+ case 0x7d:
+ case 0x7f:
+ case 0x81:
+ case 0x83:
+ case 0x85:
+ case 0x86:
+ case 0x89:
+ case 0x8c:
+ case 0x90:
+ break;
+ default:
+ pr_debug("Not a SMSC device (port=0x%02x, devid=0x%04x)\n",
+sioaddr, devid);
+ return;
+ }
+
+ chip = xzalloc(sizeof(*chip));
+
+ chip->devid = devid;
+ chip->vid = SMSC_ID;
+ chip->sioaddr = sioaddr;
+ chip->enter = superio_enter;
+ chip->exit = superio_exit;
+
+ superio_chip_add(chip);
+
+ superio_exit(sioaddr);
+}
+
+static int smsc_superio_detect(void)
+{
+ u16 ports[] = { 0x2e, 0x4e, 0x162e, 0x164e, 0x3f0, 0x370 };
+
+ for (int i = 0; i < ARRAY_SIZE(ports); i++)
+ smsc_superio_find(ports[i], SIO_REG_DEVID);
+
+ return 0;
+}
+coredevice_initcall(smsc_superio_detect);
--
2.23.0
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 1/4] mfd: add basic Super I/O chip helpers
Super I/O chips are ICs common to x86 that are used for interfacing
to low-bandwidth peripherals. They often contain serial ports, watchdog
timers and hardware monitoring units.
They are usually addressable via one of two I/O port pairs, either
0x2e-0x2f or 0x4e-0x4f, but they don't typically respond to reads from
their range unless a device-specific 'password' has been poked in.
After this is done, they are read and written in the same manner however.
On Linux, these devices aren't subject to any device/driver model.
Each driver for some function (e.g. watchdog or GPIO) duplicates the
device probe in the module_init and board-specific configuration
is handled via module parameters.
Lets do it a bit fancier in barebox and add a helper to register chips
and a regmap for the control and configuration registers as well as a
helper to register child devices for each function contained within the
Super I/O chip.
Board-specific configuration, e.g. which pin to use as a watchdog reset,
can then be realized using barebox device-specific parameters.
The regmap will be more of a debugging aid, however.
For ease of porting from Linux, it's expected that access to the
I/O ports won't happen via the regmap. For this reason, the new
header offers functions to read/write these chips' registers
as well.
Signed-off-by: Ahmad Fatoum
---
drivers/mfd/Kconfig | 3 ++
drivers/mfd/Makefile | 1 +
drivers/mfd/superio.c | 98 +++
include/superio.h | 64
4 files changed, 166 insertions(+)
create mode 100644 drivers/mfd/superio.c
create mode 100644 include/superio.h
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 7d924cfca1eb..bd6f14a59f56 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -67,4 +67,7 @@ config MFD_STPMIC1
help
Select this to support communication with the STPMIC1.
+config MFD_SUPERIO
+ bool
+
endmenu
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 16a74abd77f3..690788eefb44 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -12,3 +12,4 @@ obj-$(CONFIG_MFD_TWL4030) += twl4030.o
obj-$(CONFIG_MFD_TWL6030) += twl6030.o
obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o
obj-$(CONFIG_MFD_STPMIC1) += stpmic1.o
+obj-$(CONFIG_MFD_SUPERIO) += superio.o
diff --git a/drivers/mfd/superio.c b/drivers/mfd/superio.c
new file mode 100644
index ..0f08d56cb357
--- /dev/null
+++ b/drivers/mfd/superio.c
@@ -0,0 +1,98 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Ahmad Fatoum, Pengutronix
+ */
+
+#define pr_fmt(fmt) "superio: " fmt
+
+#include
+#include
+#include
+
+struct device_d *superio_func_add(struct superio_chip *siochip, const char
*name)
+{
+ struct device_d *dev;
+ int ret;
+
+ dev = device_alloc(name, DEVICE_ID_DYNAMIC);
+ dev->parent = siochip->dev;
+
+
+ ret = platform_device_register(dev);
+ if (ret)
+ return NULL;
+
+ return dev;
+}
+EXPORT_SYMBOL(superio_func_add)
+
+static int superio_reg_read(void *ctx, unsigned int reg, unsigned int *val)
+{
+ struct superio_chip *siochip = ctx;
+
+ siochip->enter(siochip->sioaddr);
+
+ *val = superio_inb(siochip->sioaddr, reg);
+
+ siochip->exit(siochip->sioaddr);
+
+ return 0;
+}
+
+static int superio_reg_write(void *ctx, unsigned int reg, unsigned int val)
+{
+ struct superio_chip *siochip = ctx;
+
+ siochip->enter(siochip->sioaddr);
+
+ superio_outb(siochip->sioaddr, reg, val);
+
+ siochip->exit(siochip->sioaddr);
+
+ return 0;
+}
+
+static struct regmap_bus superio_regmap_bus = {
+ .reg_write = superio_reg_write,
+ .reg_read = superio_reg_read,
+};
+
+static struct regmap_config superio_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .reg_stride = 1,
+ .max_register = 0xff,
+};
+
+void superio_chip_add(struct superio_chip *siochip)
+{
+ struct regmap *regmap;
+ char *chipname;
+ char str[5];
+ int ret;
+
+ chipname = xasprintf("superio-%04x:%04x@%02x",
+siochip->vid, siochip->devid, siochip->sioaddr);
+ siochip->dev = add_generic_device(chipname, DEVICE_ID_SINGLE, NULL,
+ siochip->sioaddr, 2, IORESOURCE_IO,
+ NULL);
+
+ siochip->dev->priv = siochip;
+
+ sprintf(str, "%04x", siochip->vid);
+ dev_add_param_fixed(siochip->dev, "vendor", str);
+ sprintf(str, "%04x", siochip->devid);
+ dev_add_param_fixed(siochip->dev, "device", str);
+
+ regmap = regmap_init(siochip->dev, _regmap_bus, siochip,
+_regmap_config);
+ if (IS_ERR(regmap))
+ pr_warn("creating %s regmap failed: %s\n",
+ chipname, strerror(-PTR_ERR(regmap)));
+
+ ret = regmap_register_cdev(regmap,
Re: MFGTools from NXP
Hello Marco, Thanks to your reply. I am not keen to use specifically MFGTool but I do need a method to load flash new barebox and kernel images from windows side. I have tried with MFGTools but was not successfully when using kobs-ng to flash the barebox. I have attached a log that I send to NXP. If there is more knowledge on how to use imx-usb-loader than I would give it a try. Thanks, Mihaita On Fri, Oct 11, 2019 at 9:21 AM Marco Felsch wrote: > > Hi Mihaita, > > On 19-10-10 15:03, Mihaita Ivascu wrote: > > Hello all, > > > > Does anybody have experience with using MFGTools to flash the > > barebox and kernel in NAND for imx6ul platforms? > > Hm.. I think the most of us are using the imx-usb-loader tool ;) I > used it a long time ago but let's try if I can help you. So what is your > question? > > Regards, > Marco > > > Thanks, > >Mihaita > > > > ___ > > barebox mailing list > > barebox@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/barebox > > > > -- > Pengutronix e.K. | | > Industrial Linux Solutions | http://www.pengutronix.de/ | > Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| > Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | I am trying to update the mtd partitions on imx6ul platform using mfgtools . I have created a .xml script Everything runs without issues until I want to flash the new barebox bootloader using kobs-ng tool. UTP: received command '$ mount -t debugfs debugfs /sys/kernel/debug' UTP: executing "mount -t debugfs debugfs /sys/kernel/debug" UTP: sending Success to kernel for command $ mount -t debugfs debugfs /sys/kernel/debug. [ 6.009463] utp_poll: pass returned. UTP: received command '$ mount | grep ^debugfs' UTP: executing "mount | grep ^debugfs" debugfs on /sys/kernel/debug type debugfs (rw,relatime) UTP: sending Success to kernel for command $ mount | grep ^debugfs. [ 6.271066] utp_poll: pass returned. UTP: received command '$ flash_erase /dev/mtd0 0 0' UTP: executing "flash_erase /dev/mtd0 0 0" Erasing 128 Kibyte @ 64004e -- -1 % complete UTP: sending Success to kernel for command $ flash_erase /dev/mtd0 0 0. [ 6.530622] utp_poll: pass returned. UTP: received command 'send' UTP: sending Success to kernel for command send. UTP: received command '$ kobs-ng init -x -v --chip_0_device_path=/dev/mtd0 $FILE' UTP: executing "kobs-ng init -x -v --chip_0_device_path=/dev/mtd0 $FILE" MTD CONFIG: chip_0_device_path = "/dev/mtd0" chip_1_device_path = "(null)" search_exponent = 2 data_setup_time = 80 data_hold_time = 60 address_setup_time = 25 data_sample_time = 6 row_address_size = 3 column_address_size = 2 read_command_code1 = 0 read_command_code2 = 48 boot_stream_major_version = 1 boot_stream_minor_version = 0 boot_stream_sub_version = 0 ncb_version = 3 boot_stream_1_address = 0 boot_stream_2_address = 0 -- We add the 1k-padding to the uboot. .tmp_kobs_ng: verifying using key '' .tmp_kobs_ng: is a valid bootstream for key '' mtd: Linux[ 6.693158] [ cut here ] [ 6.698005] Kernel BUG at c057cdfc [verbose debug info unavailable] [ 6.704291] Internal error: Oops - BUG: 0 [#1] SMP ARM [ 6.709449] Modules linked in: [ 6.712552] CPU: 0 PID: 111 Comm: kobs-ng Not tainted 4.8.0 #18 [ 6.718486] Hardware name: Freescale i.MX6 Ultralite (Device Tree) [ 6.724684] task: c3e58000 task.stack: c3e2e000 [ 6.729248] PC is at nand_fill_oob+0x44/0xac [ 6.733546] LR is at mtd_ooblayout_free+0x5c/0x74 [ 6.738272] pc : [] lr : [] psr: a013 [ 6.738272] sp : c3e2fca0 ip : c3e2fbf0 fp : c3e2fcc4 [ 6.749770] r10: c3d89800 r9 : 0100 r8 : [ 6.755013] r7 : r6 : c3e2fdc8 r5 : de42e0b8 r4 : 0010 [ 6.761561] r3 : c3e2fc50 r2 : c3e2fc50 r1 : 0001 r0 : ffde [ 6.768109] Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none [ 6.775262] Control: 10c5387d Table: 83e6006a DAC: 0051 [ 6.781023] Process kobs-ng (pid: 111, stack limit = 0xc3e2e210) [ 6.787046] Stack: (0xc3e2fca0 to 0xc3e3) [ 6.791432] fca0: c3e2fcb0 de42e0b8 0800 0800 c3e2fd34 c3e2fcc8 [ 6.799634] fcc0: c057d19c c057cdc4 c3e2fcec c3e2fcd8 c0964e78 c0173f98 de42e0b8 de42e710 [ 6.807838] fce0: c3e2fd34 003f 0010 0010 c3d89800 [ 6.816039] fd00: 0100 6013 c3e2fdc8 de42e0b8 0008 0800 [ 6.824241] fd20: c3e2fd5c c3e2fd38 c057d6a8 c057ce70 c3e2fdc8 c3e2fd48 [ 6.832444] fd40: 00080800 c3e2fd84 c3e2fd60 c0562670 c057d614 [ 6.840646] fd60: c3e2fdc8 0800 c0562604 0051 c3ccb800 bede4ac8 c3e2fda4 c3e2fd88 [ 6.848847] fd80: c055ec9c c0562610 c3e2fdc8 bede4ac8 0800 00099110 c3e2fedc c3e2fda8 [ 6.857049] fda0: c0564b8c c055ec64 c3e2fdc8 0002
