On Tue, Jun 30, 2020 at 12:09:57PM +0200, Ahmad Fatoum wrote:
On 6/30/20 11:49 AM, Michael Grzeschik wrote:
The headerfile is used in the kernel for access of MDIO Managed Devices
(MMD) indirect access. Some drivers already use those device addresses.
We add the headerfile from the kernel and
On Tue, Jun 30, 2020 at 12:15:00PM +0200, Ahmad Fatoum wrote:
Hello,
On 6/30/20 11:49 AM, Michael Grzeschik wrote:
There are dt-bindings for the setup of the clk configuration in the phy.
This patch adds support for these bindings in the driver.
Signed-off-by: Michael Grzeschik
---
On 6/30/20 11:49 AM, Michael Grzeschik wrote:
> The headerfile is used in the kernel for access of MDIO Managed Devices
> (MMD) indirect access. Some drivers already use those device addresses.
> We add the headerfile from the kernel and change the current users to
> use the defines instead
>
This series makes the first step to remove the phy_fixups for at80xx
phys, which is usually hardcoded to prepare clk, delay and SmartEEE
glitch fixup. With further support of all these settings in the dts, the
fixups can be removed.
Michael Grzeschik (2):
net: phy: add uapi/linux/mdio.h from
The headerfile is used in the kernel for access of MDIO Managed Devices
(MMD) indirect access. Some drivers already use those device addresses.
We add the headerfile from the kernel and change the current users to
use the defines instead
Reviewed-by: Ahmad Fatoum
Signed-off-by: Michael Grzeschik
There are dt-bindings for the setup of the clk configuration in the phy.
This patch adds support for these bindings in the driver.
Reviewed-by: Ahmad Fatoum
Signed-off-by: Michael Grzeschik
---
v1 -> v2: - returning config_init directly with clk_out_config
- removed superflous and
Hello,
On 6/30/20 11:49 AM, Michael Grzeschik wrote:
> There are dt-bindings for the setup of the clk configuration in the phy.
> This patch adds support for these bindings in the driver.
>
> Signed-off-by: Michael Grzeschik
> ---
> drivers/net/phy/at803x.c | 181
The headerfile is used in the kernel for access of MDIO Managed Devices
(MMD) indirect access. Some drivers already use those device addresses.
We add the headerfile from the kernel and change the current users to
use the defines instead
Signed-off-by: Michael Grzeschik
---
There are dt-bindings for the setup of the clk configuration in the phy.
This patch adds support for these bindings in the driver.
Signed-off-by: Michael Grzeschik
---
drivers/net/phy/at803x.c | 181 +--
1 file changed, 175 insertions(+), 6 deletions(-)
diff
This series makes the first step to remove the phy_fixups for at80xx
phys, which is usually hardcoded to prepare clk, delay and SmartEEE
glitch fixup. With further support of all these settings in the dts, the
fixups can be removed.
Michael Grzeschik (2):
net: phy: add uapi/linux/mdio.h from
The problem is that we want to be able to have the rootfs and kernel on
separate partitions. We've looked into the Boot Loader Specification,
but from what we saw, it makes A-B systems difficult (according to the
spec, there can only be one "$BOOT" filesystem on a device).
For reference:
This patch introduces a new env var which specifies which device
is the rootfs device to be used in Linux, passed to Linux via bootargs,
identified by the rootfs partition's PARTUUID.
global.bootm.root supplements global.bootm.appendroot, in that it overrides
appendroot's naïve default, which
---
common/bootm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/common/bootm.c b/common/bootm.c
index af9f9b8f447d..3772fa4c2c51 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -743,6 +743,7 @@ static int bootm_init(void)
globalvar_add_simple("bootm.image", NULL);
---
common/bootm.c | 4 +++-
include/bootm.h | 2 ++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/common/bootm.c b/common/bootm.c
index 8fec1ee34dd8..af9f9b8f447d 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -64,6 +64,7 @@ void bootm_data_init_defaults(struct bootm_data
---
common/bootm.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/common/bootm.c b/common/bootm.c
index 3772fa4c2c51..1a9ef0673e55 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -656,7 +656,11 @@ int bootm_boot(struct bootm_data *bootm_data)
if
---
common/bootm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/common/bootm.c b/common/bootm.c
index 1a9ef0673e55..b7c15cac0ba4 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -657,6 +657,8 @@ int bootm_boot(struct bootm_data *bootm_data)
char *rootarg;
dtb symbols (__dtb_start, __dtb_end) are already defined using
RO_DATA_SECTION. This duplicated dtb section is a leftover used by
Kalray internal tools to patch the dtb when loading the elf on a
target. Remove it to keep only one symbol definition.
Signed-off-by: Clement Leger
---
There is no reason anymore to limit the use of elf on mips since there
is no elf specific support needed in architectures. Drop the MIPS
dependency.
Signed-off-by: Clement Leger
---
common/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/common/Kconfig b/common/Kconfig
index
This serie adds support for elf bootm support on KVX architecture.
First patches are allowing to build elf support for KVX and then bootm
support is added to KVX.
Changes from v2 -> v3:
- Rename sync_icache_dcache to sync_caches_for_execution
- Keep COMPILE_TEST support for ELF
Changes from v1
Some architectures might not want to support uImage. To do so, allow
IH_ARCH to be let undefined which will make it possible to compile boot
support.
Signed-off-by: Clement Leger
---
common/bootm.c | 2 +-
include/image.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git
From: Clement Leger
In order to boot elfs files, add bootm command support for kvx. This support
can boot elf files using bootm elf support. initrd and device-tree handling
is also included and loads them after the elf file load address.
Signed-off-by: Clement Leger
---
arch/kvx/Kconfig
Before booting, we must make sure the I-cache is synchronized with the
D-cache to execute loaded instructions. In order to do that, add a
function which execute a fence to ensure every memory accesses have
been committed out of processor pipeline to memory and then invalidate
I-cache to reload
On Mon, Jun 29, 2020 at 08:38:30PM -0400, David Dgien wrote:
> This series fixes various bugs and bit-rot issues with the module
> loading code. It also ports a couple of modules features from the Linux
> kernel: arch specific section fixups, and module PLTs for ARM modules,
> to contain veneers
On Tue, Jun 30, 2020 at 01:06:01PM +0200, Michael Grzeschik wrote:
> This series makes the first step to remove the phy_fixups for at80xx
> phys, which is usually hardcoded to prepare clk, delay and SmartEEE
> glitch fixup. With further support of all these settings in the dts, the
> fixups can be
We already have some PBL MCI implementations in barebox, but none
are used for chainloading a barebox from a file system.
There are some SoCs that would benefit from this however:
At least the Zynq, AT91, SoCFPGA and TI SoCs.
In preparation for supporting first stage boot on these where it's
The AT91 BootROM loads a boot.bin file from the first FAT partition
into SRAM, when booting from MMC. To avoid the need for two barebox
configurations for each of the bootloader stages, add PBL support
for reading from FAT. This way each stage need only have a different
PBL entry point.
The BootROM passes us information about the boot medium in r4 and we
already use that in first stage and pass it along to second stage
PBL already. To make use of it, we need to pass it to barebox proper, do
this by writing it in the last 4 bytes of the SRAM. As second stage
always run in DRAM,
Stack is always set up to end of SRAM before PBL, either by ROM code or
by first stage bootloader, be it at91bootstrap or barebox in a later
commit, so no need to change the stack pointer again.
Signed-off-by: Ahmad Fatoum
---
arch/arm/boards/sama5d27-giantboard/lowlevel.c | 13 +++--
Different peripherals, including the SDRAM, are unusable without prior
matrix configuration. Port over the necessary at91bootstrap parts for
sama5d2 use.
Signed-off-by: Ahmad Fatoum
---
arch/arm/mach-at91/Makefile | 2 +-
arch/arm/mach-at91/include/mach/matrix.h| 21 +++
On Mon, Jun 29, 2020 at 10:37:43AM +0200, Ahmad Fatoum wrote:
> Hi,
>
> On 6/26/20 8:41 AM, Sascha Hauer wrote:
> > The comment above do_autoboot_countdown() states: "This function can be
> > called multiple times, it is executed only the first time.". Since
> > 1973892533 ("startup: don't
On Tue, Jun 30, 2020 at 10:43:58PM +0200, Clement Leger wrote:
> This serie adds support for elf bootm support on KVX architecture.
> First patches are allowing to build elf support for KVX and then bootm
> support is added to KVX.
>
> Changes from v2 -> v3:
> - Rename sync_icache_dcache to
On Tue, Jun 30, 2020 at 10:53:44PM +0200, Clement Leger wrote:
> dtb symbols (__dtb_start, __dtb_end) are already defined using
> RO_DATA_SECTION. This duplicated dtb section is a leftover used by
> Kalray internal tools to patch the dtb when loading the elf on a
> target. Remove it to keep only
We hard code memory size at three places:
- In the configuration we use to initialize the DDRAM controller
- In the minimal available size passed from PBL to barebox proper
- In the device tree memory node override
Remove the two latter ones and replace them with code that reads the
size back
On Sun, Jun 28, 2020 at 06:32:11PM -0700, Chris Healy wrote:
> EEPROM on fiber optic modules present on Rev C ZII VF610 Dev board
> can be exposed as AT24 compatible devices. Add corresponding DT nodes
> needed for that.
>
> Signed-off-by: Chris Healy
> ---
Applied, thanks
Sascha
> diff --git
Instead of adding missing definitions to the existing at91sam9_ddrsdr.h
and adapting the incoming DDRAM initialization code from at91bootstrap,
just replace the lightly used existing header with:
https://github.com/linux4sam/at91bootstrap/blob/v3.8.12/include/arch/at91_ddrsdrc.h
For easier
Board code might want to disable the watchdog in PBL and enable it later
prior to boot. Provide a helper to do so.
Reviewed-by: Sam Ravnborg
Signed-off-by: Ahmad Fatoum
---
arch/arm/mach-at91/include/mach/at91_wdt.h | 16
1 file changed, 16 insertions(+)
diff --git
There are three users of at91_dbgu_setup_ll and all already call this
function only when IS_ENABLED(CONFIG_DEBUG_LL). Remove the duplicated
condition from the function itself. This allows us to use the function
for pbl_set_console use later on, even with DEBUG_LL disabled.
Signed-off-by: Ahmad
The SAMA5D2 and SAM9X60 both feature generic clocks, which we already
support in barebox proper, but not in PBL. Add PBL support for setting
the parent and enabling them, so we may use it to enable the SDMMC
peripherals in first stage.
Signed-off-by: Ahmad Fatoum
---
For use by the incoming at91bootstrap DDRAMC initialization code,
this commit provides an early_udelay function usable in PBL imported from
https://github.com/linux4sam/at91bootstrap/blob/v3.8.12/driver/at91_pit.c
Signed-off-by: Ahmad Fatoum
---
arch/arm/mach-at91/Makefile |
SAMA5 BootROM passes information about the boot source in the r4
register. Add functions to parse these. To make use of this, entry point
must back up the r4 register, because otherwise it's clobbered by local
variable use.
Signed-off-by: Ahmad Fatoum
---
The peripheral addresses should be always cast with IOMEM() anyway, so do
this directly in the header to make user code less verbose.
Signed-off-by: Ahmad Fatoum
---
.../arm/boards/sama5d27-giantboard/lowlevel.c | 6 +-
arch/arm/boards/sama5d27-som1/lowlevel.c | 14 +-
This adapts the sama5d3 first stage patch set I sent around a few times
for use on the sama5d2. Unlike the original patch set, we now do the
chainloading in the PBL, so integrators can still use multi-image and
don't have to build barebox more than once.
With the FAT PBL implementation in place,
The BootROM constrains us to a 64K big first stage bootloader. Add a PBL
entry point for a xload barebox that sets up the minimum necessary to
load a FAT32 barebox.bin from the SD-Card.
Signed-off-by: Ahmad Fatoum
---
arch/arm/boards/sama5d27-som1/lowlevel.c | 32 +--
They are unused and force all headers included by it to have
__ASSEMBLY__ guards for non-preprocessor code. Avoid this.
Signed-off-by: Ahmad Fatoum
---
arch/arm/mach-at91/at91sam9_reset.S| 1 -
arch/arm/mach-at91/at91sam9g45_reset.S | 1 -
2 files changed, 2 deletions(-)
diff --git
Without reconfiguration of the AIC redirection, the OS interrupt
handling will misbehave later on. Add it to the SoC init.
Signed-off-by: Ahmad Fatoum
---
arch/arm/mach-at91/Makefile | 2 +-
arch/arm/mach-at91/aic.c | 28 +++
The board only has SD-Card as storage. Add a barebox update handler to
flash barebox to it, as well as an nv.boot.default=mmc1 to boot from it.
Signed-off-by: Ahmad Fatoum
---
arch/arm/boards/sama5d27-giantboard/Makefile| 2 ++
arch/arm/boards/sama5d27-giantboard/board.c | 17
Instead of adding missing definitions to the existing at91sam9_ddrsdr.h
and adapting the incoming DDRAM initialization code from at91bootstrap,
just replace the lightly used existing header with:
https://github.com/linux4sam/at91bootstrap/blob/v3.8.12/include/arch/at91_ddrsdrc.h
For easier
The watchdog on these SoCs is enabled by default on system boot, so a
driver is especially useful. According to data sheet the mode register
containing the timeout can be configured only once, but I couldn't
verify this on the sama5d2. Regardless, the driver takes care not to
change the mode
With PBL FAT support implemented, provide an sama5d2_sdhci_start_image
helper that can be called from the PBL to chainload a barebox.bin file
from the first FAT partition.
Signed-off-by: Ahmad Fatoum
---
arch/arm/mach-at91/Kconfig | 5 ++
arch/arm/mach-at91/Makefile |
This commit imports DDRAMC initialization routines for use in PBL from
https://github.com/linux4sam/at91bootstrap/blob/v3.8.12/driver/ddramc.c
Signed-off-by: Ahmad Fatoum
---
arch/arm/mach-at91/Makefile | 2 +-
arch/arm/mach-at91/ddramc_ll.c | 507
The BootROM resets both the SD/MMC host controller and the pin controller,
but the card itself remains in transfer mode. If we redo host-side
setup, we can directly read new blocks off the card.
Signed-off-by: Ahmad Fatoum
---
drivers/mci/Kconfig | 4 +
drivers/mci/Makefile
Port over the low level initialization for sama5d2 SoCs from
at91bootstrap.
Signed-off-by: Ahmad Fatoum
---
.../arm/boards/sama5d27-giantboard/lowlevel.c | 9 +--
arch/arm/boards/sama5d27-som1/lowlevel.c | 9 +--
arch/arm/mach-at91/Makefile | 1 +
The sama5d2 can be fused for one of 9 preset UART iosets. This is then
used by the BootROM for printing the `RomBOOT' header and for the XMODEM
protocol implemented by the SAM-BA monitor. Add two new sama5d2 specific
helpers:
- sama5d2_dbgu_setup_ll for setting up the port with only pinmux and
The BootROM constrains us to a 64K big first stage bootloader. Add a PBL
entry point for a xload barebox that sets up the minimum necessary to
load a FAT32 barebox.bin from the SD-Card.
Signed-off-by: Ahmad Fatoum
---
.../arm/boards/sama5d27-giantboard/lowlevel.c | 28 +--
Instead of adding missing definitions to the existing at91sam9_ddrsdr.h
and adapting the incoming DDRAM initialization code from at91bootstrap,
just replace the lightly used existing header with:
https://github.com/linux4sam/at91bootstrap/blob/v3.8.12/include/arch/at91_ddrsdrc.h
For easier
We now have second stage support for running from sdmmc0 and sdmmc1.
Add a barebox environment and update handler for the two SD cards.
As fall back, we use the environment in the QSPI flash as before as this
is soldered to the SoM and is always available.
Signed-off-by: Ahmad Fatoum
---
The L2 cache controller needs some initialization before use. Same goes
for the CAN SRAM, do so after the MMU setup.
Signed-off-by: Ahmad Fatoum
---
arch/arm/mach-at91/Makefile | 1 +
arch/arm/mach-at91/sama5d2.c | 52
2 files changed, 53 insertions(+)
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