Re: [PATCH 3/3] arm: mach-imx: tzasc: convert to cpu_is_mx8xyz macros

2024-02-26 Thread Ahmad Fatoum
On 26.02.24 15:40, Stefan Kerkmann wrote: > Instead of passing in configuration parameters at runtime we can utilize > the `cpu_is_mx8xyz` macro family to determine which bits should be set. > > As the tzasc driver is imx specific, all functions are prefixed with > `imx8m_` as well. > >

Re: [PATCH 2/3] arm: mach-imx: set cpu type in pbl

2024-02-26 Thread Ahmad Fatoum
On 26.02.24 15:40, Stefan Kerkmann wrote: > In order to use the `cpu_is_imxxyz` macro family in the pbl, > `__imx_cpu_type` has to be defined and initialized. As we don't have > access to the devicetree at this point, we resort to manual assignment. > > Note: It is safe to build the same imx.o

[PATCH] ARM: i.MX: move barebox,bootsource-mmc aliases to chosen node

2024-02-26 Thread Sascha Hauer
The barebox,bootsource-* properties are looked for in /chosen, not in /aliases. Move the properties to the correct node. Fixes: 7eedf79ba9 ("ARM: i.MX: add barebox,bootsource-mmc aliases") Signed-off-by: Sascha Hauer --- arch/arm/dts/imx51.dtsi | 3 +++ arch/arm/dts/imx53.dtsi | 3 +++

Re: [PATCH 1/3] arm: mach-imx: tzasc: lock id_swap_bypass bit

2024-02-26 Thread Ahmad Fatoum
On 26.02.24 15:40, Stefan Kerkmann wrote: > This commit ports U-Boot commit 1289ff7bd7e4 ("imx8m: lock > id_swap_bypass bit in tzc380 enable") to barebox. This is the original > commit message: > >> According to TRM for i.MX8M Nano and Plus, GPR10 register contains lock >> bit for

RE: [PATCH 1/3] arm: mach-imx: tzasc: lock id_swap_bypass bit

2024-02-26 Thread ZHIZHIKIN Andrey
> -Original Message- > From: Stefan Kerkmann > Sent: Monday, February 26, 2024 3:40 PM > To: Sascha Hauer ; BAREBOX > > Cc: Stefan Kerkmann ; ZHIZHIKIN Andrey > > Subject: [PATCH 1/3] arm: mach-imx: tzasc: lock id_swap_bypass bit > > > This commit ports U-Boot commit 1289ff7bd7e4

Re: [PATCH] ARM: i.MX: move barebox,bootsource-mmc aliases to chosen node

2024-02-26 Thread Sascha Hauer
On Mon, 26 Feb 2024 16:31:17 +0100, Sascha Hauer wrote: > The barebox,bootsource-* properties are looked for in /chosen, not in > /aliases. Move the properties to the correct node. > > Applied, thanks! [1/1] ARM: i.MX: move barebox,bootsource-mmc aliases to chosen node

[PATCH] net: drop unused rarp.h

2024-02-26 Thread Antony Pavlov
Signed-off-by: Antony Pavlov --- net/rarp.h | 23 --- 1 file changed, 23 deletions(-) diff --git a/net/rarp.h b/net/rarp.h deleted file mode 100644 index 0986b02513f..000 --- a/net/rarp.h +++ /dev/null @@ -1,23 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */

Re: [PATCH 1/2] ARM: i.MX6ul: TQMa6ul: fix mmc aliases

2024-02-26 Thread Sascha Hauer
On Mon, 26 Feb 2024 15:14:57 +0100, Sascha Hauer wrote: > The TQMa6ul upstream device trees contain aliases which swap the order > of the mmc nodes, so what used to be mmc0 has now become mmc1 and vice > versa. With this mmc0 now is the eMMC and mmc1 is the SD card. > > Introduce a imx6ul.dtsi

Re: NFSv4 boot support?

2024-02-26 Thread Ahmad Fatoum
Hello, On 20.02.24 14:53, Alessandro Rubini wrote: >>> This hasn't >>> seen development activity in 5 years. >> >> Please see https://github.com/virtualsquare/picotcp > > But the TCP/IPV4 standard didn't change, either. I don't mind lack of new features, but I'd prefer that when we adopt an

Re: [EXT] Re: [EXT] Re: [PATCH v2 2/2] raspi: fixup additional vc created nodes

2024-02-26 Thread Ahmad Fatoum
Hello Denis, On 21.02.24 08:46, Denis OSTERLAND-HEIM wrote: > Hi, > > It took me a while to think about it. > First I would like to explain my current boot process and then how I think > it would like with your suggestion. > > > Now: > > Disk layout: > - rpi boot fat: dt-2nd.img, barebox-dts,

[PATCH 1/2] ARM: i.MX6ul: TQMa6ul: fix mmc aliases

2024-02-26 Thread Sascha Hauer
The TQMa6ul upstream device trees contain aliases which swap the order of the mmc nodes, so what used to be mmc0 has now become mmc1 and vice versa. With this mmc0 now is the eMMC and mmc1 is the SD card. Introduce a imx6ul.dtsi which adds barebox,bootsource-mmcx aliases so that

[PATCH 2/2] ARM: i.MX6ul: TQMa6ul: install barebox on eMMC boot partitions

2024-02-26 Thread Sascha Hauer
Install barebox on the eMMC boot partitions which offer enough space for bigger barebox images and which also provides a failsafe update. Signed-off-by: Sascha Hauer --- arch/arm/boards/tqma6ulx/board.c| 2 +- arch/arm/dts/imx6ul-tqma6ul-common.dtsi | 5 - 2 files changed, 1

[PATCH 1/3] arm: mach-imx: tzasc: lock id_swap_bypass bit

2024-02-26 Thread Stefan Kerkmann
This commit ports U-Boot commit 1289ff7bd7e4 ("imx8m: lock id_swap_bypass bit in tzc380 enable") to barebox. This is the original commit message: > According to TRM for i.MX8M Nano and Plus, GPR10 register contains lock > bit for TZASC_ID_SWAP_BYPASS bit. This bit is required to be set in > order

[PATCH 0/3] arm: mach-imx: tzasc: port lock id_swap_bypass bit

2024-02-26 Thread Stefan Kerkmann
sc.c | 47 ++ include/mach/imx/generic.h | 5 + include/mach/imx/tzasc.h | 8 ++-- 6 files changed, 45 insertions(+), 32 deletions(-) --- base-commit: ed7c14536d521793199abf0597164a46ba68e8e5 change-id: 20240226-v2024-02-0-topic-imx8m-n-p-tzac-480c113ca052 Best regards,

[PATCH 2/3] arm: mach-imx: set cpu type in pbl

2024-02-26 Thread Stefan Kerkmann
In order to use the `cpu_is_imxxyz` macro family in the pbl, `__imx_cpu_type` has to be defined and initialized. As we don't have access to the devicetree at this point, we resort to manual assignment. Note: It is safe to build the same imx.o object file for both barebox pbl and proper as the

[PATCH 3/3] arm: mach-imx: tzasc: convert to cpu_is_mx8xyz macros

2024-02-26 Thread Stefan Kerkmann
Instead of passing in configuration parameters at runtime we can utilize the `cpu_is_mx8xyz` macro family to determine which bits should be set. As the tzasc driver is imx specific, all functions are prefixed with `imx8m_` as well. Signed-off-by: Stefan Kerkmann --- arch/arm/mach-imx/atf.c |