[PATCH 2/2] fixup! ARM: imx8mq-zii-ultra: Add USB related nodes

2019-02-27 Thread Andrey Smirnov
---
 arch/arm/dts/imx8mq-zii-ultra-rmb3.dts | 2 +-
 arch/arm/dts/imx8mq-zii-ultra.dtsi | 2 --
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/arm/dts/imx8mq-zii-ultra-rmb3.dts 
b/arch/arm/dts/imx8mq-zii-ultra-rmb3.dts
index 78280029b..dd4379bd5 100644
--- a/arch/arm/dts/imx8mq-zii-ultra-rmb3.dts
+++ b/arch/arm/dts/imx8mq-zii-ultra-rmb3.dts
@@ -39,5 +39,5 @@
 };
 
 _hub {
-   port-swap=<0x01>;
+   swap-dx-lanes = <0>;
 };
diff --git a/arch/arm/dts/imx8mq-zii-ultra.dtsi 
b/arch/arm/dts/imx8mq-zii-ultra.dtsi
index 0c124a5ec..ccf80d3de 100644
--- a/arch/arm/dts/imx8mq-zii-ultra.dtsi
+++ b/arch/arm/dts/imx8mq-zii-ultra.dtsi
@@ -231,8 +231,6 @@
compatible = "microchip,usb2513b";
pinctrl-names = "default";
pinctrl-0 = <_usb2513b>;
-   #address-cells=<1>;
-   #size-cells=<1>;
reg = <0x2c>;
reset-gpios = < 25 GPIO_ACTIVE_LOW>;
};
-- 
2.20.1


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[PATCH 1/2] fixup! ARM: imx8mq-zii-ultra: Enable PCIE1 and PCIE2

2019-02-27 Thread Andrey Smirnov
---
 arch/arm/dts/imx8mq-zii-ultra.dtsi | 9 -
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/arch/arm/dts/imx8mq-zii-ultra.dtsi 
b/arch/arm/dts/imx8mq-zii-ultra.dtsi
index d46a26d81..0c124a5ec 100644
--- a/arch/arm/dts/imx8mq-zii-ultra.dtsi
+++ b/arch/arm/dts/imx8mq-zii-ultra.dtsi
@@ -272,15 +272,14 @@
clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
status = "okay";
 
-   pcie@0,0 {
-   reg = <0x00 0 0 0 0>;
+   host@0 {
+   reg = <0 0 0 0 0>;
 
#address-cells = <3>;
#size-cells = <2>;
 
-   /* pcie endpoint 01:00.0 */
-   eth1: intel,i210@pcie0,0 {
-   reg = <0x01 0 0 0 0>;
+   i210: i210@0 {
+   reg = <0 0 0 0 0>;
};
};
 };
-- 
2.20.1


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Re: [PATCH 7/7] ARM: imx8mq-zii-ultra: Add USB related nodes

2019-02-27 Thread Andrey Smirnov
On Wed, Feb 27, 2019 at 3:10 AM Lucas Stach  wrote:
>
> Am Dienstag, den 26.02.2019, 19:16 -0800 schrieb Andrey Smirnov:
> > Add nodes for exposed USB ports as well as USB hub connected to one of
> > them.
> >
> > > Signed-off-by: Andrey Smirnov 
> > ---
> >  arch/arm/dts/imx8mq-zii-ultra-rmb3.dts |  4 +++
> >  arch/arm/dts/imx8mq-zii-ultra.dtsi | 34 ++
> >  2 files changed, 38 insertions(+)
> >
> > diff --git a/arch/arm/dts/imx8mq-zii-ultra-rmb3.dts 
> > b/arch/arm/dts/imx8mq-zii-ultra-rmb3.dts
> > index b2b3a560b..78280029b 100644
> > --- a/arch/arm/dts/imx8mq-zii-ultra-rmb3.dts
> > +++ b/arch/arm/dts/imx8mq-zii-ultra-rmb3.dts
> > @@ -37,3 +37,7 @@
> > > >;
> > > };
> >  };
> > +
> > +_hub {
> > + port-swap=<0x01>;
>
> This is wrong. With the upstream driver/binding this should be:
> swap-dx-lanes = <0>;
>

Ugh, missed this one, will send a fixup.

> > +};
> > diff --git a/arch/arm/dts/imx8mq-zii-ultra.dtsi 
> > b/arch/arm/dts/imx8mq-zii-ultra.dtsi
> > index 83d57916e..d46a26d81 100644
> > --- a/arch/arm/dts/imx8mq-zii-ultra.dtsi
> > +++ b/arch/arm/dts/imx8mq-zii-ultra.dtsi
> > @@ -226,6 +226,16 @@
> > > pinctrl-names = "default";
> > > pinctrl-0 = <_i2c3>;
> > > status = "okay";
> > +
> > > > + usb_hub: usb2513b@2c {
> > > +   compatible = "microchip,usb2513b";
> > > +   pinctrl-names = "default";
> > > +   pinctrl-0 = <_usb2513b>;
> > > +   #address-cells=<1>;
> > + #size-cells=<1>;
>
> Why the address-cells and size-cells here? I don't see why this is
> needed.
>

Probably just a leftover from vendor tree where this node has
children. Will fix.

Thanks,
Andrey Smirnov

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Re: [PATCH 5/7] ARM: imx8mq-zii-ultra: Enable PCIE1 and PCIE2

2019-02-27 Thread Andrey Smirnov
On Wed, Feb 27, 2019 at 3:18 AM Lucas Stach  wrote:
>
> Am Dienstag, den 26.02.2019, 19:16 -0800 schrieb Andrey Smirnov:
> > Enable PCIE1 and PCIE2 used on both Zest and RMB3 boards.
> >
> > > Signed-off-by: Andrey Smirnov 
> > ---
> >  arch/arm/dts/imx8mq-zii-ultra.dtsi | 62 ++
> >  1 file changed, 62 insertions(+)
> >
> > diff --git a/arch/arm/dts/imx8mq-zii-ultra.dtsi 
> > b/arch/arm/dts/imx8mq-zii-ultra.dtsi
> > index a6b2b8966..83d57916e 100644
> > --- a/arch/arm/dts/imx8mq-zii-ultra.dtsi
> > +++ b/arch/arm/dts/imx8mq-zii-ultra.dtsi
> > @@ -37,6 +37,18 @@
> > > gpio = < 19 GPIO_ACTIVE_HIGH>;
> > > enable-active-high;
> > > };
> > +
> > > +   pcie0_refclk: pcie0-refclk {
> > > +   compatible = "fixed-clock";
> > > +   #clock-cells = <0>;
> > > +   clock-frequency = <1>;
> > > +   };
> > +
> > > +   pcie1_refclk: pcie0-refclk {
> > > +   compatible = "fixed-clock";
> > > +   #clock-cells = <0>;
> > > +   clock-frequency = <1>;
> > > +   };
> >  };
> >
> >   {
> > @@ -227,6 +239,42 @@
> > > barebox,provide-mac-address = < 0x640>;
> >  };
> >
> > + {
> > > +   pinctrl-names = "default";
> > > +   pinctrl-0 = <_pcie0>;
> > > +   reset-gpio = < 3 GPIO_ACTIVE_LOW>;
> > > +   clocks = < IMX8MQ_CLK_PCIE1_ROOT>,
> > > +< IMX8MQ_CLK_PCIE1_AUX>,
> > > +< IMX8MQ_CLK_PCIE1_PHY>,
> > > +<_refclk>;
> > > +   clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
> > > +   status = "okay";
> > +};
> > +
> > + {
> > > +   pinctrl-names = "default";
> > > +   pinctrl-0 = <_pcie1>;
> > > +   reset-gpio = < 6 GPIO_ACTIVE_LOW>;
> > > +   clocks = < IMX8MQ_CLK_PCIE2_ROOT>,
> > > +< IMX8MQ_CLK_PCIE2_AUX>,
> > > +< IMX8MQ_CLK_PCIE2_PHY>,
> > > +<_refclk>;
> > > +   clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
> > > +   status = "okay";
> > +
> > > +   pcie@0,0 {
> > + reg = <0x00 0 0 0 0>;
>
> Drop leading zeros from reg properties.
>
> > +
> > > +   #address-cells = <3>;
> > > +   #size-cells = <2>;
> > +
> > + /* pcie endpoint 01:00.0 */
> > + eth1: intel,i210@pcie0,0 {
>
> Node name with "," seems strange.
>
> > + reg = <0x01 0 0 0 0>;
>
> This should also be 0 in the first cell of the reg. The bus number is
> defined by the DT node hierarchy. While this might match with the
> current implementation, the PCIe enumeration could decide to start the
> PCIe bus numbering from a different base during enumeration, so the
> PCIe DT nodes should not have fixed/misleading bus numbers. Actually
> they are ignored during matching of the nodes.
>

Noted, will send a fixup for this.

Thanks
Andrey Smirnov

>
> > + };
> > > +   };
> > +};
> > +
> >   {
> > > pinctrl-names = "default";
> > > pinctrl-0 = <_uart1>;
> > @@ -344,6 +392,20 @@
> > > >;
> > > };
> >
> > > +   pinctrl_pcie0: pcie0grp {
> > > +   fsl,pins = <
> > > > + MX8MQ_IOMUXC_UART4_RXD_PCIE1_CLKREQ_B   0x76
> > > > + MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3   0x16
> > > +   >;
> > > +   };
> > +
> > > +   pinctrl_pcie1: pcie1grp {
> > > +   fsl,pins = <
> > > > + MX8MQ_IOMUXC_UART4_TXD_PCIE2_CLKREQ_B   0x76
> > > > + MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6   0x16
> > > +   >;
> > > +   };
> > +
> > > pinctrl_reg_usdhc2: regusdhc2grpgpio {
> > > fsl,pins = <
> > > >   MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41

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[PATCH v2 2/3] ARM: rpi: save fdt that was passed from VideoCore

2019-02-27 Thread Tomaz Solc
On Raspberry Pi, VideoCore firmware creates a device tree that contains
information about peripherals that were initialized by VideoCore based
on settings in config.txt. Normally this device tree is passed to the
Linux kernel via a pointer in the r2 register. A bootloader needs to
pass this device tree to the kernel, or some peripherals will not work
correctly.

Since the VideoCore device tree is not compatible with barebox, we can't
just pass it to barebox_arm_entry() as the internal barebox device tree.

This commit makes the prebootloader code copy the device tree from
VideoCore into a scrap RAM area just above the area reserved for the
bootloader. Board initialization code in the bootloader proper then
copies it into a file /vc.dtb. The bootloader environment is then free
to pass this file to the kernel at boot (e.g. via bootm -o).
---
 Documentation/boards/bcm2835.rst  |  4 ++
 arch/arm/boards/raspberry-pi/lowlevel.c   | 68 ++-
 arch/arm/boards/raspberry-pi/lowlevel.h   |  9 
 arch/arm/boards/raspberry-pi/rpi-common.c | 34 
 4 files changed, 96 insertions(+), 19 deletions(-)
 create mode 100644 arch/arm/boards/raspberry-pi/lowlevel.h

diff --git a/Documentation/boards/bcm2835.rst b/Documentation/boards/bcm2835.rst
index ea80d5834..95e910896 100644
--- a/Documentation/boards/bcm2835.rst
+++ b/Documentation/boards/bcm2835.rst
@@ -30,5 +30,9 @@ Raspberry Pi
 
   6. Turn board's power on.
 
+VideoCore firmware creates a device tree based on the entries in 
``config.txt``. This file is available to the Barebox environment in the file 
``/vc.dtb``. For example, to boot a kernel shipped with Raspbian::
+
+bootm -o /vc.dtb /boot/kernel7.img
+
 .. _Raspberry Pi firmware: 
https://codeload.github.com/raspberrypi/firmware/zip/80e1fbeb78f9df06701d28c0ed3a3060a3f557ef
 .. _documentation for config.txt: 
https://www.raspberrypi.org/documentation/configuration/config-txt/
diff --git a/arch/arm/boards/raspberry-pi/lowlevel.c 
b/arch/arm/boards/raspberry-pi/lowlevel.c
index 1a3d39421..4b64f5d1d 100644
--- a/arch/arm/boards/raspberry-pi/lowlevel.c
+++ b/arch/arm/boards/raspberry-pi/lowlevel.c
@@ -3,43 +3,73 @@
 #include 
 #include 
 #include 
+#include 
 
-extern char __dtb_bcm2835_rpi_start[];
-ENTRY_FUNCTION(start_raspberry_pi1, r0, r1, r2)
+#include "lowlevel.h"
+
+static void copy_vc_fdt(void *dest, void *src, unsigned long max_size)
 {
-   void *fdt = __dtb_bcm2835_rpi_start + get_runtime_offset();
+   struct fdt_header *oftree_src = src;
+   struct fdt_header *oftree_dest = dest;
 
-   arm_cpu_lowlevel_init();
+   unsigned long size = be32_to_cpu(oftree_src->totalsize);
+   if (size > max_size) {
+   oftree_dest->magic = cpu_to_be32(VIDEOCORE_FDT_ERROR);
+   /* Save an error code after the magic value for easier
+* debugging. We can't print out anything this early */
+   oftree_dest->totalsize = cpu_to_be32(ENOMEM);
+   return;
+   }
 
-   barebox_arm_entry(BCM2835_SDRAM_BASE, SZ_128M, fdt);
+   memmove(dest, src, size);
 }
 
-extern char __dtb_bcm2836_rpi_2_start[];
-ENTRY_FUNCTION(start_raspberry_pi2, r0, r1, r2)
+/* Must be inline since stack isn't setup yet. */
+static inline void start_raspberry_pi(unsigned long memsize, void *fdt,
+   void *vc_fdt)
 {
-   void *fdt = __dtb_bcm2836_rpi_2_start + get_runtime_offset();
+   void *saved_vc_fdt;
+   unsigned long membase = BCM2835_SDRAM_BASE;
+
+   /* A pointer to the FDT created by VideoCore was passed to us in r2. We
+* reserve some memory just above the region used for Basebox and copy
+* this FDT there. We fetch it from there later in rpi_devices_init().*/
+   memsize -= VIDEOCORE_FDT_SZ;
 
arm_cpu_lowlevel_init();
 
-   barebox_arm_entry(BCM2835_SDRAM_BASE, SZ_512M, fdt);
+   /* Copied from barebox_arm_entry(). We need stack here early
+* for normal function calls to work. */
+   arm_setup_stack(arm_mem_stack_top(membase, membase + memsize) - 16);
+
+   fdt += get_runtime_offset();
+
+   saved_vc_fdt = (void *)(membase + memsize);
+   copy_vc_fdt(saved_vc_fdt, vc_fdt, VIDEOCORE_FDT_SZ);
+
+   barebox_arm_entry(membase, memsize, fdt);
 }
 
-extern char __dtb_bcm2837_rpi_3_start[];
-ENTRY_FUNCTION(start_raspberry_pi3, r0, r1, r2)
+extern char __dtb_bcm2835_rpi_start[];
+ENTRY_FUNCTION(start_raspberry_pi1, r0, r1, r2)
 {
-   void *fdt = __dtb_bcm2837_rpi_3_start + get_runtime_offset();
+   start_raspberry_pi(SZ_128M, __dtb_bcm2835_rpi_start, (void *)r2);
+}
 
-   arm_cpu_lowlevel_init();
+extern char __dtb_bcm2836_rpi_2_start[];
+ENTRY_FUNCTION(start_raspberry_pi2, r0, r1, r2)
+{
+   start_raspberry_pi(SZ_512M, __dtb_bcm2836_rpi_2_start, (void *)r2);
+}
 
-   barebox_arm_entry(BCM2835_SDRAM_BASE, SZ_512M, fdt);
+extern char 

[PATCH v2 3/3] ARM: rpi: save bootargs from VC FDT to vc.bootargs

2019-02-27 Thread Tomaz Solc
When booting a Raspberry Pi, it is useful to extract bootargs from the
device tree that was created by the VideoCore firmware. These bootargs
contain for example settings for the framebuffer that the kernel needs
to properly set the video output.

This commit extracts the bootargs in the board initialization code and
saves them to the vc.bootargs global variable.

For example, a bootloader environment can then add the contents of this
variable to linux.bootargs.vc, which then gets included into the final
bootargs for the kernel using CONFIG_FLEXIBLE_BOOTARGS.
---
 Documentation/boards/bcm2835.rst  |  6 
 arch/arm/boards/raspberry-pi/rpi-common.c | 47 +++
 2 files changed, 53 insertions(+)

diff --git a/Documentation/boards/bcm2835.rst b/Documentation/boards/bcm2835.rst
index 95e910896..e9ad1d4d5 100644
--- a/Documentation/boards/bcm2835.rst
+++ b/Documentation/boards/bcm2835.rst
@@ -34,5 +34,11 @@ VideoCore firmware creates a device tree based on the 
entries in ``config.txt``.
 
 bootm -o /vc.dtb /boot/kernel7.img
 
+VideoCore device tree also contains the kernel command-line that is 
constructed from ``cmdline.txt`` and other parameters internally determined by 
the VideoCore firmware. Normally in Barebox this command-line gets overwritten 
on boot by the Linux bootargs (see :ref:`booting_linux`).
+
+The original command-line from VideoCore device tree is available to the 
Barebox environment in the ``vc.bootargs`` global variable. For example, to 
append it to the Linux bootargs::
+
+global linux.bootargs.vc="$global.vc.bootargs"
+
 .. _Raspberry Pi firmware: 
https://codeload.github.com/raspberrypi/firmware/zip/80e1fbeb78f9df06701d28c0ed3a3060a3f557ef
 .. _documentation for config.txt: 
https://www.raspberrypi.org/documentation/configuration/config-txt/
diff --git a/arch/arm/boards/raspberry-pi/rpi-common.c 
b/arch/arm/boards/raspberry-pi/rpi-common.c
index fffa882a7..9d334cde1 100644
--- a/arch/arm/boards/raspberry-pi/rpi-common.c
+++ b/arch/arm/boards/raspberry-pi/rpi-common.c
@@ -30,6 +30,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -375,11 +376,50 @@ static int rpi_env_init(void)
return 0;
 }
 
+/* Extract /chosen/bootargs from the VideoCore FDT into vc.bootargs
+ * global variable. */
+static int rpi_vc_fdt_bootargs(void *fdt)
+{
+   int ret = 0;
+   struct device_node *root = NULL, *node;
+   const char *cmdline;
+
+   root = of_unflatten_dtb(fdt);
+   if (IS_ERR(root)) {
+   ret = PTR_ERR(root);
+   root = NULL;
+   goto out;
+   }
+
+   node = of_find_node_by_path_from(root, "/chosen");
+   if (!node) {
+   pr_err("no /chosen node\n");
+   ret = -ENOENT;
+   goto out;
+   }
+
+   cmdline = of_get_property(node, "bootargs", NULL);
+   if (!cmdline) {
+   pr_err("no bootargs property in the /chosen node\n");
+   ret = -ENOENT;
+   goto out;
+   }
+
+   globalvar_add_simple("vc.bootargs", cmdline);
+
+out:
+   if (root)
+   of_delete_node(root);
+
+   return ret;
+}
+
 static void rpi_vc_fdt(void)
 {
void *saved_vc_fdt;
struct fdt_header *oftree;
unsigned long magic, size;
+   int ret;
 
/* VideoCore FDT was copied in PBL just above Barebox memory */
saved_vc_fdt = (void *)(arm_mem_endmem_get());
@@ -401,6 +441,13 @@ static void rpi_vc_fdt(void)
pr_err("failed to save videocore fdt to a file\n");
return;
}
+
+   ret = rpi_vc_fdt_bootargs(saved_vc_fdt);
+   if (ret) {
+   pr_err("failed to extract bootargs from videocore fdt: %d\n",
+   ret);
+   return;
+   }
 }
 
 static int rpi_devices_init(void)
-- 
2.11.0


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[PATCH v2 1/3] ARM: start: save end of memory passed to start.

2019-02-27 Thread Tomaz Solc
Knowing the address of the end of the memory area used by Barebox is
useful if PBL stores some extra data after it, so that board init code
can later retrieve it from there.
---
 arch/arm/cpu/start.c   | 8 
 arch/arm/include/asm/barebox-arm.h | 1 +
 2 files changed, 9 insertions(+)

diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 768fa9e1b..6573c2ef7 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -38,6 +38,7 @@
 
 unsigned long arm_stack_top;
 static unsigned long arm_barebox_size;
+static unsigned long arm_endmem;
 static void *barebox_boarddata;
 static unsigned long barebox_boarddata_size;
 
@@ -131,6 +132,12 @@ unsigned long arm_mem_ramoops_get(void)
 }
 EXPORT_SYMBOL_GPL(arm_mem_ramoops_get);
 
+unsigned long arm_mem_endmem_get(void)
+{
+   return arm_endmem;
+}
+EXPORT_SYMBOL_GPL(arm_mem_endmem_get);
+
 static int barebox_memory_areas_init(void)
 {
if(barebox_boarddata)
@@ -163,6 +170,7 @@ __noreturn void barebox_non_pbl_start(unsigned long membase,
 
pr_debug("memory at 0x%08lx, size 0x%08lx\n", membase, memsize);
 
+   arm_endmem = endmem;
arm_stack_top = arm_mem_stack_top(membase, endmem);
arm_barebox_size = barebox_size;
malloc_end = barebox_base;
diff --git a/arch/arm/include/asm/barebox-arm.h 
b/arch/arm/include/asm/barebox-arm.h
index e065b479e..a11d34923 100644
--- a/arch/arm/include/asm/barebox-arm.h
+++ b/arch/arm/include/asm/barebox-arm.h
@@ -86,6 +86,7 @@ static inline void boarddata_create(void *adr, u32 machine)
 u32 barebox_arm_machine(void);
 
 unsigned long arm_mem_ramoops_get(void);
+unsigned long arm_mem_endmem_get(void);
 
 struct barebox_arm_boarddata_compressed_dtb {
 #define BAREBOX_ARM_BOARDDATA_COMPRESSED_DTB_MAGIC 0x7b66bcbd
-- 
2.11.0


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[PATCH v2 0/3] VideoCore FDT interop for Raspberry Pi

2019-02-27 Thread Tomaz Solc
Changes from the first patch series:

 - Drop of_bootargs command in favour of automatically extracting VideoCore
   bootargs to vc.bootargs global in board initialization. Sorry for forgetting
   to update the copyright header in of_bootargs.c. This file is gone now.
 - Replace printf() with pr_err() for printing error messages in rpi-common.c.

Best regards
Tomaz

Tomaz Solc (3):
  ARM: start: save end of memory passed to start.
  ARM: rpi: save fdt that was passed from VideoCore
  ARM: rpi: save bootargs from VC FDT to vc.bootargs

 Documentation/boards/bcm2835.rst  | 10 
 arch/arm/boards/raspberry-pi/lowlevel.c   | 68 ++
 arch/arm/boards/raspberry-pi/lowlevel.h   |  9 
 arch/arm/boards/raspberry-pi/rpi-common.c | 81 +++
 arch/arm/cpu/start.c  |  8 +++
 arch/arm/include/asm/barebox-arm.h|  1 +
 6 files changed, 158 insertions(+), 19 deletions(-)
 create mode 100644 arch/arm/boards/raspberry-pi/lowlevel.h

-- 
2.11.0


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Re: [PATCH 5/7] ARM: imx8mq-zii-ultra: Enable PCIE1 and PCIE2

2019-02-27 Thread Lucas Stach
Am Dienstag, den 26.02.2019, 19:16 -0800 schrieb Andrey Smirnov:
> Enable PCIE1 and PCIE2 used on both Zest and RMB3 boards.
> 
> > Signed-off-by: Andrey Smirnov 
> ---
>  arch/arm/dts/imx8mq-zii-ultra.dtsi | 62 ++
>  1 file changed, 62 insertions(+)
> 
> diff --git a/arch/arm/dts/imx8mq-zii-ultra.dtsi 
> b/arch/arm/dts/imx8mq-zii-ultra.dtsi
> index a6b2b8966..83d57916e 100644
> --- a/arch/arm/dts/imx8mq-zii-ultra.dtsi
> +++ b/arch/arm/dts/imx8mq-zii-ultra.dtsi
> @@ -37,6 +37,18 @@
> >     gpio = < 19 GPIO_ACTIVE_HIGH>;
> >     enable-active-high;
> >     };
> +
> > +   pcie0_refclk: pcie0-refclk {
> > +   compatible = "fixed-clock";
> > +   #clock-cells = <0>;
> > +   clock-frequency = <1>;
> > +   };
> +
> > +   pcie1_refclk: pcie0-refclk {
> > +   compatible = "fixed-clock";
> > +   #clock-cells = <0>;
> > +   clock-frequency = <1>;
> > +   };
>  };
>  
>   {
> @@ -227,6 +239,42 @@
> >     barebox,provide-mac-address = < 0x640>;
>  };
>  
> + {
> > +   pinctrl-names = "default";
> > +   pinctrl-0 = <_pcie0>;
> > +   reset-gpio = < 3 GPIO_ACTIVE_LOW>;
> > +   clocks = < IMX8MQ_CLK_PCIE1_ROOT>,
> > +    < IMX8MQ_CLK_PCIE1_AUX>,
> > +    < IMX8MQ_CLK_PCIE1_PHY>,
> > +    <_refclk>;
> > +   clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
> > +   status = "okay";
> +};
> +
> + {
> > +   pinctrl-names = "default";
> > +   pinctrl-0 = <_pcie1>;
> > +   reset-gpio = < 6 GPIO_ACTIVE_LOW>;
> > +   clocks = < IMX8MQ_CLK_PCIE2_ROOT>,
> > +    < IMX8MQ_CLK_PCIE2_AUX>,
> > +    < IMX8MQ_CLK_PCIE2_PHY>,
> > +    <_refclk>;
> > +   clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
> > +   status = "okay";
> +
> > +   pcie@0,0 {
> + reg = <0x00 0 0 0 0>;

Drop leading zeros from reg properties.

> +
> > +   #address-cells = <3>;
> > +   #size-cells = <2>;
> +
> + /* pcie endpoint 01:00.0 */
> + eth1: intel,i210@pcie0,0 {

Node name with "," seems strange.

> + reg = <0x01 0 0 0 0>;

This should also be 0 in the first cell of the reg. The bus number is
defined by the DT node hierarchy. While this might match with the
current implementation, the PCIe enumeration could decide to start the
PCIe bus numbering from a different base during enumeration, so the
PCIe DT nodes should not have fixed/misleading bus numbers. Actually
they are ignored during matching of the nodes.


> + };
> > +   };
> +};
> +
>   {
> >     pinctrl-names = "default";
> >     pinctrl-0 = <_uart1>;
> @@ -344,6 +392,20 @@
> >     >;
> >     };
>  
> > +   pinctrl_pcie0: pcie0grp {
> > +   fsl,pins = <
> > > + MX8MQ_IOMUXC_UART4_RXD_PCIE1_CLKREQ_B   0x76
> > > + MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3   0x16
> > +   >;
> > +   };
> +
> > +   pinctrl_pcie1: pcie1grp {
> > +   fsl,pins = <
> > > + MX8MQ_IOMUXC_UART4_TXD_PCIE2_CLKREQ_B   0x76
> > > + MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6   0x16
> > +   >;
> > +   };
> +
> >     pinctrl_reg_usdhc2: regusdhc2grpgpio {
> >     fsl,pins = <
> > >   MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41

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Re: [PATCH 7/7] ARM: imx8mq-zii-ultra: Add USB related nodes

2019-02-27 Thread Lucas Stach
Am Dienstag, den 26.02.2019, 19:16 -0800 schrieb Andrey Smirnov:
> Add nodes for exposed USB ports as well as USB hub connected to one of
> them.
> 
> > Signed-off-by: Andrey Smirnov 
> ---
>  arch/arm/dts/imx8mq-zii-ultra-rmb3.dts |  4 +++
>  arch/arm/dts/imx8mq-zii-ultra.dtsi | 34 ++
>  2 files changed, 38 insertions(+)
> 
> diff --git a/arch/arm/dts/imx8mq-zii-ultra-rmb3.dts 
> b/arch/arm/dts/imx8mq-zii-ultra-rmb3.dts
> index b2b3a560b..78280029b 100644
> --- a/arch/arm/dts/imx8mq-zii-ultra-rmb3.dts
> +++ b/arch/arm/dts/imx8mq-zii-ultra-rmb3.dts
> @@ -37,3 +37,7 @@
> >     >;
> >     };
>  };
> +
> +_hub {
> + port-swap=<0x01>;

This is wrong. With the upstream driver/binding this should be:
swap-dx-lanes = <0>;

> +};
> diff --git a/arch/arm/dts/imx8mq-zii-ultra.dtsi 
> b/arch/arm/dts/imx8mq-zii-ultra.dtsi
> index 83d57916e..d46a26d81 100644
> --- a/arch/arm/dts/imx8mq-zii-ultra.dtsi
> +++ b/arch/arm/dts/imx8mq-zii-ultra.dtsi
> @@ -226,6 +226,16 @@
> >     pinctrl-names = "default";
> >     pinctrl-0 = <_i2c3>;
> >     status = "okay";
> +
> > > + usb_hub: usb2513b@2c {
> > +   compatible = "microchip,usb2513b";
> > +   pinctrl-names = "default";
> > +   pinctrl-0 = <_usb2513b>;
> > +   #address-cells=<1>;
> + #size-cells=<1>;

Why the address-cells and size-cells here? I don't see why this is
needed.

Regards,
Lucas

> + reg = <0x2c>;
> > +   reset-gpios = < 25 GPIO_ACTIVE_LOW>;
> > +   };
>  };
>  
>   {
> @@ -312,6 +322,24 @@
> >     };
>  };
>  
> +_dwc3_0 {
> > +   status = "okay";
> > +   dr_mode = "host";
> +};
> +
> +_phy0 {
> > +   status = "okay";
> +};
> +
> +_dwc3_1 {
> > +   status = "okay";
> > +   dr_mode = "host";
> +};
> +
> +_phy1 {
> > +   status = "okay";
> +};
> +
>   {
> >     pinctrl-names = "default", "state_100mhz", "state_200mhz";
> >     pinctrl-0 = <_usdhc1>;
> @@ -426,6 +454,12 @@
> >     >;
> >     };
>  
> > +   pinctrl_usb2513b: usb2513bgrp {
> > +   fsl,pins = <
> > +   MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO250x41
> > +   >;
> > +   };
> +
> >     pinctrl_usdhc1: usdhc1grp {
> >     fsl,pins = <
> > >   MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83

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Re: [PATCH] drivers: Drop dummy_porbe()

2019-02-27 Thread Sascha Hauer
On Wed, Feb 27, 2019 at 10:19:06AM +0100, Uwe Kleine-König wrote:
> $Subject ~= s/porbe/probe/

Yes, I fixed that.

Sascha


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Re: [PATCH] ARM: i.MX6UL: liteSOM: depend on DDR controller settings

2019-02-27 Thread Marcin Niestrój


Sascha Hauer  writes:

> On Tue, Feb 26, 2019 at 02:05:29PM +0100, Marcin Niestroj wrote:
>> Initially we depended on DDR controller settings for liteSOM and liteboard. 
>> With
>> 33fdc89d4cbd ("dts: update to v5.0-rc1") a `device_type = "memory";` property
>> was added to imx6ul-litesom.dtsi file, which causes "ram0" to be added with
>> 512MB size (value in dtsi) instead of the real 256MB size that is configured 
>> in
>> barebox-grinn-liteboard-256mb.img. As a result Linux kernel fails to boot.
>>
>> Lets depend on DDR controller settings, by removing whole `/memory` node from
>> device tree. This makes barebox-grinn-liteboard-256mb.img able to boot Linux
>> kernel once again.
>
> This issue should also be fixed by:
>
> | commit 8a29e7b493c8c2aa57174c9e79c14b93c9807a4b
> | Author: Marco Felsch 
> | Date:   Tue Feb 12 16:10:41 2019 +0100
> |
> | memory: of_fixup: adapt to new memory layout
> |
> | Since kernel 4.16 the memory nodes got a @ suffix so the fixup
> | won't work correctly anymore, because instead of adapting the extisting
> | one the fixup creates a new node and keeps the old (maybe incorrect)
> | node.
> |
> | To be compatible with the old and new layout delete the found memory
> | node and create a new one. The new node follows the new @ style.
> |
> | The patch also renames the node parameter to make it clearer.
> |
> | Signed-off-by: Marco Felsch 
> | Signed-off-by: Sascha Hauer 
>
> I would prefer this patch as it solves the issue for all boards.

We need this patch as well. The problem that I want to solve with
liteboard is configuring memory banks, which is done much earlier. In
current master branch a single memory bank is added from device-tree
(of_probe -> ... -> of_add_memory_bank). In case of liteboard this is
configured to 512MB. Then a imx6_mmdc_add_mem() is executed, which tries
to add 256MB memory bank (in case of barebox-grinn-liteboard-256mb.img).
This fails inside barebox_add_memory_bank(), because we get -EBUSY from
request_iomem_region() there. This makes no problem in Barebox
yet. However, when booting Linux kernel of_memory_fixup() function gets
called. It sets 512MB in fdt once again, which results in boot failure
when jumping into kernel.

I agree, that it is better to solve this kind of issues for all
boards. In order to achieve that we need to either:
1) "overwrite" in imx6_mmdc_add_mem() what we have set in
   of_add_memory_bank(),
2) make sure imx6_mmdc_add_mem() gets called earlier than
   of_add_memory_bank().

--
Regards,
Marcin

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Re: [PATCH] drivers: Drop dummy_porbe()

2019-02-27 Thread Uwe Kleine-König
$Subject ~= s/porbe/probe/

Best regards
Uwe

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[PATCH 4/5] i2c: i.MX: consolidate code

2019-02-27 Thread Sascha Hauer
We have to write to FSL_I2C_I2DR and wait for completion/ack three
times in the code. Instead of open coding it each time create a
helper function for it.

Signed-off-by: Sascha Hauer 
---
 drivers/i2c/busses/i2c-imx.c | 54 ++--
 1 file changed, 21 insertions(+), 33 deletions(-)

diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index 739f5b5cfd..7d7cb88dee 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -455,41 +455,39 @@ static void i2c_fsl_set_clk(struct fsl_i2c_struct 
*i2c_fsl,
 }
 #endif
 
-static int i2c_fsl_write(struct i2c_adapter *adapter, struct i2c_msg *msgs)
+static int i2c_fsl_send(struct i2c_adapter *adapter, uint8_t data)
 {
struct fsl_i2c_struct *i2c_fsl = to_fsl_i2c_struct(adapter);
-   int i, result;
+   int result;
 
-   if ( !(msgs->flags & I2C_M_DATA_ONLY) ) {
-   dev_dbg(>dev,
-   "<%s> write slave address: addr=0x%02x\n",
-   __func__, msgs->addr << 1);
+   dev_dbg(>dev, "<%s> send 0x%02x\n", __func__, data);
 
-   /* write slave address */
-   fsl_i2c_write_reg(msgs->addr << 1, i2c_fsl, FSL_I2C_I2DR);
+   fsl_i2c_write_reg(data, i2c_fsl, FSL_I2C_I2DR);
 
-   result = i2c_fsl_trx_complete(adapter);
-   if (result)
-   return result;
-   result = i2c_fsl_acked(adapter);
+   result = i2c_fsl_trx_complete(adapter);
+   if (result)
+   return result;
+
+   return i2c_fsl_acked(adapter);
+}
+
+static int i2c_fsl_write(struct i2c_adapter *adapter, struct i2c_msg *msgs)
+{
+   int i, result;
+
+   if (!(msgs->flags & I2C_M_DATA_ONLY)) {
+   result = i2c_fsl_send(adapter, msgs->addr << 1);
if (result)
return result;
}
 
/* write data */
for (i = 0; i < msgs->len; i++) {
-   dev_dbg(>dev,
-   "<%s> write byte: B%d=0x%02X\n",
-   __func__, i, msgs->buf[i]);
-   fsl_i2c_write_reg(msgs->buf[i], i2c_fsl, FSL_I2C_I2DR);
-
-   result = i2c_fsl_trx_complete(adapter);
-   if (result)
-   return result;
-   result = i2c_fsl_acked(adapter);
+   result = i2c_fsl_send(adapter, msgs->buf[i]);
if (result)
return result;
}
+
return 0;
 }
 
@@ -503,18 +501,8 @@ static int i2c_fsl_read(struct i2c_adapter *adapter, 
struct i2c_msg *msgs)
fsl_i2c_write_reg(i2c_fsl->hwdata->i2sr_clr_opcode,
  i2c_fsl, FSL_I2C_I2SR);
 
-   if ( !(msgs->flags & I2C_M_DATA_ONLY) ) {
-   dev_dbg(>dev,
-   "<%s> write slave address: addr=0x%02x\n",
-   __func__, (msgs->addr << 1) | 0x01);
-
-   /* write slave address */
-   fsl_i2c_write_reg((msgs->addr << 1) | 0x01, i2c_fsl, 
FSL_I2C_I2DR);
-
-   result = i2c_fsl_trx_complete(adapter);
-   if (result)
-   return result;
-   result = i2c_fsl_acked(adapter);
+   if (!(msgs->flags & I2C_M_DATA_ONLY)) {
+   result = i2c_fsl_send(adapter, (msgs->addr << 1) | 1);
if (result)
return result;
}
-- 
2.20.1


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[PATCH 3/5] i2c: i.MX: Track stopped status in I2CR_MSTA bit

2019-02-27 Thread Sascha Hauer
We can track the stopped status in the I2CR_MSTA bit, no need for an
extra variable. Also we can call i2c_fsl_stop() instead of open coding
it in i2c_fsl_read().

Signed-off-by: Sascha Hauer 
---
 drivers/i2c/busses/i2c-imx.c | 43 +---
 1 file changed, 15 insertions(+), 28 deletions(-)

diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index 74f080dfc9..739f5b5cfd 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -168,7 +168,6 @@ struct fsl_i2c_struct {
struct clk  *clk;
struct i2c_adapter  adapter;
unsigned intdisable_delay;
-   int stopped;
unsigned intifdr;   /* FSL_I2C_IFDR */
unsigned intdfsrr;  /* FSL_I2C_DFSRR */
struct i2c_bus_recovery_info rinfo;
@@ -322,8 +321,6 @@ static int i2c_fsl_start(struct i2c_adapter *adapter)
return -EAGAIN;
}
 
-   i2c_fsl->stopped = 0;
-
temp |= I2CR_MTX | I2CR_TXAK;
fsl_i2c_write_reg(temp, i2c_fsl, FSL_I2C_I2CR);
 
@@ -335,16 +332,20 @@ static void i2c_fsl_stop(struct i2c_adapter *adapter)
struct fsl_i2c_struct *i2c_fsl = to_fsl_i2c_struct(adapter);
unsigned int temp = 0;
 
-   if (!i2c_fsl->stopped) {
-   /* Stop I2C transaction */
-   temp = fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2CR);
-   temp &= ~(I2CR_MSTA | I2CR_MTX);
-   fsl_i2c_write_reg(temp, i2c_fsl, FSL_I2C_I2CR);
-   /* wait for the stop condition to be send, otherwise the i2c
-* controller is disabled before the STOP is sent completely */
-   i2c_fsl_bus_busy(adapter, 0);
-   i2c_fsl->stopped = 1;
-   }
+   /* Stop I2C transaction */
+   temp = fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2CR);
+   if (!(temp & I2CR_MSTA))
+   return;
+
+   temp &= ~(I2CR_MSTA | I2CR_MTX);
+   fsl_i2c_write_reg(temp, i2c_fsl, FSL_I2C_I2CR);
+   /* wait for the stop condition to be send, otherwise the i2c
+* controller is disabled before the STOP is sent completely */
+
+   /* adding this delay helps on low bitrates */
+   udelay(i2c_fsl->disable_delay);
+
+   i2c_fsl_bus_busy(adapter, 0);
 }
 
 #ifdef CONFIG_PPC
@@ -534,21 +535,7 @@ static int i2c_fsl_read(struct i2c_adapter *adapter, 
struct i2c_msg *msgs)
return result;
 
if (i == (msgs->len - 1)) {
-   /*
-* It must generate STOP before read I2DR to prevent
-* controller from generating another clock cycle
-*/
-   temp = fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2CR);
-   temp &= ~(I2CR_MSTA | I2CR_MTX);
-   fsl_i2c_write_reg(temp, i2c_fsl, FSL_I2C_I2CR);
-
-   /*
-* adding this delay helps on low bitrates
-*/
-   udelay(i2c_fsl->disable_delay);
-
-   i2c_fsl_bus_busy(adapter, 0);
-   i2c_fsl->stopped = 1;
+   i2c_fsl_stop(adapter);
} else if (i == (msgs->len - 2)) {
temp = fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2CR);
temp |= I2CR_TXAK;
-- 
2.20.1


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[PATCH 0/5] i2c: i.MX driver some cleanup

2019-02-27 Thread Sascha Hauer
Some small improvements for the i.MX I2C driver.

Sascha Hauer (5):
  i2c: i.MX: Do not call i2c_fsl_bus_busy twice
  i2c: i.MX: move disabling of controller out of i2c_fsl_stop
  i2c: i.MX: Track stopped status in I2CR_MSTA bit
  i2c: i.MX: consolidate code
  i2c: i.MX: fix variable name

 drivers/i2c/busses/i2c-imx.c | 121 +--
 1 file changed, 46 insertions(+), 75 deletions(-)

-- 
2.20.1


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[PATCH 1/5] i2c: i.MX: Do not call i2c_fsl_bus_busy twice

2019-02-27 Thread Sascha Hauer
In i2c_fsl_stop() we call i2c_fsl_bus_busy() a second time when it
fails. If it fails once it won't succeed the second time, so drop
the second call.

Signed-off-by: Sascha Hauer 
---
 drivers/i2c/busses/i2c-imx.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index 67937da73a..72d9fe5845 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -342,10 +342,6 @@ static void i2c_fsl_stop(struct i2c_adapter *adapter)
fsl_i2c_write_reg(temp, i2c_fsl, FSL_I2C_I2CR);
/* wait for the stop condition to be send, otherwise the i2c
 * controller is disabled before the STOP is sent completely */
-   i2c_fsl->stopped = i2c_fsl_bus_busy(adapter, 0) ? 0 : 1;
-   }
-
-   if (!i2c_fsl->stopped) {
i2c_fsl_bus_busy(adapter, 0);
i2c_fsl->stopped = 1;
}
-- 
2.20.1


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[PATCH 2/5] i2c: i.MX: move disabling of controller out of i2c_fsl_stop

2019-02-27 Thread Sascha Hauer
Move disabling of the controller out of i2c_fsl_stop(). This makes the
function reusable in other places in the next patch.

Signed-off-by: Sascha Hauer 
---
 drivers/i2c/busses/i2c-imx.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index 72d9fe5845..74f080dfc9 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -345,10 +345,6 @@ static void i2c_fsl_stop(struct i2c_adapter *adapter)
i2c_fsl_bus_busy(adapter, 0);
i2c_fsl->stopped = 1;
}
-
-   /* Disable I2C controller, and force our state to stopped */
-   temp = i2c_fsl->hwdata->i2cr_ien_opcode ^ I2CR_IEN,
-   fsl_i2c_write_reg(temp, i2c_fsl, FSL_I2C_I2CR);
 }
 
 #ifdef CONFIG_PPC
@@ -609,6 +605,10 @@ fail0:
/* Stop I2C transfer */
i2c_fsl_stop(adapter);
 
+   /* Disable I2C controller, and force our state to stopped */
+   temp = i2c_fsl->hwdata->i2cr_ien_opcode ^ I2CR_IEN,
+   fsl_i2c_write_reg(temp, i2c_fsl, FSL_I2C_I2CR);
+
return (result < 0) ? result : num;
 }
 
-- 
2.20.1


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[PATCH 5/5] i2c: i.MX: fix variable name

2019-02-27 Thread Sascha Hauer
i2c_fsl_write() and i2c_fsl_read() take exactly one i2c message, not
multiple ones, hence rename the variable from "msgs" to "msg".

Signed-off-by: Sascha Hauer 
---
 drivers/i2c/busses/i2c-imx.c | 28 ++--
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index 7d7cb88dee..f5fc65b06e 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -471,19 +471,19 @@ static int i2c_fsl_send(struct i2c_adapter *adapter, 
uint8_t data)
return i2c_fsl_acked(adapter);
 }
 
-static int i2c_fsl_write(struct i2c_adapter *adapter, struct i2c_msg *msgs)
+static int i2c_fsl_write(struct i2c_adapter *adapter, struct i2c_msg *msg)
 {
int i, result;
 
-   if (!(msgs->flags & I2C_M_DATA_ONLY)) {
-   result = i2c_fsl_send(adapter, msgs->addr << 1);
+   if (!(msg->flags & I2C_M_DATA_ONLY)) {
+   result = i2c_fsl_send(adapter, msg->addr << 1);
if (result)
return result;
}
 
/* write data */
-   for (i = 0; i < msgs->len; i++) {
-   result = i2c_fsl_send(adapter, msgs->buf[i]);
+   for (i = 0; i < msg->len; i++) {
+   result = i2c_fsl_send(adapter, msg->buf[i]);
if (result)
return result;
}
@@ -491,7 +491,7 @@ static int i2c_fsl_write(struct i2c_adapter *adapter, 
struct i2c_msg *msgs)
return 0;
 }
 
-static int i2c_fsl_read(struct i2c_adapter *adapter, struct i2c_msg *msgs)
+static int i2c_fsl_read(struct i2c_adapter *adapter, struct i2c_msg *msg)
 {
struct fsl_i2c_struct *i2c_fsl = to_fsl_i2c_struct(adapter);
int i, result;
@@ -501,8 +501,8 @@ static int i2c_fsl_read(struct i2c_adapter *adapter, struct 
i2c_msg *msgs)
fsl_i2c_write_reg(i2c_fsl->hwdata->i2sr_clr_opcode,
  i2c_fsl, FSL_I2C_I2SR);
 
-   if (!(msgs->flags & I2C_M_DATA_ONLY)) {
-   result = i2c_fsl_send(adapter, (msgs->addr << 1) | 1);
+   if (!(msg->flags & I2C_M_DATA_ONLY)) {
+   result = i2c_fsl_send(adapter, (msg->addr << 1) | 1);
if (result)
return result;
}
@@ -510,29 +510,29 @@ static int i2c_fsl_read(struct i2c_adapter *adapter, 
struct i2c_msg *msgs)
/* setup bus to read data */
temp = fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2CR);
temp &= ~I2CR_MTX;
-   if (msgs->len - 1)
+   if (msg->len - 1)
temp &= ~I2CR_TXAK;
fsl_i2c_write_reg(temp, i2c_fsl, FSL_I2C_I2CR);
 
fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2DR); /* dummy read */
 
/* read data */
-   for (i = 0; i < msgs->len; i++) {
+   for (i = 0; i < msg->len; i++) {
result = i2c_fsl_trx_complete(adapter);
if (result)
return result;
 
-   if (i == (msgs->len - 1)) {
+   if (i == (msg->len - 1)) {
i2c_fsl_stop(adapter);
-   } else if (i == (msgs->len - 2)) {
+   } else if (i == (msg->len - 2)) {
temp = fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2CR);
temp |= I2CR_TXAK;
fsl_i2c_write_reg(temp, i2c_fsl, FSL_I2C_I2CR);
}
-   msgs->buf[i] = fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2DR);
+   msg->buf[i] = fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2DR);
 
dev_dbg(>dev, "<%s> read byte: B%d=0x%02X\n",
-   __func__, i, msgs->buf[i]);
+   __func__, i, msg->buf[i]);
}
return 0;
 }
-- 
2.20.1


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