[PATCH 1/2] reset: add simple reset controller support
Incoming STM32 MCU support will leverage this driver, so port it over from Linux v5.16. Signed-off-by: Ahmad Fatoum --- drivers/reset/Kconfig | 17 +++ drivers/reset/Makefile | 1 + drivers/reset/reset-simple.c | 189 + include/linux/reset/reset-simple.h | 45 +++ 4 files changed, 252 insertions(+) create mode 100644 drivers/reset/reset-simple.c create mode 100644 include/linux/reset/reset-simple.h diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 6c70c1026998..82c85162533d 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -15,6 +15,23 @@ menuconfig RESET_CONTROLLER if RESET_CONTROLLER +config RESET_SIMPLE + bool "Simple Reset Controller Driver" if COMPILE_TEST + help + This enables a simple reset controller driver for reset lines that + that can be asserted and deasserted by toggling bits in a contiguous, + exclusive register space. + + Currently this driver supports: + - Altera 64-Bit SoCFPGAs + - ASPEED BMC SoCs + - Bitmain BM1880 SoC + - Realtek SoCs + - RCC reset controller in STM32 MCUs + - Allwinner SoCs + - SiFive FU740 SoCs + + config RESET_IMX7 bool "i.MX7 Reset Driver" default ARCH_IMX7 diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index d884a83aa3f7..b4270411fdaf 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_RESET_CONTROLLER) += core.o +obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o obj-$(CONFIG_RESET_IMX7) += reset-imx7.o obj-$(CONFIG_RESET_STM32) += reset-stm32.o diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c new file mode 100644 index ..082956d94dae --- /dev/null +++ b/drivers/reset/reset-simple.c @@ -0,0 +1,189 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Simple Reset Controller Driver + * + * Copyright (C) 2017 Pengutronix, Philipp Zabel + * + * Based on Allwinner SoCs Reset Controller driver + * + * Copyright 2013 Maxime Ripard + * + * Maxime Ripard + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +static inline struct reset_simple_data * +to_reset_simple_data(struct reset_controller_dev *rcdev) +{ + return container_of(rcdev, struct reset_simple_data, rcdev); +} + +static int reset_simple_update(struct reset_controller_dev *rcdev, + unsigned long id, bool assert) +{ + struct reset_simple_data *data = to_reset_simple_data(rcdev); + int reg_width = sizeof(u32); + int bank = id / (reg_width * BITS_PER_BYTE); + int offset = id % (reg_width * BITS_PER_BYTE); + u32 reg; + + reg = readl(data->membase + (bank * reg_width)); + if (assert ^ data->active_low) + reg |= BIT(offset); + else + reg &= ~BIT(offset); + writel(reg, data->membase + (bank * reg_width)); + + return 0; +} + +static int reset_simple_assert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + return reset_simple_update(rcdev, id, true); +} + +static int reset_simple_deassert(struct reset_controller_dev *rcdev, +unsigned long id) +{ + return reset_simple_update(rcdev, id, false); +} + +static int reset_simple_reset(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct reset_simple_data *data = to_reset_simple_data(rcdev); + int ret; + + if (!data->reset_us) + return -ENOTSUPP; + + ret = reset_simple_assert(rcdev, id); + if (ret) + return ret; + + udelay(data->reset_us); + + return reset_simple_deassert(rcdev, id); +} + +static int __maybe_unused reset_simple_status(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct reset_simple_data *data = to_reset_simple_data(rcdev); + int reg_width = sizeof(u32); + int bank = id / (reg_width * BITS_PER_BYTE); + int offset = id % (reg_width * BITS_PER_BYTE); + u32 reg; + + reg = readl(data->membase + (bank * reg_width)); + + return !(reg & BIT(offset)) ^ !data->status_active_low; +} + +const struct reset_control_ops reset_simple_ops = { + .assert = reset_simple_assert, + .deassert = reset_simple_deassert, + .reset = reset_simple_reset, +}; +EXPORT_SYMBOL_GPL(reset_simple_ops); + +/** + * struct reset_simple_devdata - simple reset controller properties + * @reg_offset: offset between base address and first reset register. + * @nr_resets: number of resets. If not set, default to resource size in bits. + * @active_low: if true, bits are cleared to assert the reset.
[PATCH] include: : implement WARN_ON_ONCE
We have WARN_ON and WARN_ONCE. Add WARN_ON_ONCE as well to accommodate Linux driver code using it. Signed-off-by: Ahmad Fatoum --- include/asm-generic/bug.h | 12 1 file changed, 12 insertions(+) diff --git a/include/asm-generic/bug.h b/include/asm-generic/bug.h index f20e1b4d65ac..5d0a458eae74 100644 --- a/include/asm-generic/bug.h +++ b/include/asm-generic/bug.h @@ -50,4 +50,16 @@ } \ unlikely(__ret_warn_once); \ }) + +#define WARN_ON_ONCE(condition) ({ \ + static int __warned;\ + int __ret_warn_once = !!(condition);\ + \ + if (unlikely(__ret_warn_once && !__warned)) { \ + __warned = 1; \ + __WARN(); \ + } \ + unlikely(__ret_warn_once); \ +}) + #endif -- 2.30.2 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 2/2] reset: stm32: drop STM32 MCU support in favor of simple reset driver
RCC reset will eventually get more involved when we add SCMI support. Linux already has reset and clock control in the same driver. As we now have a simple driver that can toggle resets on the STM32 MCUs as well, we can drop the now duplicate support from the dedicated STM32 reset driver. Signed-off-by: Ahmad Fatoum --- drivers/reset/Kconfig | 2 +- drivers/reset/reset-stm32.c | 15 +-- 2 files changed, 2 insertions(+), 15 deletions(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 82c85162533d..b12159094d88 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -43,7 +43,7 @@ config RESET_STM32 bool "STM32 Reset Driver" depends on ARCH_STM32MP || COMPILE_TEST help - This enables the reset controller driver for STM32MP and STM32 MCUs. + This enables the reset controller driver for STM32MP1. config RESET_STARFIVE bool "StarFive Controller Driver" if COMPILE_TEST diff --git a/drivers/reset/reset-stm32.c b/drivers/reset/reset-stm32.c index 703ba1f072c5..186b2a8bc654 100644 --- a/drivers/reset/reset-stm32.c +++ b/drivers/reset/reset-stm32.c @@ -66,14 +66,6 @@ static void stm32mp_reset(void __iomem *reg, unsigned offset, bool assert) writel(BIT(offset), reg); } -static void stm32mcu_reset(void __iomem *reg, unsigned offset, bool assert) -{ - if (assert) - setbits_le32(reg, BIT(offset)); - else - clrbits_le32(reg, BIT(offset)); -} - static u32 stm32_reset_status(struct stm32_reset *priv, unsigned long bank) { return readl(priv->base + bank); @@ -195,18 +187,13 @@ static const struct stm32_reset_ops stm32mp1_reset_ops = { .reset_reasons = stm32mp_reset_reasons, }; -static const struct stm32_reset_ops stm32mcu_reset_ops = { - .reset = stm32mcu_reset, -}; - static const struct of_device_id stm32_rcc_reset_dt_ids[] = { { .compatible = "st,stm32mp1-rcc", .data = _reset_ops }, - { .compatible = "st,stm32-rcc", .data = _reset_ops }, { /* sentinel */ }, }; static struct driver_d stm32_rcc_reset_driver = { - .name = "stm32_rcc_reset", + .name = "stm32mp_rcc_reset", .probe = stm32_reset_probe, .of_compatible = DRV_OF_COMPAT(stm32_rcc_reset_dt_ids), }; -- 2.30.2 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
RFC: Gitlab CI for barebox
Hi! I have made simple Gitlab CI for barebox. Gitlab CI runner setup instruction and the source for Debian 11 docker image can be found at: https://gitlab.com/frantony/barebox-gitlab-ci-runner Sample gitlab-ci.yaml config file: https://gitlab.com/frantony/barebox/-/commit/b1ed597d8e67c8f76f4f98cd1c6605b936cf2471 Corresponding gitlab pipeline results: https://gitlab.com/frantony/barebox/-/pipelines/459422690 Some notes: * there are several "images size > maximum size" errors during 'build ARM' * fake firmware blobs for ARM are used * 'build doc' produces sphinx generated html docs archive artifact * 'build ARM/MIPS/RISC-V/X86/sandbox' produce log/ directory archive artifacts * no support for kvx, openrisc and powerpc @Ahmad I suppose we can add your qemu barebox/test/emulate.pl tests into CI. -- Best regards, Antony Pavlov ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH] pinctrl: rockchip: drop unused variable 'name'
Signed-off-by: Antony Pavlov --- drivers/pinctrl/pinctrl-rockchip.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index 869cce1982..c99074407f 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -877,7 +877,6 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data( struct device_node *np; struct rockchip_pin_ctrl *ctrl; struct rockchip_pin_bank *bank; - char *name; int grf_offs, pmu_offs, drv_grf_offs, drv_pmu_offs, i, j; int gpio = 0; -- 2.33.0 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox