Re: [PATCH 1/2] clk: imx27: add nand clock

2024-04-16 Thread Sascha Hauer


On Tue, 16 Apr 2024 08:31:25 +0200, Sascha Hauer wrote:
> The NAND clock is currently missing. The NAND driver doesn't use it
> currently, but will be using it later once we update the driver. Add
> this missing clock.
> 
> 

Applied, thanks!

[1/2] clk: imx27: add nand clock
  https://git.pengutronix.de/cgit/barebox/commit/?id=c817f57bd873 (link may 
not be stable)
[2/2] clk: imx27: add watchdog clock
  https://git.pengutronix.de/cgit/barebox/commit/?id=f40319c8e157 (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH 1/4] DNM: dts: arm64: rockchip: copy pf5 device tree from mainline Linux

2024-04-16 Thread Sascha Hauer
On Fri, Apr 12, 2024 at 03:33:00PM +0200, Ahmad Fatoum wrote:
> Hi,
> 
> On 12.04.24 15:02, Michael Riesch wrote:
> > Hi Marco,
> > 
> > Thanks for your response!
> > 
> > On 4/5/24 19:02, Marco Felsch wrote:
> >> Hi Michael,
> >>
> >> thanks for your patches.
> >>
> >>> DNM: dts: arm64: rockchip: copy pf5 device tree from
> >>
> >> I suppose DNM means "do not merge", instead of marking it this way we
> >> put the not yet upstream Linux dts files into arch as well but mark them
> >> as upstream dts file, e.g.:
> >>
> >>   - arch/arm/dts/imx8mm-innocomm-wb15-evk-upstream.dts
> >>   - arch/arm/dts/imx8mp-debix-model-a-upstream.dts
> >>   - arch/arm/dts/imx8mp-debix-som-a-bmb-08-upstream.dts
> >>   - arch/arm/dts/imx8mp-debix-som-a-upstream.dtsi
> 
> I have been wondering if we should add yet another device tree
> directory for kernel DTs that are not yet in the kernel, e.g.
> common/boards/dts. Then we can place full DTs there, remove them
> once they are in dts/ and clean up arch/$ARCH/dts/ that way.
> 
> > OK, I'll do it that way!
> > 
> >> Once the files are usptream we can remove them.
> > 
> > Is this something I should keep in mind or may I expect that this
> > happens automagically?
> 
> Usually, when someone notices. Having them in a single directory
> as suggested above may make it easier to sport no longer needed DTs.
> 
> Thoughts?

+1

Sascha

-- 
Pengutronix e.K.   | |
Steuerwalder Str. 21   | http://www.pengutronix.de/  |
31137 Hildesheim, Germany  | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686   | Fax:   +49-5121-206917- |



Re: [PATCH v2] of: do not copy properties if they already exist in the destination

2024-04-16 Thread Sascha Hauer


On Mon, 15 Apr 2024 14:26:04 +0200, Jonas Richardsen wrote:
> Currently `of_copy_property` copies the given property even if a property
> with the same name already exists on the destination node.
> This leads to kernel warnings about duplicate properties:
> ```
> [0.014063] Duplicate name in chosen, renamed to "stdout-path#1"
> [0.014093] Duplicate name in chosen, renamed to "bootargs#1"
> [0.014119] Duplicate name in chosen, renamed to "phandle#1"
> [0.014197] Duplicate name in reserved-memory, renamed to 
> "#address-cells#1"
> [0.014226] Duplicate name in reserved-memory, renamed to "#size-cells#1"
> [0.014252] Duplicate name in reserved-memory, renamed to "ranges#1"
> [0.014278] Duplicate name in reserved-memory, renamed to "phandle#1"
> ```
> Therefore, the function was changed to return an error if the property
> already exists in the destination.
> The change does not cause any regressions, because the only usage of
> this function occurs within `arch/arm/boards/raspberry-pi/rpi-common.c`
> where the original behaviour of the function is obviously unintended.
> 
> [...]

Applied, thanks!

[1/1] of: do not copy properties if they already exist in the destination
  https://git.pengutronix.de/cgit/barebox/commit/?id=364a1831678d (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH v2] gpio: Add Intel gpio controller support

2024-04-16 Thread Sascha Hauer


On Wed, 10 Apr 2024 18:34:46 +0200, Tomas Marek wrote:
> 


Applied, thanks!

[1/1] gpio: Add Intel gpio controller support
  https://git.pengutronix.de/cgit/barebox/commit/?id=e476edd5322f (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH] scripts: config: add script to manipulate .config files on the command line

2024-04-16 Thread Sascha Hauer


On Wed, 10 Apr 2024 14:26:45 +0200, Ahmad Fatoum wrote:
> This ports over the Linux v6.9-rc3 state of the config script, which
> allows easy enabling and disabling of options from the command line, e.g.:
> 
>   scripts/config --file build/.config -d CONFIG_WERROR
> 
> By having the script in the barebox scripts directory, it's available
> for use by build systems instead of running sed over the .config file.
> 
> [...]

Applied, thanks!

[1/1] scripts: config: add script to manipulate .config files on the command 
line
  https://git.pengutronix.de/cgit/barebox/commit/?id=e77ccb480a8c (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH v2 0/4] arm: boards: add wolfvision pf5 mainboard

2024-04-16 Thread Sascha Hauer


On Fri, 12 Apr 2024 15:32:11 +0200, Michael Riesch wrote:
> Habidere,
> 
> This series adds support for the WolfVision PF5 mainboard, which serves
> as base for recent WolfVision products. It features the Rockchip RK3568
> and can be extended with several different extension boards. The
> WolfVision PF5 IO Expander is one example of such an extension board.
> Support for this extension is also included in this series.
> 
> [...]

Applied, thanks!

[1/4] arm: dts: copy pf5 device tree from mainline linux
  https://git.pengutronix.de/cgit/barebox/commit/?id=50b1eceef4eb (link may 
not be stable)
[2/4] arm: dts: add common state for wolfvision boards
  https://git.pengutronix.de/cgit/barebox/commit/?id=fdfa97893c38 (link may 
not be stable)
[3/4] common: add wolfvision board code library
  https://git.pengutronix.de/cgit/barebox/commit/?id=5f20e518aad1 (link may 
not be stable)
[4/4] arm: boards: add wolfvision pf5 mainboard
  https://git.pengutronix.de/cgit/barebox/commit/?id=69bfc54d6eb0 (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH] ARM64: let 'end' point after the range in cache functions

2024-04-16 Thread Enrico Scholz
Sascha Hauer  writes:

> So 129 bytes are sent from barebox, right? Which network driver driver
> is involved on the barebox side here? How did you force sending excatly
> 129 bytes?

drivers/net/bcmgenet.c;  I made a

diff --git a/drivers/net/bcmgenet.c b/drivers/net/bcmgenet.c
index 9e0bacb31adf..988324cd22d4 100644
--- a/drivers/net/bcmgenet.c
+++ b/drivers/net/bcmgenet.c
@@ -272,6 +272,10 @@ static int bcmgenet_gmac_eth_send(struct eth_device *edev, 
void *packet, int len
u32 tries = 100;
dma_addr_t dma;
 
+   if (length == 129)
+   print_hex_dump(KERN_INFO, "D ", DUMP_PREFIX_OFFSET,
+  16, 4, packet + 125, 4, 1);
+
prod_index = readl(priv->mac_reg + TDMA_PROD_INDEX);
 
dma = dma_map_single(priv->dev, packet, length, DMA_TO_DEVICE);


there to verify the input data and checked with tcpdump on the other end
(which differed in around 70% of the cases in the last byte).

Packets with arbitrary length can be constructed easily by custom tftp
filenames.



Enrico



Re: [PATCH] ARM64: let 'end' point after the range in cache functions

2024-04-16 Thread Sascha Hauer
Hi Enrico,

On Fri, Apr 12, 2024 at 06:28:35PM +0200, Enrico Scholz wrote:
> From: Enrico Scholz 
> 
> v8_flush_dcache_range() and v8_inv_dcache_range() are implemented
> under the assumption that their 'end' parameter points *after* the
> range.
> 
> Fix callers to use it in this way.
> 
> This fixes e.g. spurious corruptions in the last octet when sending
> 129 bytes over ethernet.

So 129 bytes are sent from barebox, right? Which network driver driver
is involved on the barebox side here? How did you force sending excatly
129 bytes?

I am asking because I want to look if there are other bugs invlolved
here.

Sascha

> 
> Signed-off-by: Enrico Scholz 
> ---
>  arch/arm/cpu/dma_64.c | 2 +-
>  arch/arm/cpu/mmu_64.c | 4 ++--
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/cpu/dma_64.c b/arch/arm/cpu/dma_64.c
> index 74d7167860c2..b50572f5e601 100644
> --- a/arch/arm/cpu/dma_64.c
> +++ b/arch/arm/cpu/dma_64.c
> @@ -6,7 +6,7 @@ void arch_sync_dma_for_device(void *vaddr, size_t size,
>enum dma_data_direction dir)
>  {
>   unsigned long start = (unsigned long)vaddr;
> - unsigned long end = start + size - 1;
> + unsigned long end = start + size;
>  
>   if (dir == DMA_FROM_DEVICE)
>   v8_inv_dcache_range(start, end);
> diff --git a/arch/arm/cpu/mmu_64.c b/arch/arm/cpu/mmu_64.c
> index 12cd644de0c7..b48e4732b86d 100644
> --- a/arch/arm/cpu/mmu_64.c
> +++ b/arch/arm/cpu/mmu_64.c
> @@ -282,7 +282,7 @@ void mmu_disable(void)
>  void dma_inv_range(void *ptr, size_t size)
>  {
>   unsigned long start = (unsigned long)ptr;
> - unsigned long end = start + size - 1;
> + unsigned long end = start + size;
>  
>   v8_inv_dcache_range(start, end);
>  }
> @@ -290,7 +290,7 @@ void dma_inv_range(void *ptr, size_t size)
>  void dma_flush_range(void *ptr, size_t size)
>  {
>   unsigned long start = (unsigned long)ptr;
> - unsigned long end = start + size - 1;
> + unsigned long end = start + size;
>  
>   v8_flush_dcache_range(start, end);
>  }
> -- 
> 2.44.0
> 
> 
> 

-- 
Pengutronix e.K.   | |
Steuerwalder Str. 21   | http://www.pengutronix.de/  |
31137 Hildesheim, Germany  | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686   | Fax:   +49-5121-206917- |



Re: [PATCH] ARM64: let 'end' point after the range in cache functions

2024-04-16 Thread Sascha Hauer


On Fri, 12 Apr 2024 18:28:35 +0200, Enrico Scholz wrote:
> v8_flush_dcache_range() and v8_inv_dcache_range() are implemented
> under the assumption that their 'end' parameter points *after* the
> range.
> 
> Fix callers to use it in this way.
> 
> This fixes e.g. spurious corruptions in the last octet when sending
> 129 bytes over ethernet.
> 
> [...]

Applied, thanks!

[1/1] ARM64: let 'end' point after the range in cache functions
  https://git.pengutronix.de/cgit/barebox/commit/?id=65ef5d885263 (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH] of: do not acccess 'prop->value' directly

2024-04-16 Thread Sascha Hauer


On Fri, 12 Apr 2024 18:29:25 +0200, Enrico Scholz wrote:
> Use of_property_get_value() accessor.  Else, wrong results are
> returned when working with fit images.
> 
> 

Applied, thanks!

[1/1] of: do not acccess 'prop->value' directly
  https://git.pengutronix.de/cgit/barebox/commit/?id=7b7ab4a37d25 (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH master] mci: core: don't fail MMC probe if HS200 isn't supported in HW

2024-04-16 Thread Sascha Hauer


On Mon, 15 Apr 2024 07:27:34 +0200, Ahmad Fatoum wrote:
> A MMC may support HS200 in theory, but it's unusable due to I/O
> voltage. Unlike Linux, barebox doesn't check the I/O voltage, so it
> will attempt enabling HS200 and get told no by the card.
> 
> This no currently triggered a failure of the probe:
> 
>   mmc1: detected MMC card version 5.0
>   ERROR: mmc1: mmc_select_hs200 failed, error -5
>   WARNING: mmc1: Card's startup fails with -5
>   Cannot set parameter mmc1.probe: I/O error
> 
> [...]

Applied, thanks!

[1/1] mci: core: don't fail MMC probe if HS200 isn't supported in HW
  https://git.pengutronix.de/cgit/barebox/commit/?id=75d6a1ce692d (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH 1/3] ARM: Rockchip: bbu: rename rk3568_bbu_mmc_register to rockchip_*

2024-04-16 Thread Sascha Hauer


On Mon, 15 Apr 2024 07:28:13 +0200, Ahmad Fatoum wrote:
> The update handler isn't restricted to the RK3568, but is also usable
> for other RKNS SoCs. With minor modification, it is also usable for the
> RK3399 and perhaps even older SoCs, so let's rename it to
> rockchip_bbu_mmc_handler instead. We can always do SoC-type checks
> inside to handle differences.
> 
> 
> [...]

Applied, thanks!

[1/3] ARM: Rockchip: bbu: rename rk3568_bbu_mmc_register to rockchip_*
  https://git.pengutronix.de/cgit/barebox/commit/?id=66e0e8536986 (link may 
not be stable)
[2/3] ARM: Rockchip: bbu: output unallocated space size on error
  https://git.pengutronix.de/cgit/barebox/commit/?id=702504f04c78 (link may 
not be stable)
[3/3] ARM: Rockchip: bbu: allow forcing barebox update handler despite size
  https://git.pengutronix.de/cgit/barebox/commit/?id=30558b84d1bb (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH] gpiolib: implement gpiod_slice_acquired

2024-04-16 Thread Sascha Hauer


On Mon, 15 Apr 2024 07:28:50 +0200, Ahmad Fatoum wrote:
> For use by poller code that makes use of GPIO descriptors instead of the
> unstable indices, add a gpiod variant of the existing
> gpiod_slice_acquird.
> 
> 

Applied, thanks!

[1/1] gpiolib: implement gpiod_slice_acquired
  https://git.pengutronix.de/cgit/barebox/commit/?id=fcc51585350b (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH master] partitions: efi: fix NULL dereference on corrupted GPT

2024-04-16 Thread Sascha Hauer


On Mon, 15 Apr 2024 07:31:20 +0200, Ahmad Fatoum wrote:
> When processing a corrupted GPT, the initial magic check may succeed,
> but later partition parsing may terminate unsuccessfully. In such case,
> we returned an invalid pointer that happened to be NULL, but didn't do
> much about it leading to a NULL pointer dereference.
> 
> Fix this by explicitly returning NULL and correctly propagating it.
> 
> [...]

Applied, thanks!

[1/1] partitions: efi: fix NULL dereference on corrupted GPT
  https://git.pengutronix.de/cgit/barebox/commit/?id=7358ef660dc4 (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH master] soc: rockchip: io-domain: handle missing supply correctly

2024-04-16 Thread Sascha Hauer


On Mon, 15 Apr 2024 07:31:30 +0200, Ahmad Fatoum wrote:
> The original Linux code calls regulator_get_optional and handles its
> -ENODEV return code, which morphed into regulator_get when ported to
> barebox. The error handling stayed as-is leading to causing supplies to
> trigger errors instead of being silently ignored.
> 
> As we use NULL to describe the dummy regulator in barebox, we can add a
> trivial regulator_get_optional implementation and use it to fix the
> I/O domain driver.
> 
> [...]

Applied, thanks!

[1/1] soc: rockchip: io-domain: handle missing supply correctly
  https://git.pengutronix.de/cgit/barebox/commit/?id=284a876cee1f (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH master] gpio: rockchip: fix support for RK3588/RK3566

2024-04-16 Thread Sascha Hauer


On Mon, 15 Apr 2024 07:31:37 +0200, Ahmad Fatoum wrote:
> The GPIO controller on newer Rockchip SoCs isn't compatible with the
> older ones. Back when GPIOv2 support was added, RK3568 was the only
> SoC supported using it, but since then support for the very similar
> RK3566 as well as the newer RK3588 has followed, but the driver wasn't
> extended to support them.
> 
> As GPIOv2 controllers have an identification register, start checking it
> like Linux does and use that to detect whether we have a GPIOv2 or GPIOv1.
> 
> [...]

Applied, thanks!

[1/1] gpio: rockchip: fix support for RK3588/RK3566
  https://git.pengutronix.de/cgit/barebox/commit/?id=ff8547d924aa (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH] clk: rk3568: sync PLL rates with Linux

2024-04-16 Thread Sascha Hauer


On Mon, 15 Apr 2024 07:31:54 +0200, Ahmad Fatoum wrote:
> The Linux driver has gained additional PLL rates since we last
> synchronized. Add their parameters to barebox as well.
> 
> 

Applied, thanks!

[1/1] clk: rk3568: sync PLL rates with Linux
  https://git.pengutronix.de/cgit/barebox/commit/?id=f382eedfb4f4 (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH] ARM: dts: rockchip: drop unreferenced rockchip-pinconf.dtsi

2024-04-16 Thread Sascha Hauer


On Mon, 15 Apr 2024 07:32:12 +0200, Ahmad Fatoum wrote:
> This file is no longer used in barebox and existing drivers instead use
> the upstream variant. Therefore drop our unreferenced and possibly stale
> copy.
> 
> 

Applied, thanks!

[1/1] ARM: dts: rockchip: drop unreferenced rockchip-pinconf.dtsi
  https://git.pengutronix.de/cgit/barebox/commit/?id=3d633c0f7c52 (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH] ARM: dts: rk356x: describe serial reboot mode

2024-04-16 Thread Sascha Hauer


On Mon, 15 Apr 2024 07:32:53 +0200, Ahmad Fatoum wrote:
> The PMUGRF (Power Management Unit - General Register File) of the RK3568
> has a general purpose register checked by the BootROM on power-on to
> decide on whether to drop to recovery mode (rk-usb-loader/rkdeveloptool).
> 
> Describe this in the device tree, so it's possible to use, e.g.
> 
>   global.system.reboot_mode.next=serial reset
> 
> [...]

Applied, thanks!

[1/1] ARM: dts: rk356x: describe serial reboot mode
  https://git.pengutronix.de/cgit/barebox/commit/?id=c55fc4d1dbea (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH 0/7] PWM: rockchip: add driver support

2024-04-16 Thread Sascha Hauer


On Mon, 15 Apr 2024 07:35:53 +0200, Ahmad Fatoum wrote:
> This series aligns the barebox PWM framework more with the current Linux
> state in v6.8 and then ports over the Rockchip PWM driver.
> 
> This has been tested on the RK3566 controlling backlight and PWM LEDs.
> 
> Ahmad Fatoum (7):
>   PWM: core: check that struct pwm_chip::devname is set
>   PWM: core: add struct pwm_chip::dev
>   PWM: core: adopt Linux prototype for struct pwm_ops::apply
>   PWM: align struct pwm_state member names with Linux
>   PWM: core: add definition for PWM_POLARITY_INVERSED
>   PWM: rockchip: add driver support
>   ARM: dts: rk356x: add aliases for PWM controllers
> 
> [...]

Applied, thanks!

[1/7] PWM: core: check that struct pwm_chip::devname is set
  https://git.pengutronix.de/cgit/barebox/commit/?id=9c2ce1113752 (link may 
not be stable)
[2/7] PWM: core: add struct pwm_chip::dev
  https://git.pengutronix.de/cgit/barebox/commit/?id=66cc09c044ab (link may 
not be stable)
[3/7] PWM: core: adopt Linux prototype for struct pwm_ops::apply
  https://git.pengutronix.de/cgit/barebox/commit/?id=29e00152bb73 (link may 
not be stable)
[4/7] PWM: align struct pwm_state member names with Linux
  https://git.pengutronix.de/cgit/barebox/commit/?id=c5ae8eb5ef72 (link may 
not be stable)
[5/7] PWM: core: add definition for PWM_POLARITY_INVERSED
  https://git.pengutronix.de/cgit/barebox/commit/?id=32a64b0e2cf7 (link may 
not be stable)
[6/7] PWM: rockchip: add driver support
  https://git.pengutronix.de/cgit/barebox/commit/?id=b96d3bccc710 (link may 
not be stable)
[7/7] ARM: dts: rk356x: add aliases for PWM controllers
  https://git.pengutronix.de/cgit/barebox/commit/?id=a77bd919a9e0 (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH] common: factor out debugging options into separate files

2024-04-16 Thread Sascha Hauer


On Mon, 15 Apr 2024 07:36:30 +0200, Ahmad Fatoum wrote:
> We have a lot of debugging options, especially for DEBUG_LL, which make
> common/Kconfig quite a bit crowded. Releive some pressure there by
> factoring the debugging options and DEBUG_LL out into separate files.
> 
> 

Applied, thanks!

[1/1] common: factor out debugging options into separate files
  https://git.pengutronix.de/cgit/barebox/commit/?id=b3d50a2b40de (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH] pinctrl: rockchip: check for invalid pull settings

2024-04-16 Thread Sascha Hauer


On Mon, 15 Apr 2024 09:21:35 +0200, Ahmad Fatoum wrote:
> Commit e877582e9875 ("pinctrl: rockchip: fix bias settings") reinstated
> the translation done to pull settings via the bank->pull_type array,
> like the original Linux driver does. What it didn't do is actually check
> that the translation succeeded. Add this check to make sure we don't
> somehow end up packing a negative value into the bitset we write into
> the hardware.
> 
> [...]

Applied, thanks!

[1/1] pinctrl: rockchip: check for invalid pull settings
  https://git.pengutronix.de/cgit/barebox/commit/?id=32e9e020ae44 (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH master] Documentation: aarch64-qemu-virt: add name of defconfig

2024-04-16 Thread Sascha Hauer


On Mon, 15 Apr 2024 11:14:48 +0200, Ahmad Fatoum wrote:
> Commit d00b07dd14bc ("ARM: Remove qemu_virt64_defconfig") dropped the
> defconfig in favor of multi_v8_defconfig, but missed updating the
> documentation. Remedy this.
> 
> 

Applied, thanks!

[1/1] Documentation: aarch64-qemu-virt: add name of defconfig
  https://git.pengutronix.de/cgit/barebox/commit/?id=26b637912f30 (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




Re: [PATCH master] Documentation: devel: project-ideas: remove outdated info on MMC speed

2024-04-16 Thread Sascha Hauer


On Mon, 15 Apr 2024 11:17:07 +0200, Ahmad Fatoum wrote:
> This is now doubly outdated. We have support for DDR in a number of
> drivers and HS200 for one SoC (ZynqMP) and more is likely to come with
> time, so remove that outdate info.
> 
> 

Applied, thanks!

[1/1] Documentation: devel: project-ideas: remove outdated info on MMC speed
  https://git.pengutronix.de/cgit/barebox/commit/?id=615b803a07c8 (link may 
not be stable)

Best regards,
-- 
Sascha Hauer 




[PATCH 1/8] bch: update from Kernel

2024-04-16 Thread Sascha Hauer
This updates BCH support from Linux as of Linux-6.9-rc2. Among other
things in Linux the bch function names changed from a _bch suffix to a bch_
prefix.

Link: https://lore.barebox.org/20240416062147.1337233-1-s.ha...@pengutronix.de
Signed-off-by: Sascha Hauer 
---
 common/imx-bbu-nand-fcb.c   |  12 +--
 drivers/mtd/devices/docg3.c |   8 +-
 drivers/mtd/nand/nand_bch.c |  10 +--
 include/linux/bch.h |  25 ++
 lib/Kconfig |   1 +
 lib/bch.c   | 167 +++-
 6 files changed, 130 insertions(+), 93 deletions(-)

diff --git a/common/imx-bbu-nand-fcb.c b/common/imx-bbu-nand-fcb.c
index 0d46192720..d0261140cf 100644
--- a/common/imx-bbu-nand-fcb.c
+++ b/common/imx-bbu-nand-fcb.c
@@ -79,7 +79,7 @@ static void encode_bch_ecc(void *buf, struct fcb_block *fcb, 
int eccbits)
int blocksize = 128;
int numblocks = 8;
int ecc_buf_size = (m * eccbits + 7) / 8;
-   struct bch_control *bch = init_bch(m, eccbits, 0);
+   struct bch_control *bch = bch_init(m, eccbits, 0, false);
uint8_t *ecc_buf = xmalloc(ecc_buf_size);
uint8_t *tmp_buf = xzalloc(blocksize * numblocks);
uint8_t *psrc, *pdst;
@@ -109,7 +109,7 @@ static void encode_bch_ecc(void *buf, struct fcb_block 
*fcb, int eccbits)
for (j = 0; j < blocksize; j++)
psrc[j] = reverse_bit(psrc[j]);
 
-   encode_bch(bch, psrc, blocksize, ecc_buf);
+   bch_encode(bch, psrc, blocksize, ecc_buf);
 
/* reverse ecc bit */
for (j = 0; j < ecc_buf_size; j++)
@@ -121,7 +121,7 @@ static void encode_bch_ecc(void *buf, struct fcb_block 
*fcb, int eccbits)
 
free(ecc_buf);
free(tmp_buf);
-   free_bch(bch);
+   bch_free(bch);
 }
 
 static struct fcb_block *fcb_decode_bch(void *rawpage, int eccbits)
@@ -130,7 +130,7 @@ static struct fcb_block *fcb_decode_bch(void *rawpage, int 
eccbits)
int blocksize = 128;
int numblocks = 8;
int ecc_buf_size = (m * eccbits + 7) / 8;
-   struct bch_control *bch = init_bch(m, eccbits, 0);
+   struct bch_control *bch = bch_init(m, eccbits, 0, false);
uint8_t *fcb = xmalloc(numblocks * blocksize);
uint8_t *ecc_buf = xmalloc(ecc_buf_size);
uint8_t *data_buf = xmalloc(blocksize);
@@ -152,7 +152,7 @@ static struct fcb_block *fcb_decode_bch(void *rawpage, int 
eccbits)
for (j = 0; j < ecc_buf_size; j++)
ecc_buf[j] = reverse_bit(psrc[j + blocksize]);
 
-   ret = decode_bch(bch, data_buf, blocksize, ecc_buf,
+   ret = bch_decode(bch, data_buf, blocksize, ecc_buf,
 NULL, NULL, errloc);
 
if (ret < 0) {
@@ -185,7 +185,7 @@ static struct fcb_block *fcb_decode_bch(void *rawpage, int 
eccbits)
free(data_buf);
free(ecc_buf);
free(errloc);
-   free_bch(bch);
+   bch_free(bch);
 
return (struct fcb_block *)fcb;
 }
diff --git a/drivers/mtd/devices/docg3.c b/drivers/mtd/devices/docg3.c
index 593a7035e5..fcf9403b8f 100644
--- a/drivers/mtd/devices/docg3.c
+++ b/drivers/mtd/devices/docg3.c
@@ -325,7 +325,7 @@ static int doc_ecc_bch_fix_data(struct docg3 *docg3, void 
*buf, u8 *hwecc)
 
for (i = 0; i < DOC_ECC_BCH_SIZE; i++)
ecc[i] = bitrev8(hwecc[i]);
-   numerrs = decode_bch(docg3_bch, NULL, DOC_ECC_BCH_COVERED_BYTES,
+   numerrs = bch_decode(docg3_bch, NULL, DOC_ECC_BCH_COVERED_BYTES,
 NULL, ecc, NULL, errorpos);
BUG_ON(numerrs == -EINVAL);
if (numerrs < 0)
@@ -1144,8 +1144,8 @@ static int __init docg3_probe(struct device *dev)
base = IOMEM(iores->start);
 
ret = -ENOMEM;
-   docg3_bch = init_bch(DOC_ECC_BCH_M, DOC_ECC_BCH_T,
-DOC_ECC_BCH_PRIMPOLY);
+   docg3_bch = bch_init(DOC_ECC_BCH_M, DOC_ECC_BCH_T,
+DOC_ECC_BCH_PRIMPOLY, false);
if (!docg3_bch)
goto nomem2;
 
@@ -1181,7 +1181,7 @@ static int __init docg3_probe(struct device *dev)
ret = -ENODEV;
dev_info(dev, "No supported DiskOnChip found\n");
 err_probe:
-   free_bch(docg3_bch);
+   bch_free(docg3_bch);
 nomem2:
return ret;
 }
diff --git a/drivers/mtd/nand/nand_bch.c b/drivers/mtd/nand/nand_bch.c
index 0d636d9608..45f9c5052a 100644
--- a/drivers/mtd/nand/nand_bch.c
+++ b/drivers/mtd/nand/nand_bch.c
@@ -42,7 +42,7 @@ int nand_bch_calculate_ecc(struct nand_chip *chip, const 
unsigned char *buf,
unsigned int i;
 
memset(code, 0, chip->ecc.bytes);
-   encode_bch(nbc->bch, buf, chip->ecc.size, code);
+   bch_encode(nbc->bch, buf, chip->ecc.size, code);
 
/* apply mask so that an erased page is a valid codeword */
for (i = 0; i < chip->ecc.bytes; i++)
@@ -68,7 +68,7 @@ int nand_bch_correct_data(struct nand_chip *chip, unsigned 

[PATCH 5/8] mtd: nand: replace nand_imx driver with kernel driver

2024-04-16 Thread Sascha Hauer
The barebox nand_imx driver has diverged a lot from the corresponding
Kernel driver. To reduce maintenance effort replace the driver with
the Kernel driver. The driver is mostly taken from the Kernel and only
adjusted to compile with barebox. The only significant change is that
the driver creates the flash BBT if none exists, like our old driver
did.

Signed-off-by: Sascha Hauer 
---
 drivers/mtd/nand/raw/Makefile   |2 +-
 drivers/mtd/nand/raw/mxc_nand.c | 1880 +++
 drivers/mtd/nand/raw/nand_imx.c | 1483 
 3 files changed, 1881 insertions(+), 1484 deletions(-)
 create mode 100644 drivers/mtd/nand/raw/mxc_nand.c
 delete mode 100644 drivers/mtd/nand/raw/nand_imx.c

diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile
index f0e8834e25..38c7cc809d 100644
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -10,7 +10,7 @@ obj-$(CONFIG_MTD_RAW_NAND)+= nand_jedec.o
 obj-$(CONFIG_MTD_RAW_NAND) += nand_bbt.o
 
 obj-$(CONFIG_MTD_NAND_NOMADIK) += nomadik_nand.o
-obj-$(CONFIG_NAND_IMX) += nand_imx.o
+obj-$(CONFIG_NAND_IMX) += mxc_nand.o
 obj-$(CONFIG_NAND_OMAP_GPMC)   += nand_omap_gpmc.o 
nand_omap_bch_decoder.o
 obj-$(CONFIG_MTD_NAND_OMAP_ELM)+= omap_elm.o
 obj-$(CONFIG_NAND_ORION)   += nand_orion.o
diff --git a/drivers/mtd/nand/raw/mxc_nand.c b/drivers/mtd/nand/raw/mxc_nand.c
new file mode 100644
index 00..9b5b5c744a
--- /dev/null
+++ b/drivers/mtd/nand/raw/mxc_nand.c
@@ -0,0 +1,1880 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2008 Sascha Hauer, ker...@pengutronix.de
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DRIVER_NAME "mxc_nand"
+
+/* Addresses for NFC registers */
+#define NFC_V1_V2_BUF_SIZE (host->regs + 0x00)
+#define NFC_V1_V2_BUF_ADDR (host->regs + 0x04)
+#define NFC_V1_V2_FLASH_ADDR   (host->regs + 0x06)
+#define NFC_V1_V2_FLASH_CMD(host->regs + 0x08)
+#define NFC_V1_V2_CONFIG   (host->regs + 0x0a)
+#define NFC_V1_V2_ECC_STATUS_RESULT(host->regs + 0x0c)
+#define NFC_V1_V2_RSLTMAIN_AREA(host->regs + 0x0e)
+#define NFC_V21_RSLTSPARE_AREA (host->regs + 0x10)
+#define NFC_V1_V2_WRPROT   (host->regs + 0x12)
+#define NFC_V1_UNLOCKSTART_BLKADDR (host->regs + 0x14)
+#define NFC_V1_UNLOCKEND_BLKADDR   (host->regs + 0x16)
+#define NFC_V21_UNLOCKSTART_BLKADDR0   (host->regs + 0x20)
+#define NFC_V21_UNLOCKSTART_BLKADDR1   (host->regs + 0x24)
+#define NFC_V21_UNLOCKSTART_BLKADDR2   (host->regs + 0x28)
+#define NFC_V21_UNLOCKSTART_BLKADDR3   (host->regs + 0x2c)
+#define NFC_V21_UNLOCKEND_BLKADDR0 (host->regs + 0x22)
+#define NFC_V21_UNLOCKEND_BLKADDR1 (host->regs + 0x26)
+#define NFC_V21_UNLOCKEND_BLKADDR2 (host->regs + 0x2a)
+#define NFC_V21_UNLOCKEND_BLKADDR3 (host->regs + 0x2e)
+#define NFC_V1_V2_NF_WRPRST(host->regs + 0x18)
+#define NFC_V1_V2_CONFIG1  (host->regs + 0x1a)
+#define NFC_V1_V2_CONFIG2  (host->regs + 0x1c)
+
+#define NFC_V2_CONFIG1_ECC_MODE_4  (1 << 0)
+#define NFC_V1_V2_CONFIG1_SP_EN(1 << 2)
+#define NFC_V1_V2_CONFIG1_ECC_EN   (1 << 3)
+#define NFC_V1_V2_CONFIG1_INT_MSK  (1 << 4)
+#define NFC_V1_V2_CONFIG1_BIG  (1 << 5)
+#define NFC_V1_V2_CONFIG1_RST  (1 << 6)
+#define NFC_V1_V2_CONFIG1_CE   (1 << 7)
+#define NFC_V2_CONFIG1_ONE_CYCLE   (1 << 8)
+#define NFC_V2_CONFIG1_PPB(x)  (((x) & 0x3) << 9)
+#define NFC_V2_CONFIG1_FP_INT  (1 << 11)
+
+#define NFC_V1_V2_CONFIG2_INT  (1 << 15)
+
+/*
+ * Operation modes for the NFC. Valid for v1, v2 and v3
+ * type controllers.
+ */
+#define NFC_CMD(1 << 0)
+#define NFC_ADDR   (1 << 1)
+#define NFC_INPUT  (1 << 2)
+#define NFC_OUTPUT (1 << 3)
+#define NFC_ID (1 << 4)
+#define NFC_STATUS (1 << 5)
+
+#define NFC_V3_FLASH_CMD   (host->regs_axi + 0x00)
+#define NFC_V3_FLASH_ADDR0 (host->regs_axi + 0x04)
+
+#define NFC_V3_CONFIG1 (host->regs_axi + 0x34)
+#define NFC_V3_CONFIG1_SP_EN   (1 << 0)
+#define NFC_V3_CONFIG1_RBA(x)  (((x) & 0x7 ) << 4)
+
+#define NFC_V3_ECC_STATUS_RESULT   (host->regs_axi + 0x38)
+
+#define NFC_V3_LAUNCH  (host->regs_axi + 0x40)
+
+#define NFC_V3_WRPROT  (host->regs_ip + 0x0)
+#define NFC_V3_WRPROT_LOCK_TIGHT   (1 << 0)
+#define NFC_V3_WRPROT_LOCK (1 << 1)
+#define NFC_V3_WRPROT_UNLOCK   (1 << 2)
+#define NFC_V3_WRPROT_BLS_UNLOCK   (2 << 6)
+
+#define NFC_V3_WRPROT_UNLOCK_BLK_ADD0   (host->regs_ip + 

[PATCH 7/8] mtd: nand: mxc_nand: implement exec_op

2024-04-16 Thread Sascha Hauer
This converts the driver to the more modern exec_op which gets us rid
of a bunch of legacy code. Tested on i.MX27 and i.MX25.

Signed-off-by: Sascha Hauer 
---
 drivers/mtd/nand/raw/mxc_nand.c | 426 ++--
 1 file changed, 132 insertions(+), 294 deletions(-)

diff --git a/drivers/mtd/nand/raw/mxc_nand.c b/drivers/mtd/nand/raw/mxc_nand.c
index d9e06a0014..bd320bf3b8 100644
--- a/drivers/mtd/nand/raw/mxc_nand.c
+++ b/drivers/mtd/nand/raw/mxc_nand.c
@@ -119,8 +119,7 @@ struct mxc_nand_host;
 
 struct mxc_nand_devtype_data {
void (*preset)(struct mtd_info *);
-   int (*read_page)(struct nand_chip *chip, void *buf, void *oob, bool ecc,
-int page);
+   int (*read_page)(struct nand_chip *chip);
void (*send_cmd)(struct mxc_nand_host *, uint16_t, int);
void (*send_addr)(struct mxc_nand_host *, uint16_t, int);
void (*send_page)(struct mtd_info *, unsigned int);
@@ -175,8 +174,7 @@ struct mxc_nand_host {
 
struct completion   op_completion;
 
-   uint8_t *data_buf;
-   unsigned intbuf_start;
+   void*data_buf;
 
const struct mxc_nand_devtype_data *devtype_data;
 };
@@ -279,63 +277,6 @@ static void copy_spare(struct mtd_info *mtd, bool bfrom, 
void *buf)
}
 }
 
-/*
- * MXC NANDFC can only perform full page+spare or spare-only read/write.  When
- * the upper layers perform a read/write buf operation, the saved column 
address
- * is used to index into the full page. So usually this function is called with
- * column == 0 (unless no column cycle is needed indicated by column == -1)
- */
-static void mxc_do_addr_cycle(struct mtd_info *mtd, int column, int page_addr)
-{
-   struct nand_chip *nand_chip = mtd_to_nand(mtd);
-   struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
-
-   /* Write out column address, if necessary */
-   if (column != -1) {
-   host->devtype_data->send_addr(host, column & 0xff,
- page_addr == -1);
-   if (mtd->writesize > 512)
-   /* another col addr cycle for 2k page */
-   host->devtype_data->send_addr(host,
- (column >> 8) & 0xff,
- false);
-   }
-
-   /* Write out page address, if necessary */
-   if (page_addr != -1) {
-   /* paddr_0 - p_addr_7 */
-   host->devtype_data->send_addr(host, (page_addr & 0xff), false);
-
-   if (mtd->writesize > 512) {
-   if (mtd->size >= 0x1000) {
-   /* paddr_8 - paddr_15 */
-   host->devtype_data->send_addr(host,
-   (page_addr >> 8) & 0xff,
-   false);
-   host->devtype_data->send_addr(host,
-   (page_addr >> 16) & 0xff,
-   true);
-   } else
-   /* paddr_8 - paddr_15 */
-   host->devtype_data->send_addr(host,
-   (page_addr >> 8) & 0xff, true);
-   } else {
-   if (nand_chip->options & NAND_ROW_ADDR_3) {
-   /* paddr_8 - paddr_15 */
-   host->devtype_data->send_addr(host,
-   (page_addr >> 8) & 0xff,
-   false);
-   host->devtype_data->send_addr(host,
-   (page_addr >> 16) & 0xff,
-   true);
-   } else
-   /* paddr_8 - paddr_15 */
-   host->devtype_data->send_addr(host,
-   (page_addr >> 8) & 0xff, true);
-   }
-   }
-}
-
 static int check_int_v3(struct mxc_nand_host *host)
 {
uint32_t tmp;
@@ -716,18 +657,7 @@ static void mxc_nand_enable_hwecc_v3(struct nand_chip 
*chip, bool enable)
writel(config2, NFC_V3_CONFIG2);
 }
 
-/* This functions is used by upper layer to checks if device is ready */
-static int mxc_nand_dev_ready(struct nand_chip *chip)
-{
-   /*
-* NFC handles R/B internally. Therefore, this function
-* always returns status as ready.
-*/
-   return 1;
-}
-
-static int mxc_nand_read_page_v1(struct nand_chip *chip, void *buf, void *oob,
-bool ecc, int page)
+static int mxc_nand_read_page_v1(struct nand_chip *chip)
 {
struct mtd_info *mtd = nand_to_mtd(chip);
struct 

[PATCH 8/8] mtd: nand: mxc_nand: support software ECC

2024-04-16 Thread Sascha Hauer
To support software ECC we still need the driver provided read_oob,
read_page_raw and write_page_raw ops, so set them unconditionally
no matter which engine_type we use. The OOB layout on the other hand
represents the layout the i.MX ECC hardware uses, so set this only
when NAND_ECC_ENGINE_TYPE_ON_HOST is in use.

With these changes the driver can be used with software BCH ECC which
is useful for NAND chips that require a stronger ECC than the i.MX
hardware supports.

Signed-off-by: Sascha Hauer 
---
 drivers/mtd/nand/raw/mxc_nand.c | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/raw/mxc_nand.c b/drivers/mtd/nand/raw/mxc_nand.c
index bd320bf3b8..d057d1b1bc 100644
--- a/drivers/mtd/nand/raw/mxc_nand.c
+++ b/drivers/mtd/nand/raw/mxc_nand.c
@@ -1347,15 +1347,16 @@ static int mxcnd_attach_chip(struct nand_chip *chip)
chip->ecc.bytes = host->devtype_data->eccbytes;
host->eccsize = host->devtype_data->eccsize;
chip->ecc.size = 512;
-   mtd_set_ooblayout(mtd, host->devtype_data->ooblayout);
+
+   chip->ecc.read_oob = mxc_nand_read_oob;
+   chip->ecc.read_page_raw = mxc_nand_read_page_raw;
+   chip->ecc.write_page_raw = mxc_nand_write_page_raw;
 
switch (chip->ecc.engine_type) {
case NAND_ECC_ENGINE_TYPE_ON_HOST:
+   mtd_set_ooblayout(mtd, host->devtype_data->ooblayout);
chip->ecc.read_page = mxc_nand_read_page;
-   chip->ecc.read_page_raw = mxc_nand_read_page_raw;
-   chip->ecc.read_oob = mxc_nand_read_oob;
chip->ecc.write_page = mxc_nand_write_page_ecc;
-   chip->ecc.write_page_raw = mxc_nand_write_page_raw;
chip->ecc.write_oob = mxc_nand_write_oob;
break;
 
-- 
2.39.2




[PATCH 0/8] Update NAND layer

2024-04-16 Thread Sascha Hauer
This series comes out of the need to support software BCH ECC for the i.MX
NAND driver, as the ancient i.MX27 hardware only supports 1-bit Hamming
ECC which is not sufficient on more modern NAND chips.

1st of all the NAND layer is updated to Linux-6.9-rc2, because this has
better support for Software ECC. And yes, the update is overdue as our
last update is from Linux-5.9 which is already 4 years old. We take the
opportunity to move the NAND drivers over to drivers/mtd/nand/raw/, the
place where the Kernel NAND drivers live for several years now.

Next thing is to move the i.MX NAND driver over to exec_op which makes
it easier to support software BCH ECC. Before doing this we move over
to the Kernel i.MX NAND driver so that the same patches can be sent for
Kernel inclusion as well.

Finally fixing the driver for using software BCH ECC is only a small
patch.

I've tested the NAND layer update on i.MX6, i.MX27, i.MX25, SoCFPGA
(denali) and one Atmel sama5d4 device. The patch is huge and I am sure
there will be regressions somewhere in it, so I welcome all testing
reports and will happily fix fallout.

Sascha

Sascha Hauer (8):
  bch: update from Kernel
  mtd: nand: move to drivers/mtd/nand/raw/
  mtd: update _lock/_unlock prototype
  mtd: nand: update to Linux-6.9-rc2
  mtd: nand: replace nand_imx driver with kernel driver
  mtd: nand: mxc_nand: separate page read from ecc calc
  mtd: nand: mxc_nand: implement exec_op
  mtd: nand: mxc_nand: support software ECC

 commands/Kconfig  |6 +-
 common/imx-bbu-nand-fcb.c |   12 +-
 drivers/mtd/Makefile  |2 +-
 drivers/mtd/devices/docg3.c   |8 +-
 drivers/mtd/mtdconcat.c   |4 +-
 drivers/mtd/nand/Kconfig  |  184 +-
 drivers/mtd/nand/Makefile |   28 +-
 drivers/mtd/nand/core.c   |  133 +-
 drivers/mtd/nand/ecc-sw-bch.c |  406 
 drivers/mtd/nand/ecc-sw-hamming.c |  660 +++
 drivers/mtd/nand/ecc.c|  697 +++
 drivers/mtd/nand/nand_bch.c   |  219 ---
 drivers/mtd/nand/nand_imx.c   | 1494 --
 drivers/mtd/nand/raw/Kconfig  |  171 ++
 drivers/mtd/nand/raw/Makefile |   23 +
 drivers/mtd/nand/{ => raw}/atmel/Makefile |0
 .../mtd/nand/{ => raw}/atmel/atmel_nand_ecc.h |0
 drivers/mtd/nand/{ => raw}/atmel/legacy.c |   11 +-
 .../nand/{ => raw}/atmel/nand-controller.c|0
 drivers/mtd/nand/{ => raw}/atmel/pmecc.c  |0
 drivers/mtd/nand/{ => raw}/atmel/pmecc.h  |0
 drivers/mtd/nand/{ => raw}/denali.h   |0
 drivers/mtd/nand/{ => raw}/fsl_ifc.h  |0
 drivers/mtd/nand/{ => raw}/internals.h|5 +
 drivers/mtd/nand/raw/mxc_nand.c   | 1751 +
 drivers/mtd/nand/{ => raw}/nand_amd.c |0
 drivers/mtd/nand/{ => raw}/nand_base.c| 1635 +--
 drivers/mtd/nand/{ => raw}/nand_bbt.c |0
 drivers/mtd/nand/{ => raw}/nand_denali.c  |3 +-
 drivers/mtd/nand/{ => raw}/nand_denali_dt.c   |0
 drivers/mtd/nand/{ => raw}/nand_ecc.c |0
 drivers/mtd/nand/{ => raw}/nand_esmt.c|   17 +-
 drivers/mtd/nand/{ => raw}/nand_fsl_ifc.c |8 +-
 drivers/mtd/nand/{ => raw}/nand_hynix.c   |   59 +-
 drivers/mtd/nand/{ => raw}/nand_ids.c |0
 drivers/mtd/nand/{ => raw}/nand_jedec.c   |0
 drivers/mtd/nand/{ => raw}/nand_legacy.c  |0
 drivers/mtd/nand/{ => raw}/nand_macronix.c|   42 +-
 drivers/mtd/nand/{ => raw}/nand_micron.c  |   24 +-
 drivers/mtd/nand/{ => raw}/nand_mrvl_nfc.c|   10 +-
 drivers/mtd/nand/{ => raw}/nand_mxs.c |2 +-
 .../nand/{ => raw}/nand_omap_bch_decoder.c|0
 .../nand/{ => raw}/nand_omap_bch_decoder.h|0
 drivers/mtd/nand/{ => raw}/nand_omap_gpmc.c   |5 +-
 drivers/mtd/nand/{ => raw}/nand_onfi.c|   32 +-
 drivers/mtd/nand/{ => raw}/nand_orion.c   |3 +-
 drivers/mtd/nand/{ => raw}/nand_samsung.c |   22 +-
 drivers/mtd/nand/{ => raw}/nand_timings.c |  370 +++-
 drivers/mtd/nand/{ => raw}/nand_toshiba.c |   25 +-
 drivers/mtd/nand/{ => raw}/nomadik_nand.c |2 +-
 drivers/mtd/nand/{ => raw}/omap_elm.c |0
 drivers/mtd/nand/{ => raw}/stm32_fmc2_nand.c  |2 +-
 drivers/mtd/nor/cfi_flash.c   |4 +-
 drivers/mtd/partition.c   |4 +-
 drivers/mtd/spi-nor/spi-nor.c |4 +-
 drivers/net/e1000/mtd.c   |4 +-
 drivers/of/of_mtd.c   |1 -
 include/linux/bch.h   |   25 +-
 include/linux/mtd/mtd.h   |7 +-
 include/linux/mtd/nand-ecc-sw-bch.h   |   71 +
 include/linux/mtd/nand-ecc-sw-hamming.h   |   89 +
 include/linux/mtd/nand.h

[PATCH 2/8] mtd: nand: move to drivers/mtd/nand/raw/

2024-04-16 Thread Sascha Hauer
Linux moved the raw NAND drivers from drivers/mtd/nand/ to
drivers/mtd/nand/raw/ years ago. Follow suit and do the same
for barebox to be more consistent with Linux.

Signed-off-by: Sascha Hauer 
---
 commands/Kconfig  |   6 +-
 drivers/mtd/Makefile  |   2 +-
 drivers/mtd/nand/Kconfig  | 165 +---
 drivers/mtd/nand/Makefile |  24 +--
 drivers/mtd/nand/raw/Kconfig  | 177 ++
 drivers/mtd/nand/raw/Makefile |  24 +++
 drivers/mtd/nand/{ => raw}/atmel/Makefile |   0
 .../mtd/nand/{ => raw}/atmel/atmel_nand_ecc.h |   0
 drivers/mtd/nand/{ => raw}/atmel/legacy.c |   0
 .../nand/{ => raw}/atmel/nand-controller.c|   0
 drivers/mtd/nand/{ => raw}/atmel/pmecc.c  |   0
 drivers/mtd/nand/{ => raw}/atmel/pmecc.h  |   0
 drivers/mtd/nand/{ => raw}/denali.h   |   0
 drivers/mtd/nand/{ => raw}/fsl_ifc.h  |   0
 drivers/mtd/nand/{ => raw}/internals.h|   0
 drivers/mtd/nand/{ => raw}/nand_amd.c |   0
 drivers/mtd/nand/{ => raw}/nand_base.c|   0
 drivers/mtd/nand/{ => raw}/nand_bbt.c |   0
 drivers/mtd/nand/{ => raw}/nand_bch.c |   0
 drivers/mtd/nand/{ => raw}/nand_denali.c  |   0
 drivers/mtd/nand/{ => raw}/nand_denali_dt.c   |   0
 drivers/mtd/nand/{ => raw}/nand_ecc.c |   0
 drivers/mtd/nand/{ => raw}/nand_esmt.c|   0
 drivers/mtd/nand/{ => raw}/nand_fsl_ifc.c |   0
 drivers/mtd/nand/{ => raw}/nand_hynix.c   |   0
 drivers/mtd/nand/{ => raw}/nand_ids.c |   0
 drivers/mtd/nand/{ => raw}/nand_imx.c |   0
 drivers/mtd/nand/{ => raw}/nand_jedec.c   |   0
 drivers/mtd/nand/{ => raw}/nand_legacy.c  |   0
 drivers/mtd/nand/{ => raw}/nand_macronix.c|   0
 drivers/mtd/nand/{ => raw}/nand_micron.c  |   0
 drivers/mtd/nand/{ => raw}/nand_mrvl_nfc.c|   0
 drivers/mtd/nand/{ => raw}/nand_mxs.c |   0
 .../nand/{ => raw}/nand_omap_bch_decoder.c|   0
 .../nand/{ => raw}/nand_omap_bch_decoder.h|   0
 drivers/mtd/nand/{ => raw}/nand_omap_gpmc.c   |   0
 drivers/mtd/nand/{ => raw}/nand_onfi.c|   0
 drivers/mtd/nand/{ => raw}/nand_orion.c   |   0
 drivers/mtd/nand/{ => raw}/nand_samsung.c |   0
 drivers/mtd/nand/{ => raw}/nand_timings.c |   0
 drivers/mtd/nand/{ => raw}/nand_toshiba.c |   0
 drivers/mtd/nand/{ => raw}/nomadik_nand.c |   0
 drivers/mtd/nand/{ => raw}/omap_elm.c |   0
 drivers/mtd/nand/{ => raw}/stm32_fmc2_nand.c  |   0
 include/nand.h|   2 +-
 45 files changed, 213 insertions(+), 187 deletions(-)
 create mode 100644 drivers/mtd/nand/raw/Kconfig
 create mode 100644 drivers/mtd/nand/raw/Makefile
 rename drivers/mtd/nand/{ => raw}/atmel/Makefile (100%)
 rename drivers/mtd/nand/{ => raw}/atmel/atmel_nand_ecc.h (100%)
 rename drivers/mtd/nand/{ => raw}/atmel/legacy.c (100%)
 rename drivers/mtd/nand/{ => raw}/atmel/nand-controller.c (100%)
 rename drivers/mtd/nand/{ => raw}/atmel/pmecc.c (100%)
 rename drivers/mtd/nand/{ => raw}/atmel/pmecc.h (100%)
 rename drivers/mtd/nand/{ => raw}/denali.h (100%)
 rename drivers/mtd/nand/{ => raw}/fsl_ifc.h (100%)
 rename drivers/mtd/nand/{ => raw}/internals.h (100%)
 rename drivers/mtd/nand/{ => raw}/nand_amd.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_base.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_bbt.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_bch.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_denali.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_denali_dt.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_ecc.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_esmt.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_fsl_ifc.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_hynix.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_ids.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_imx.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_jedec.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_legacy.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_macronix.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_micron.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_mrvl_nfc.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_mxs.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_omap_bch_decoder.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_omap_bch_decoder.h (100%)
 rename drivers/mtd/nand/{ => raw}/nand_omap_gpmc.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_onfi.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_orion.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_samsung.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_timings.c (100%)
 rename drivers/mtd/nand/{ => raw}/nand_toshiba.c (100%)
 rename drivers/mtd/nand/{ => raw}/nomadik_nand.c (100%)
 rename drivers/mtd/nand/{ => raw}/omap_elm.c (100%)
 rename drivers/mtd/nand/{ => raw}/stm32_fmc2_nand.c (100%)

diff --git a/commands/Kconfig b/commands/Kconfig
index 

[PATCH 3/8] mtd: update _lock/_unlock prototype

2024-04-16 Thread Sascha Hauer
In Linux the _lock/_unlock hooks now take a uint64_t as length argument.
Follow suit to be more consistent with Linux.

Signed-off-by: Sascha Hauer 
---
 drivers/mtd/mtdconcat.c  | 4 ++--
 drivers/mtd/nand/raw/nand_base.c | 4 ++--
 drivers/mtd/nor/cfi_flash.c  | 4 ++--
 drivers/mtd/partition.c  | 4 ++--
 drivers/mtd/spi-nor/spi-nor.c| 4 ++--
 drivers/net/e1000/mtd.c  | 4 ++--
 include/linux/mtd/mtd.h  | 4 ++--
 7 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/mtd/mtdconcat.c b/drivers/mtd/mtdconcat.c
index 964b00166a..d4f0227384 100644
--- a/drivers/mtd/mtdconcat.c
+++ b/drivers/mtd/mtdconcat.c
@@ -382,7 +382,7 @@ static int concat_erase(struct mtd_info *mtd, struct 
erase_info *instr)
return 0;
 }
 
-static int concat_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
+static int concat_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
 {
struct mtd_concat *concat = CONCAT(mtd);
int i, err = -EINVAL;
@@ -416,7 +416,7 @@ static int concat_lock(struct mtd_info *mtd, loff_t ofs, 
size_t len)
return err;
 }
 
-static int concat_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
+static int concat_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
 {
struct mtd_concat *concat = CONCAT(mtd);
int i, err = 0;
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 2599e8c8c2..439c3f72d2 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -4449,7 +4449,7 @@ static int nand_block_markgood(struct mtd_info *mtd, 
loff_t ofs)
  * @ofs: offset byte address
  * @len: number of bytes to lock (must be a multiple of block/page size)
  */
-static int nand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
+static int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
 {
struct nand_chip *chip = mtd_to_nand(mtd);
 
@@ -4465,7 +4465,7 @@ static int nand_lock(struct mtd_info *mtd, loff_t ofs, 
size_t len)
  * @ofs: offset byte address
  * @len: number of bytes to unlock (must be a multiple of block/page size)
  */
-static int nand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
+static int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
 {
struct nand_chip *chip = mtd_to_nand(mtd);
 
diff --git a/drivers/mtd/nor/cfi_flash.c b/drivers/mtd/nor/cfi_flash.c
index ac46575004..2cb3d5538f 100644
--- a/drivers/mtd/nor/cfi_flash.c
+++ b/drivers/mtd/nor/cfi_flash.c
@@ -652,14 +652,14 @@ static int cfi_mtd_protect(struct flash_info *finfo, 
loff_t offset, size_t len,
return 0;
 }
 
-static int cfi_mtd_lock(struct mtd_info *mtd, loff_t offset, size_t len)
+static int cfi_mtd_lock(struct mtd_info *mtd, loff_t offset, uint64_t len)
 {
struct flash_info *finfo = container_of(mtd, struct flash_info, mtd);
 
return cfi_mtd_protect(finfo, offset, len, 1);
 }
 
-static int cfi_mtd_unlock(struct mtd_info *mtd, loff_t offset, size_t len)
+static int cfi_mtd_unlock(struct mtd_info *mtd, loff_t offset, uint64_t len)
 {
struct flash_info *finfo = container_of(mtd, struct flash_info, mtd);
 
diff --git a/drivers/mtd/partition.c b/drivers/mtd/partition.c
index 4ebc5bba41..c53375e0e2 100644
--- a/drivers/mtd/partition.c
+++ b/drivers/mtd/partition.c
@@ -80,7 +80,7 @@ static int mtd_part_erase(struct mtd_info *mtd, struct 
erase_info *instr)
return ret;
 }
 
-static int mtd_part_lock(struct mtd_info *mtd, loff_t offset, size_t len)
+static int mtd_part_lock(struct mtd_info *mtd, loff_t offset, uint64_t len)
 {
if (!mtd->parent->_lock)
return -ENOSYS;
@@ -96,7 +96,7 @@ static int mtd_part_lock(struct mtd_info *mtd, loff_t offset, 
size_t len)
return mtd->parent->_lock(mtd->parent, offset, len);
 }
 
-static int mtd_part_unlock(struct mtd_info *mtd, loff_t offset, size_t len)
+static int mtd_part_unlock(struct mtd_info *mtd, loff_t offset, uint64_t len)
 {
if (!mtd->parent->_unlock)
return -ENOSYS;
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 1773db09a1..9fdcffeed1 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -546,12 +546,12 @@ static int spi_nor_erase(struct mtd_info *mtd, struct 
erase_info *instr)
return ret;
 }
 
-static int spi_nor_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
+static int spi_nor_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
 {
return 0;
 }
 
-static int spi_nor_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
+static int spi_nor_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
 {
struct spi_nor *nor = mtd_to_spi_nor(mtd);
uint8_t status;
diff --git a/drivers/net/e1000/mtd.c b/drivers/net/e1000/mtd.c
index d472bd10a9..50883fc2a6 100644
--- a/drivers/net/e1000/mtd.c
+++ b/drivers/net/e1000/mtd.c
@@ -688,12 +688,12 @@ static int e1000_mtd_sr_rmw(struct mtd_info *mtd, u8 
mask, u8 val)
  */
 

[PATCH 6/8] mtd: nand: mxc_nand: separate page read from ecc calc

2024-04-16 Thread Sascha Hauer
Our read_page hook currently reads out a page and also counts and
returns the number of bitflips. In upcoming exec_op conversion we'll
need to read the page data in exec_op, but the bitflip information
will be needed in mxc_nand_read_page(). To ease exec_op conversion
separate the page read out from the bitflip evaluation.

For the v2/v3 controllers we can leave the bitflip information in the
status register for later evaluation. For the v1 controller this is
not possible, because the status register is overwritten with each
subpage read. We therefore store the bitflip information in the private
data.

Signed-off-by: Sascha Hauer 
---
 drivers/mtd/nand/raw/mxc_nand.c | 140 
 1 file changed, 86 insertions(+), 54 deletions(-)

diff --git a/drivers/mtd/nand/raw/mxc_nand.c b/drivers/mtd/nand/raw/mxc_nand.c
index 9b5b5c744a..d9e06a0014 100644
--- a/drivers/mtd/nand/raw/mxc_nand.c
+++ b/drivers/mtd/nand/raw/mxc_nand.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #define DRIVER_NAME "mxc_nand"
@@ -40,6 +41,8 @@
 #define NFC_V1_V2_CONFIG1  (host->regs + 0x1a)
 #define NFC_V1_V2_CONFIG2  (host->regs + 0x1c)
 
+#define NFC_V1_V2_ECC_STATUS_RESULT_ERM GENMASK(3, 2)
+
 #define NFC_V2_CONFIG1_ECC_MODE_4  (1 << 0)
 #define NFC_V1_V2_CONFIG1_SP_EN(1 << 2)
 #define NFC_V1_V2_CONFIG1_ECC_EN   (1 << 3)
@@ -125,7 +128,7 @@ struct mxc_nand_devtype_data {
uint16_t (*get_dev_status)(struct mxc_nand_host *);
int (*check_int)(struct mxc_nand_host *);
void (*irq_control)(struct mxc_nand_host *, int);
-   u32 (*get_ecc_status)(struct mxc_nand_host *);
+   u32 (*get_ecc_status)(struct nand_chip *);
const struct mtd_ooblayout_ops *ooblayout;
void (*select_chip)(struct nand_chip *chip, int cs);
int (*setup_interface)(struct nand_chip *chip, int csline,
@@ -168,6 +171,7 @@ struct mxc_nand_host {
int eccsize;
int used_oobsize;
int active_cs;
+   unsigned intecc_stats_v1;
 
struct completion   op_completion;
 
@@ -388,19 +392,81 @@ static void irq_control_v3(struct mxc_nand_host *host, 
int activate)
writel(tmp, NFC_V3_CONFIG2);
 }
 
-static u32 get_ecc_status_v1(struct mxc_nand_host *host)
+static u32 get_ecc_status_v1(struct nand_chip *chip)
+{
+   struct mtd_info *mtd = nand_to_mtd(chip);
+   struct mxc_nand_host *host = nand_get_controller_data(chip);
+   unsigned int ecc_stats, max_bitflips = 0;
+   int no_subpages, i;
+
+   no_subpages = mtd->writesize >> 9;
+
+   ecc_stats = host->ecc_stats_v1;
+
+   for (i = 0; i < no_subpages; i++) {
+   switch (ecc_stats & 0x3) {
+   case 0:
+   default:
+   break;
+   case 1:
+   mtd->ecc_stats.corrected++;
+   max_bitflips = 1;
+   break;
+   case 2:
+   mtd->ecc_stats.failed++;
+   break;
+   }
+
+   ecc_stats >>= 2;
+   }
+
+   return max_bitflips;
+}
+
+static u32 get_ecc_status_v2_v3(struct nand_chip *chip, unsigned int ecc_stat)
 {
-   return readw(NFC_V1_V2_ECC_STATUS_RESULT);
+   struct mtd_info *mtd = nand_to_mtd(chip);
+   struct mxc_nand_host *host = nand_get_controller_data(chip);
+   u8 ecc_bit_mask, err_limit;
+   unsigned int max_bitflips = 0;
+   int no_subpages, err;
+
+   ecc_bit_mask = (host->eccsize == 4) ? 0x7 : 0xf;
+   err_limit = (host->eccsize == 4) ? 0x4 : 0x8;
+
+   no_subpages = mtd->writesize >> 9;
+
+   do {
+   err = ecc_stat & ecc_bit_mask;
+   if (err > err_limit) {
+   mtd->ecc_stats.failed++;
+   } else {
+   mtd->ecc_stats.corrected += err;
+   max_bitflips = max_t(unsigned int, max_bitflips, err);
+   }
+
+   ecc_stat >>= 4;
+   } while (--no_subpages);
+
+   return max_bitflips;
 }
 
-static u32 get_ecc_status_v2(struct mxc_nand_host *host)
+static u32 get_ecc_status_v2(struct nand_chip *chip)
 {
-   return readl(NFC_V1_V2_ECC_STATUS_RESULT);
+   struct mxc_nand_host *host = nand_get_controller_data(chip);
+
+   u32 ecc_stat = readl(NFC_V1_V2_ECC_STATUS_RESULT);
+
+   return get_ecc_status_v2_v3(chip, ecc_stat);
 }
 
-static u32 get_ecc_status_v3(struct mxc_nand_host *host)
+static u32 get_ecc_status_v3(struct nand_chip *chip)
 {
-   return readl(NFC_V3_ECC_STATUS_RESULT);
+   struct mxc_nand_host *host = nand_get_controller_data(chip);
+
+   u32 ecc_stat = readl(NFC_V3_ECC_STATUS_RESULT);
+
+   return get_ecc_status_v2_v3(chip, ecc_stat);
 }
 
 /* This function polls the NANDFC to wait for the basic operation to
@@ -665,9 +731,9 @@ static 

[PATCH 1/2] clk: imx27: add nand clock

2024-04-16 Thread Sascha Hauer
The NAND clock is currently missing. The NAND driver doesn't use it
currently, but will be using it later once we update the driver. Add
this missing clock.

Signed-off-by: Sascha Hauer 
---
 drivers/clk/imx/clk-imx27.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/imx/clk-imx27.c b/drivers/clk/imx/clk-imx27.c
index 083d87fb34..7da4a1f9a6 100644
--- a/drivers/clk/imx/clk-imx27.c
+++ b/drivers/clk/imx/clk-imx27.c
@@ -246,6 +246,7 @@ static int imx27_ccm_probe(struct device *dev)
clkdev_add_physbase(clks[lcdc_ahb_gate], MX27_LCDC_BASE_ADDR, "ahb");
clkdev_add_physbase(clks[lcdc_ipg_gate], MX27_LCDC_BASE_ADDR, "ipg");
clkdev_add_physbase(clks[ipg], MX27_FEC_BASE_ADDR, NULL);
+   clkdev_add_physbase(clks[nfc_div], MX27_NFC_BASE_ADDR, NULL);
 
return 0;
 }
-- 
2.39.2




[PATCH 2/2] clk: imx27: add watchdog clock

2024-04-16 Thread Sascha Hauer
Since 87cad17964 the imxwd watchdog driver needs a clock to probe. Add
this clock for i.MX27 to make the watchdog driver work again.

Fixes: 87cad17964 ("watchdog: imxwd: get and enable clock")
Signed-off-by: Sascha Hauer 
---
 drivers/clk/imx/clk-imx27.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/clk/imx/clk-imx27.c b/drivers/clk/imx/clk-imx27.c
index 7da4a1f9a6..3f03705634 100644
--- a/drivers/clk/imx/clk-imx27.c
+++ b/drivers/clk/imx/clk-imx27.c
@@ -221,6 +221,7 @@ static int imx27_ccm_probe(struct device *dev)
clks[per3_gate] = imx_clk_gate("per3_gate", "per3_div", base + 
CCM_PCCR1, 8);
clks[lcdc_ahb_gate] = imx_clk_gate("lcdc_ahb_gate", "ahb", base + 
CCM_PCCR1, 15);
clks[lcdc_ipg_gate] = imx_clk_gate("lcdc_ipg_gate", "ipg", base + 
CCM_PCCR0, 14);
+   clks[wdog_ipg_gate] = imx_clk_gate("wdog_ipg_gate", "ipg", base + 
CCM_PCCR1, 24);
 
clkdev_add_physbase(clks[per1_div], MX27_GPT1_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per1_div], MX27_GPT2_BASE_ADDR, NULL);
@@ -247,6 +248,7 @@ static int imx27_ccm_probe(struct device *dev)
clkdev_add_physbase(clks[lcdc_ipg_gate], MX27_LCDC_BASE_ADDR, "ipg");
clkdev_add_physbase(clks[ipg], MX27_FEC_BASE_ADDR, NULL);
clkdev_add_physbase(clks[nfc_div], MX27_NFC_BASE_ADDR, NULL);
+   clkdev_add_physbase(clks[wdog_ipg_gate], MX27_WDOG_BASE_ADDR, NULL);
 
return 0;
 }
-- 
2.39.2




[PATCH] bch: update from Kernel

2024-04-16 Thread Sascha Hauer
This updates BCH support from Linux as of Linux-6.9-rc2. Among other
things in Linux the bch function names changed from a _bch suffix to a bch_
prefix.

Signed-off-by: Sascha Hauer 
---
 common/imx-bbu-nand-fcb.c   |  12 +--
 drivers/mtd/devices/docg3.c |   8 +-
 drivers/mtd/nand/nand_bch.c |  10 +--
 include/linux/bch.h |  25 ++
 lib/Kconfig |   1 +
 lib/bch.c   | 167 +++-
 6 files changed, 130 insertions(+), 93 deletions(-)

diff --git a/common/imx-bbu-nand-fcb.c b/common/imx-bbu-nand-fcb.c
index 0d46192720..d0261140cf 100644
--- a/common/imx-bbu-nand-fcb.c
+++ b/common/imx-bbu-nand-fcb.c
@@ -79,7 +79,7 @@ static void encode_bch_ecc(void *buf, struct fcb_block *fcb, 
int eccbits)
int blocksize = 128;
int numblocks = 8;
int ecc_buf_size = (m * eccbits + 7) / 8;
-   struct bch_control *bch = init_bch(m, eccbits, 0);
+   struct bch_control *bch = bch_init(m, eccbits, 0, false);
uint8_t *ecc_buf = xmalloc(ecc_buf_size);
uint8_t *tmp_buf = xzalloc(blocksize * numblocks);
uint8_t *psrc, *pdst;
@@ -109,7 +109,7 @@ static void encode_bch_ecc(void *buf, struct fcb_block 
*fcb, int eccbits)
for (j = 0; j < blocksize; j++)
psrc[j] = reverse_bit(psrc[j]);
 
-   encode_bch(bch, psrc, blocksize, ecc_buf);
+   bch_encode(bch, psrc, blocksize, ecc_buf);
 
/* reverse ecc bit */
for (j = 0; j < ecc_buf_size; j++)
@@ -121,7 +121,7 @@ static void encode_bch_ecc(void *buf, struct fcb_block 
*fcb, int eccbits)
 
free(ecc_buf);
free(tmp_buf);
-   free_bch(bch);
+   bch_free(bch);
 }
 
 static struct fcb_block *fcb_decode_bch(void *rawpage, int eccbits)
@@ -130,7 +130,7 @@ static struct fcb_block *fcb_decode_bch(void *rawpage, int 
eccbits)
int blocksize = 128;
int numblocks = 8;
int ecc_buf_size = (m * eccbits + 7) / 8;
-   struct bch_control *bch = init_bch(m, eccbits, 0);
+   struct bch_control *bch = bch_init(m, eccbits, 0, false);
uint8_t *fcb = xmalloc(numblocks * blocksize);
uint8_t *ecc_buf = xmalloc(ecc_buf_size);
uint8_t *data_buf = xmalloc(blocksize);
@@ -152,7 +152,7 @@ static struct fcb_block *fcb_decode_bch(void *rawpage, int 
eccbits)
for (j = 0; j < ecc_buf_size; j++)
ecc_buf[j] = reverse_bit(psrc[j + blocksize]);
 
-   ret = decode_bch(bch, data_buf, blocksize, ecc_buf,
+   ret = bch_decode(bch, data_buf, blocksize, ecc_buf,
 NULL, NULL, errloc);
 
if (ret < 0) {
@@ -185,7 +185,7 @@ static struct fcb_block *fcb_decode_bch(void *rawpage, int 
eccbits)
free(data_buf);
free(ecc_buf);
free(errloc);
-   free_bch(bch);
+   bch_free(bch);
 
return (struct fcb_block *)fcb;
 }
diff --git a/drivers/mtd/devices/docg3.c b/drivers/mtd/devices/docg3.c
index 593a7035e5..fcf9403b8f 100644
--- a/drivers/mtd/devices/docg3.c
+++ b/drivers/mtd/devices/docg3.c
@@ -325,7 +325,7 @@ static int doc_ecc_bch_fix_data(struct docg3 *docg3, void 
*buf, u8 *hwecc)
 
for (i = 0; i < DOC_ECC_BCH_SIZE; i++)
ecc[i] = bitrev8(hwecc[i]);
-   numerrs = decode_bch(docg3_bch, NULL, DOC_ECC_BCH_COVERED_BYTES,
+   numerrs = bch_decode(docg3_bch, NULL, DOC_ECC_BCH_COVERED_BYTES,
 NULL, ecc, NULL, errorpos);
BUG_ON(numerrs == -EINVAL);
if (numerrs < 0)
@@ -1144,8 +1144,8 @@ static int __init docg3_probe(struct device *dev)
base = IOMEM(iores->start);
 
ret = -ENOMEM;
-   docg3_bch = init_bch(DOC_ECC_BCH_M, DOC_ECC_BCH_T,
-DOC_ECC_BCH_PRIMPOLY);
+   docg3_bch = bch_init(DOC_ECC_BCH_M, DOC_ECC_BCH_T,
+DOC_ECC_BCH_PRIMPOLY, false);
if (!docg3_bch)
goto nomem2;
 
@@ -1181,7 +1181,7 @@ static int __init docg3_probe(struct device *dev)
ret = -ENODEV;
dev_info(dev, "No supported DiskOnChip found\n");
 err_probe:
-   free_bch(docg3_bch);
+   bch_free(docg3_bch);
 nomem2:
return ret;
 }
diff --git a/drivers/mtd/nand/nand_bch.c b/drivers/mtd/nand/nand_bch.c
index 0d636d9608..45f9c5052a 100644
--- a/drivers/mtd/nand/nand_bch.c
+++ b/drivers/mtd/nand/nand_bch.c
@@ -42,7 +42,7 @@ int nand_bch_calculate_ecc(struct nand_chip *chip, const 
unsigned char *buf,
unsigned int i;
 
memset(code, 0, chip->ecc.bytes);
-   encode_bch(nbc->bch, buf, chip->ecc.size, code);
+   bch_encode(nbc->bch, buf, chip->ecc.size, code);
 
/* apply mask so that an erased page is a valid codeword */
for (i = 0; i < chip->ecc.bytes; i++)
@@ -68,7 +68,7 @@ int nand_bch_correct_data(struct nand_chip *chip, unsigned 
char *buf,
unsigned int *errloc = nbc->errloc;
int i, count;
 
-   

[PATCH 1/2] fs: jffs2: remove NAND write support entirely

2024-04-16 Thread Sascha Hauer
From: Juergen Borleis 

Our JFFS2 implementation refuses to work on NAND flashes because we lack
support for CONFIG_JFFS2_FS_WRITEBUFFER currently. JFFS2 is barely used
anymore and it seems unlikely that write support for it will ever be
added, so remove write support altogether. With this we can now safely
operate on NAND flashes.

Signed-off-by: Juergen Borleis 
Signed-off-by: Sascha Hauer 
---
 fs/jffs2/Kconfig   |  4 ++-
 fs/jffs2/fs.c  | 11 --
 fs/jffs2/jffs2_fs_sb.h | 16 -
 fs/jffs2/nodelist.h|  8 -
 fs/jffs2/os-linux.h| 79 ++
 fs/jffs2/scan.c| 59 +--
 fs/jffs2/super.c   |  4 +--
 7 files changed, 23 insertions(+), 158 deletions(-)

diff --git a/fs/jffs2/Kconfig b/fs/jffs2/Kconfig
index 329e7b806a..76f2a9f70a 100644
--- a/fs/jffs2/Kconfig
+++ b/fs/jffs2/Kconfig
@@ -20,7 +20,7 @@ config FS_JFFS2_COMPRESSION_OPTIONS
  compression modules, if any, are enabled in JFFS2. Removing
  compressors can mean you cannot read existing file systems,
  and enabling experimental compressors can mean that you
- write a file system which cannot be read by a standard kernel.
+ write a file system which cannot be read by the bootloader.
 
  If unsure, you should _definitely_ say 'N'.
 
@@ -30,6 +30,8 @@ config FS_JFFS2_COMPRESSION_ZLIB
bool
select ZLIB
prompt "ZLIB compression support"
+   help
+ Enable zlib, if compression type 0x06 is missed at run-time.
 
 config FS_JFFS2_COMPRESSION_LZO
bool
diff --git a/fs/jffs2/fs.c b/fs/jffs2/fs.c
index 6f2cbff6c9..a9831582bd 100644
--- a/fs/jffs2/fs.c
+++ b/fs/jffs2/fs.c
@@ -269,17 +269,6 @@ int jffs2_do_fill_super(struct super_block *sb, int silent)
 
c = JFFS2_SB_INFO(sb);
 
-#ifndef CONFIG_JFFS2_FS_WRITEBUFFER
-   if (c->mtd->type == MTD_NANDFLASH) {
-   pr_err("Cannot operate on NAND flash unless jffs2 NAND support 
is compiled in");
-   return -EINVAL;
-   }
-   if (c->mtd->type == MTD_DATAFLASH) {
-   pr_err("Cannot operate on DataFlash unless jffs2 DataFlash 
support is compiled in");
-   return -EINVAL;
-   }
-#endif
-
c->flash_size = c->mtd->size;
c->sector_size = c->mtd->erasesize;
blocks = c->flash_size / c->sector_size;
diff --git a/fs/jffs2/jffs2_fs_sb.h b/fs/jffs2/jffs2_fs_sb.h
index 20fa9a26a4..9e35a142e4 100644
--- a/fs/jffs2/jffs2_fs_sb.h
+++ b/fs/jffs2/jffs2_fs_sb.h
@@ -120,22 +120,6 @@ struct jffs2_sb_info {
 
uint32_t wbuf_pagesize; /* 0 for NOR and other flashes with no wbuf */
 
-#ifdef CONFIG_JFFS2_FS_WBUF_VERIFY
-   unsigned char *wbuf_verify; /* read-back buffer for verification */
-#endif
-#ifdef CONFIG_JFFS2_FS_WRITEBUFFER
-   unsigned char *wbuf; /* Write-behind buffer for NAND flash */
-   uint32_t wbuf_ofs;
-   uint32_t wbuf_len;
-   struct jffs2_inodirty *wbuf_inodes;
-   struct rw_semaphore wbuf_sem;   /* Protects the write buffer */
-
-   struct delayed_work wbuf_dwork; /* write-buffer write-out work */
-
-   unsigned char *oobbuf;
-   int oobavail; /* How many bytes are available for JFFS2 in OOB */
-#endif
-
struct jffs2_summary *summary;  /* Summary information */
struct jffs2_mount_opts mount_opts;
 
diff --git a/fs/jffs2/nodelist.h b/fs/jffs2/nodelist.h
index b5f7716ce2..d8687319c7 100644
--- a/fs/jffs2/nodelist.h
+++ b/fs/jffs2/nodelist.h
@@ -489,14 +489,6 @@ int jffs2_do_mount_fs(struct jffs2_sb_info *c);
 int jffs2_erase_pending_blocks(struct jffs2_sb_info *c, int count);
 void jffs2_free_jeb_node_refs(struct jffs2_sb_info *c, struct jffs2_eraseblock 
*jeb);
 
-#ifdef CONFIG_JFFS2_FS_WRITEBUFFER
-/* wbuf.c */
-int jffs2_flush_wbuf_gc(struct jffs2_sb_info *c, uint32_t ino);
-int jffs2_flush_wbuf_pad(struct jffs2_sb_info *c);
-int jffs2_check_nand_cleanmarker(struct jffs2_sb_info *c, struct 
jffs2_eraseblock *jeb);
-int jffs2_write_nand_cleanmarker(struct jffs2_sb_info *c, struct 
jffs2_eraseblock *jeb);
-#endif
-
 #include "debug.h"
 
 #endif /* __JFFS2_NODELIST_H__ */
diff --git a/fs/jffs2/os-linux.h b/fs/jffs2/os-linux.h
index 29915715bb..424acbdc4d 100644
--- a/fs/jffs2/os-linux.h
+++ b/fs/jffs2/os-linux.h
@@ -11,6 +11,8 @@
 #ifndef __JFFS2_OS_LINUX_H__
 #define __JFFS2_OS_LINUX_H__
 
+#include 
+
 /* JFFS2 uses Linux mode bits natively -- no need for conversion */
 #define os_to_jffs2_mode(x) (x)
 #define jffs2_to_os_mode(x) (x)
@@ -67,11 +69,21 @@ struct jffs2_file {
unsigned int offset;
 };
 
-#define jffs2_is_readonly(c) (OFNI_BS_2SFFJ(c)->s_flags & SB_RDONLY)
+/* Read-only support */
+#define jffs2_is_readonly(c) (1)
 
 #define SECTOR_ADDR(x) ( (((unsigned long)(x) / c->sector_size) * 
c->sector_size) )
-#ifndef CONFIG_JFFS2_FS_WRITEBUFFER
 
+static inline int jffs2_flash_read(struct jffs2_sb_info *c, loff_t ofs, size_t 
len, size_t *retlen, u_char *buf)
+{

[PATCH 2/2] fs: jffs2: ignore cleanup hints

2024-04-16 Thread Sascha Hauer
From: Juergen Borleis 

Without any kind of write support cleanup hints make no sense and cannot
fixed inside the bootloader. Thus, ignore them entirely.

Signed-off-by: Juergen Borleis 
Signed-off-by: Sascha Hauer 
---
 fs/jffs2/os-linux.h | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/fs/jffs2/os-linux.h b/fs/jffs2/os-linux.h
index 424acbdc4d..9c1c05eb6c 100644
--- a/fs/jffs2/os-linux.h
+++ b/fs/jffs2/os-linux.h
@@ -74,9 +74,17 @@ struct jffs2_file {
 
 #define SECTOR_ADDR(x) ( (((unsigned long)(x) / c->sector_size) * 
c->sector_size) )
 
+/**
+ * Read data from memory and ignore any hints about bitflips in case of NAND
+ * memory (because we cannot repair them).
+ */
 static inline int jffs2_flash_read(struct jffs2_sb_info *c, loff_t ofs, size_t 
len, size_t *retlen, u_char *buf)
 {
-   return mtd_read((c)->mtd, ofs, len, retlen, buf);
+   int rc = mtd_read((c)->mtd, ofs, len, retlen, buf);
+   if (rc == -EUCLEAN)
+   return 0; // we are read-only, we cannot repair anything.
+
+   return rc;
 }
 
 /* support run-time speed-up while scanning NAND flashs */
-- 
2.39.2




[PATCH] mtd: nand: stm32: fix wrong regmap_bulk_read() usage

2024-04-16 Thread Sascha Hauer
Compilation of the STM32 NAND driver fails with:

error: call to '__regmap_bulk_api_changed' declared with attribute error: Last 
argument is now number of registers, not bytes. Fix it and include 

---
 drivers/mtd/nand/stm32_fmc2_nand.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/stm32_fmc2_nand.c 
b/drivers/mtd/nand/stm32_fmc2_nand.c
index 958a619be5..47b012cc9e 100644
--- a/drivers/mtd/nand/stm32_fmc2_nand.c
+++ b/drivers/mtd/nand/stm32_fmc2_nand.c
@@ -7,7 +7,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
@@ -551,7 +551,7 @@ static int stm32_fmc2_nfc_bch_correct(struct nand_chip 
*chip, u8 *dat,
return -ETIMEDOUT;
}
 
-   regmap_bulk_read(nfc->regmap, FMC2_BCHDSR0, ecc_sta, 5);
+   regmap_bulk_read(nfc->regmap, FMC2_BCHDSR0, ecc_sta, 
ARRAY_SIZE(ecc_sta));
 
stm32_fmc2_nfc_set_ecc(nfc, false);
 
-- 
2.39.2