SX and SL variants only include the PXP and have no IPU, so
skip any IPU related QoS setup.
Signed-off-by: Lucas Stach <l.st...@pengutronix.de>
---
arch/arm/mach-imx/imx6.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index 07d3f57d8dcc..567559033770 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -99,6 +99,10 @@ void imx6_setup_ipu_qos(void)
void __iomem *iomux = (void *)MX6_IOMUXC_BASE_ADDR;
uint32_t val;
+ if (!cpu_mx6_is_mx6q() && !cpu_mx6_is_mx6d() &&
+ !cpu_mx6_is_mx6dl() && cpu_mx6_is_mx6s())
+ return;
+
val = readl(iomux + IOMUXC_GPR4);
val |= IMX6Q_GPR4_VPU_WR_CACHE_SEL | IMX6Q_GPR4_VPU_RD_CACHE_SEL |
IMX6Q_GPR4_VPU_P_WR_CACHE_VAL |
IMX6Q_GPR4_VPU_P_RD_CACHE_VAL_MASK |
--
2.8.1
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