Re: PCI config register 0x40
On Saturday 19 December 2009 07:26:10 Larry Finger wrote: Michael, As you may recall, I dumped writes to the PCI config space for both b43 and the wl driver. I found that wl wrote to address 0x40. In looking around other drivers, I found the following fragment in ipw2100: /* We disable the RETRY_TIMEOUT register (0x41) to keep * PCI Tx retries from interfering with C3 CPU state */ pci_read_config_dword(pci_dev, 0x40, val); if ((val 0xff00) != 0) pci_write_config_dword(pci_dev, 0x40, val 0x00ff); Well, if 0x40 is used as RETRY_TIMEOUT in ipw, that doesn't mean it's the same in b43. Is the 0x40 register standardized in any way? And if you do a patch, don't put it into ssb. Put it into b43. -- Greetings, Michael. ___ Bcm43xx-dev mailing list Bcm43xx-dev@lists.berlios.de https://lists.berlios.de/mailman/listinfo/bcm43xx-dev
Re: PCI config register 0x40
On 12/19/2009 04:11 AM, Michael Buesch wrote: Well, if 0x40 is used as RETRY_TIMEOUT in ipw, that doesn't mean it's the same in b43. Is the 0x40 register standardized in any way? According to the Wikipedia article on PCI configuration space registers, only up to 0x3F is standardized. There is, however, an interesting article in http://lkml.indiana.edu/hypermail/linux/kernel/0906.3/03376.html. In the ath9k driver, similar code was removed in a clean-up, but had to be restored as some cards got PCI fatal interrupts. I also found a similar fragment in the C source part of the Broadcom hybrid driver. And if you do a patch, don't put it into ssb. Put it into b43. I will put it in b43 as you request. Larry ___ Bcm43xx-dev mailing list Bcm43xx-dev@lists.berlios.de https://lists.berlios.de/mailman/listinfo/bcm43xx-dev
Re: PCI config register 0x40
On 12/19/2009 04:11 AM, Michael Buesch wrote: And if you do a patch, don't put it into ssb. Put it into b43. One further question about putting the patch into b43. Apparently, register 0x40 is not preserved across a suspend/resume to disk. In all the drivers that use this code, 0x40 is modified in the .probe and .resume routines. As b43 does the resume indirectly through mac80211, an alternate location is needed. It looks to me that placing the code in b43_wireless_core_init() would satisfy both needs. Is that correct? Larry ___ Bcm43xx-dev mailing list Bcm43xx-dev@lists.berlios.de https://lists.berlios.de/mailman/listinfo/bcm43xx-dev
Re: PCI config register 0x40
On Saturday 19 December 2009 17:11:30 Larry Finger wrote: On 12/19/2009 04:11 AM, Michael Buesch wrote: And if you do a patch, don't put it into ssb. Put it into b43. One further question about putting the patch into b43. Apparently, register 0x40 is not preserved across a suspend/resume to disk. In all the drivers that use this code, 0x40 is modified in the .probe and .resume routines. As b43 does the resume indirectly through mac80211, an alternate location is needed. It looks to me that placing the code in b43_wireless_core_init() would satisfy both needs. Is that correct? Yes. Also don't forget to test bus-bustype==SSB_BUSTYPE_PCI before accessing bus-host_pci. -- Greetings, Michael. ___ Bcm43xx-dev mailing list Bcm43xx-dev@lists.berlios.de https://lists.berlios.de/mailman/listinfo/bcm43xx-dev
