Re: [PATCH v2 2/2] Add RISC-V support content to the EBBR specification

2020-11-11 Thread Grant Likely
We didn't meet this week due to a conflict with another meeting. There hasn't been any discussion aside from this thread. g. On 08/11/2020 23:40, Atish Patra wrote: On Thu, Oct 22, 2020 at 4:19 PM Atish Patra wrote: On Wed, Oct 21, 2020 at 3:21 AM Grant Likely wrote: Hi Atish, Thanks fo

Re: [PATCH v2 2/2] Add RISC-V support content to the EBBR specification

2020-11-08 Thread Atish Patra
On Thu, Oct 22, 2020 at 4:19 PM Atish Patra wrote: > > On Wed, Oct 21, 2020 at 3:21 AM Grant Likely wrote: > > > > Hi Atish, > > > > Thanks for this. Comments below. > > > > On 16/10/2020 02:10, Atish Patra wrote: > > > This patch adds all minimum mandatory requirements to make RISC-V > > > comp

Re: [PATCH v2 2/2] Add RISC-V support content to the EBBR specification

2020-10-22 Thread Atish Patra
On Wed, Oct 21, 2020 at 3:21 AM Grant Likely wrote: > > Hi Atish, > > Thanks for this. Comments below. > > On 16/10/2020 02:10, Atish Patra wrote: > > This patch adds all minimum mandatory requirements to make RISC-V compatible > > with EBBR. > > > > Signed-off-by: Atish Patra > > --- > > sourc

Re: [PATCH v2 2/2] Add RISC-V support content to the EBBR specification

2020-10-21 Thread Daniel Thompson
On Wed, Oct 21, 2020 at 11:20:17AM +0100, Grant Likely wrote: > > + HS Mode > > + Hypervisor-extended-supervisor mode which virtualizes the supervisor > > mode. > > + > > + U Mode > > + User mode where userspace application is expected to run. > > + > > + HSM > > + Hart State

Re: [PATCH v2 2/2] Add RISC-V support content to the EBBR specification

2020-10-21 Thread Grant Likely
Hi Atish, Thanks for this. Comments below. On 16/10/2020 02:10, Atish Patra wrote: This patch adds all minimum mandatory requirements to make RISC-V compatible with EBBR. Signed-off-by: Atish Patra --- source/chapter1-about.rst | 42 +++-- source/chapter2-

Re: [PATCH v2 2/2] Add RISC-V support content to the EBBR specification

2020-10-19 Thread Atish Patra
On Mon, 2020-10-19 at 11:50 +0100, Daniel Thompson wrote: > On Fri, Oct 16, 2020 at 12:33:07PM -0700, Atish Patra wrote: > > On Fri, Oct 16, 2020 at 4:29 AM Daniel Thompson > > wrote: > > > On Thu, Oct 15, 2020 at 06:10:32PM -0700, Atish Patra wrote: > > > > + M Mode > > > > + Machine mode

Re: [PATCH v2 2/2] Add RISC-V support content to the EBBR specification

2020-10-19 Thread Daniel Thompson
On Fri, Oct 16, 2020 at 12:33:07PM -0700, Atish Patra wrote: > On Fri, Oct 16, 2020 at 4:29 AM Daniel Thompson > wrote: > > On Thu, Oct 15, 2020 at 06:10:32PM -0700, Atish Patra wrote: > > > + M Mode > > > + Machine mode is the most secure and privileged mode in RISC-V. > > > + > > > + S

Re: [PATCH v2 2/2] Add RISC-V support content to the EBBR specification

2020-10-16 Thread Atish Patra
On Fri, Oct 16, 2020 at 4:29 AM Daniel Thompson wrote: > > On Thu, Oct 15, 2020 at 06:10:32PM -0700, Atish Patra wrote: > > This patch adds all minimum mandatory requirements to make RISC-V compatible > > with EBBR. > > > > Signed-off-by: Atish Patra > > --- > > source/chapter1-about.rst |

Re: [PATCH v2 2/2] Add RISC-V support content to the EBBR specification

2020-10-16 Thread Daniel Thompson
On Thu, Oct 15, 2020 at 06:10:32PM -0700, Atish Patra wrote: > This patch adds all minimum mandatory requirements to make RISC-V compatible > with EBBR. > > Signed-off-by: Atish Patra > --- > source/chapter1-about.rst | 42 +++-- > source/chapter2-uefi.rst

[PATCH v2 2/2] Add RISC-V support content to the EBBR specification

2020-10-15 Thread Atish Patra
This patch adds all minimum mandatory requirements to make RISC-V compatible with EBBR. Signed-off-by: Atish Patra --- source/chapter1-about.rst | 42 +++-- source/chapter2-uefi.rst| 10 +++- source/chapter3-secureworld.rst | 14 +++ source/r