Re: [PATCH v4] Add RISC-V support content to the EBBR specification

2021-07-09 Thread Atish Patra
On Mon, Jul 5, 2021 at 1:14 AM Grant Likely wrote: > > On 23/06/2021 07:34, Atish Patra wrote: > > On Tue, Jun 22, 2021 at 7:54 AM Grant Likely wrote: > > Regarding "UEFI Boot at S mode" section [1], it just tries to > > emphasize that UEFI boot at S-mode is the most common scenario for > > curre

Re: [PATCH v4] Add RISC-V support content to the EBBR specification

2021-07-05 Thread Grant Likely
On 23/06/2021 07:34, Atish Patra wrote: On Tue, Jun 22, 2021 at 7:54 AM Grant Likely wrote: Regarding "UEFI Boot at S mode" section [1], it just tries to emphasize that UEFI boot at S-mode is the most common scenario for current/near future platforms as there are not many platforms with hypervis

Re: [PATCH v4] Add RISC-V support content to the EBBR specification

2021-06-22 Thread Atish Patra
On Tue, Jun 22, 2021 at 7:54 AM Grant Likely wrote: > > On 22/06/2021 15:05, Matthias Brugger wrote: > > > > > > On 22/06/2021 15:18, Grant Likely wrote: > >> On 22/06/2021 11:50, Daniel Thompson wrote: > >>> On Tue, Jun 22, 2021 at 12:35:17PM +0200, Matthias Brugger wrote: > > > On

Re: [PATCH v4] Add RISC-V support content to the EBBR specification

2021-06-22 Thread Matthias Brugger
On 22/06/2021 15:18, Grant Likely wrote: > On 22/06/2021 11:50, Daniel Thompson wrote: >> On Tue, Jun 22, 2021 at 12:35:17PM +0200, Matthias Brugger wrote: >>> >>> >>> On 21/06/2021 22:55, Grant Likely wrote: On 21/06/2021 21:53, Grant Likely wrote: [...] > I've pushe

Re: [PATCH v4] Add RISC-V support content to the EBBR specification

2021-06-22 Thread Grant Likely
On 22/06/2021 15:05, Matthias Brugger wrote: On 22/06/2021 15:18, Grant Likely wrote: On 22/06/2021 11:50, Daniel Thompson wrote: On Tue, Jun 22, 2021 at 12:35:17PM +0200, Matthias Brugger wrote: On 21/06/2021 22:55, Grant Likely wrote: On 21/06/2021 21:53, Grant Likely wrote: [...] I

Re: [PATCH v4] Add RISC-V support content to the EBBR specification

2021-06-22 Thread Matthias Brugger
On 21/06/2021 22:55, Grant Likely wrote: > > > On 21/06/2021 21:53, Grant Likely wrote: > [...] > >> I've pushed my edited copy out to a temporary branch. You can see it here: >> >> https://github.com/ARM-software/ebbr/commit/9d4632a3911fd460cb1adf6a5b1a2b13650b5ab4 > > > Correction, here:

Re: [PATCH v4] Add RISC-V support content to the EBBR specification

2021-06-22 Thread Grant Likely
On 22/06/2021 11:50, Daniel Thompson wrote: On Tue, Jun 22, 2021 at 12:35:17PM +0200, Matthias Brugger wrote: On 21/06/2021 22:55, Grant Likely wrote: On 21/06/2021 21:53, Grant Likely wrote: [...] I've pushed my edited copy out to a temporary branch. You can see it here: https://github.

Re: [PATCH v4] Add RISC-V support content to the EBBR specification

2021-06-22 Thread Daniel Thompson
On Tue, Jun 22, 2021 at 12:35:17PM +0200, Matthias Brugger wrote: > > > On 21/06/2021 22:55, Grant Likely wrote: > > > > > > On 21/06/2021 21:53, Grant Likely wrote: > > [...] > > > >> I've pushed my edited copy out to a temporary branch. You can see it here: > >> > >> https://github.com/ARM-s

Re: [PATCH v4] Add RISC-V support content to the EBBR specification

2021-06-22 Thread Daniel Thompson
On Mon, Jun 21, 2021 at 03:35:02PM -0700, Atish Patra wrote: > On Mon, Jun 21, 2021 at 1:53 PM Grant Likely wrote: > > > > > > > > On 21/06/2021 18:35, Atish Patra wrote: > > > On Mon, Jun 21, 2021 at 10:19 AM Grant Likely > > > wrote: > > >> > > >> > > >> > > >> On 10/05/2021 18:37, Atish Patra

Re: [PATCH v4] Add RISC-V support content to the EBBR specification

2021-06-21 Thread Atish Patra
On Mon, Jun 21, 2021 at 1:53 PM Grant Likely wrote: > > > > On 21/06/2021 18:35, Atish Patra wrote: > > On Mon, Jun 21, 2021 at 10:19 AM Grant Likely wrote: > >> > >> > >> > >> On 10/05/2021 18:37, Atish Patra wrote: > [...] > >>> + > >>> +UEFI Boot at S mode > >>> +^^ > >>> +

Re: [PATCH v4] Add RISC-V support content to the EBBR specification

2021-06-21 Thread Grant Likely
On 21/06/2021 21:53, Grant Likely wrote: [...] I've pushed my edited copy out to a temporary branch. You can see it here: https://github.com/ARM-software/ebbr/commit/9d4632a3911fd460cb1adf6a5b1a2b13650b5ab4 Correction, here: https://github.com/ARM-software/ebbr/commit/714f6fd6747f61c0557

Re: [PATCH v4] Add RISC-V support content to the EBBR specification

2021-06-21 Thread Grant Likely
On 21/06/2021 18:35, Atish Patra wrote: On Mon, Jun 21, 2021 at 10:19 AM Grant Likely wrote: On 10/05/2021 18:37, Atish Patra wrote: [...] + +UEFI Boot at S mode +^^ + +Most systems are expected to boot UEFI at S mode as the hypervisor extension [RVHYPSPEC]_ is +sti

Re: [PATCH v4] Add RISC-V support content to the EBBR specification

2021-06-21 Thread Atish Patra
On Mon, Jun 21, 2021 at 10:19 AM Grant Likely wrote: > > > > On 10/05/2021 18:37, Atish Patra wrote: > > This patch adds all the required content to make RISC-V EBBR compatible. > > The additional content is not a lot given that we just need to update the > > architecture specific sections for RIS

Re: [PATCH v4] Add RISC-V support content to the EBBR specification

2021-06-21 Thread Grant Likely
On 10/05/2021 18:37, Atish Patra wrote: This patch adds all the required content to make RISC-V EBBR compatible. The additional content is not a lot given that we just need to update the architecture specific sections for RISC-V. Rest of the document is ISA agnostic anyways. Signed-off-by: Ati

Re: [PATCH v4] Add RISC-V support content to the EBBR specification

2021-06-14 Thread Atish Patra
On Mon, May 10, 2021 at 10:37 AM Atish Patra wrote: > > This patch adds all the required content to make RISC-V EBBR compatible. > The additional content is not a lot given that we just need to update the > architecture specific sections for RISC-V. Rest of the document is ISA > agnostic > anyway

[PATCH v4] Add RISC-V support content to the EBBR specification

2021-05-10 Thread Atish Patra
This patch adds all the required content to make RISC-V EBBR compatible. The additional content is not a lot given that we just need to update the architecture specific sections for RISC-V. Rest of the document is ISA agnostic anyways. Signed-off-by: Atish Patra --- source/chapter1-about.rst