---
i386/intel/pmap.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/i386/intel/pmap.c b/i386/intel/pmap.c
index 9bcbc279..aa5522b3 100644
--- a/i386/intel/pmap.c
+++ b/i386/intel/pmap.c
@@ -2462,6 +2462,7 @@ void pmap_collect(pmap_t p)
/*
* Free the page table tree.
This speeds up smp slightly by reducing the cpu_number()
complexity to have no branching, just a look up table.
It also addresses the problem that CPU_NUMBER was only using
raw apic_id as an approximation of the kernel_id.
Other improvements were to remove unnecessary checks now that
the lookup
Hi,
Almu and I discovered that the following commit breaks --enable-apic
--enable-ncpus= >1 --disable-linux-groups
* d972c01c pmap: only map lower BIOS memory 1:1 when using Linux drivers
I believe the ACPI tables need temporary low memory mapping to access them.
Also, the commit:
*
Hi Janneke,
On 20/6/23 06:00, Janneke Nieuwenhuizen wrote:
> The rumpkernel archive is ridiculously large. It manages to grow so big
> mainly by adopting the evil practice of bundling other packages. The
> archive contains copies of many GNU utilities, a copy of llvm, and even
> a copy of
This allows hurd's acpi translator to read/write pci config.
Note that hurd needs to be changed to link acpi translator
with libpciaccess once this patch is merged.
Also, the boot order needs to be pci-arbiter then acpi.
TESTED: on qemu with a rump patch to enable acpi it boots via rumpdisk.
On
This simple change allows hurd to be bootable off usb!
It is not ideal to have entire usb stack with the mass storage driver
and combined with SATA, but there is no easy way to separate
the usb stack into host/device yet. This centralises all the disk
support, (and unfortunately also all the usb
AC_CHECK_LIB does not work when -lpciaccess is also required.
---
configure.ac | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/configure.ac b/configure.ac
index 3ea1bc02..dd2481b0 100644
--- a/configure.ac
+++ b/configure.ac
@@ -408,10 +408,11 @@ AC_ARG_WITH([acpica],
---
debian/patches/acgnu.diff | 72 ---
debian/patches/acpi-init-files.diff | 88 -
debian/patches/add-makefile.diff| 4 +-
3 files changed, 153 insertions(+), 11 deletions(-)
diff --git a/debian/patches/acgnu.diff
Hi Luca,
On 20/6/23 05:40, l...@orpolo.org wrote:
> and at this stage the lapic pointer is not yet initialized:
>
> (gdb) p lapic
> $4 = (volatile ApicLocalUnit *) 0x0
> (gdb) x
> 0xc109bc6c : 0x
>
> I guess so far this worked because the address 0 was mapped, and now it
> isn't.
>
Fixes an early crash when APIC is defined, NCPUS > 1 and LINUX_DEV is not
defined.
CPU_NUMBER can now be called before the local apic pointer is properly
initialized.
---
i386/i386/apic.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/i386/i386/apic.c
Hi,
Bumping for review of patchset v3
> RE: libirqhelp
> RE: libddekit
Damien
This is mostly a copy of rumpdisk, with small tweaks to
compile in the rump USB stack instead of SATA/IDE.
This can be tested by running qemu with a USB3 controller as follows:
-drive if=none,id=usbstick,format=raw,file=/path/to/disk.img \
-device qemu-xhci
Hi,
On 26/6/23 02:41, Samuel Thibault wrote:
> We also need /dev entries. It happens that this re-uses /dev/sd*
> names, so we need to care about compatibility. We probably want
> rumpdisk_device_open to forward to the kernel when 'disabled' is true.
Doesn't libmachdev do this for us already?
This adds a second binary target to compile in
the rump USB stack instead of SATA/IDE using conditional
ifdefs to mostly share the code between the two translators.
This can be tested by running qemu with a USB3 controller as follows:
-drive
Hi Samuel,
On 26/6/23 02:41, Samuel Thibault wrote:
>> This simple change allows hurd to be bootable off usb!
>
> Well, yes and no :)
>
> We also need /dev entries. It happens that this re-uses /dev/sd*
> names, so we need to care about compatibility. We probably want
> rumpdisk_device_open to
Try '-M q35' passed to qemu as this will use a newer chipset emulation that
includes AHCI controller by default. Im not sure if IDE is working at this
point.
Damien
Sent from ProtonMail mobile
Original Message
On 18 May 2023, 4:24 am, Janneke Nieuwenhuizen wrote:
> Hi!
>
>
---
i386/i386at/acpi_parse_apic.c | 203 --
i386/i386at/acpi_parse_apic.h | 18 ++-
i386/i386at/model_dep.c | 8 +-
3 files changed, 169 insertions(+), 60 deletions(-)
diff --git a/i386/i386at/acpi_parse_apic.c b/i386/i386at/acpi_parse_apic.c
index
This enables gnumach to additionally parse the XSDT table
if the version of ACPI is detected to be greater than 1.
TESTED: Should not break existing ACPI v1.0 support.
Almost boots on HP T620 but crashes further downstream
of ACPI table detection (to be fixed in follow up patches).
Since we are not using legacy MP tables but intending to use ACPI
to configure interrupt routing, we can assume all boards have
virtual wire mode, thus do not require setting of IMCR register.
(This may fix crashes on machines that do not have IMCR registers).
---
i386/i386at/ioapic.c | 6 --
TODO: Don't hardcode 0x3000 as the starting eip.
TESTED: works in qemu
TESTED: works hardware with AMD cpu
---
i386/i386/mp_desc.c | 15 +++--
i386/i386/smp.c | 125 +---
i386/i386/smp.h | 5 +-
i386/i386at/cram.h | 5 ++
TESTED: This works in qemu correctly
TESTED: This works on an AMD board with ACPI v2.0 correctly
---
i386/i386/apic.c | 89 +++
i386/i386/apic.h | 5 ++
i386/i386at/acpi_parse_apic.c | 35 ++
i386/i386at/acpi_parse_apic.h |
Hi,
I addressed all the points in review 2.
Here is version 3.
It still boots!
Thanks,
Damien
This initializes the lapic without
turning on the IOAPIC interrupts during SMP init.
---
i386/i386/apic.c | 15 +--
i386/i386/apic.h | 2 ++
i386/i386/mp_desc.c | 18 +++---
i386/i386at/ioapic.c | 1 +
4 files changed, 31 insertions(+), 5 deletions(-)
diff
NB: Every x86 board that uses ACPI most likely has a HPET since 2005.
We can roll back to PIT in the cases where its not present,
but the PIT one shot code is definitely currently broken.
---
i386/i386/smp.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git
Outstanding: Find a way to allocate memory below 1MiB.
Otherwise, this hardcodes 0x3000 as the starting eip.
TESTED: works in qemu
TESTED: works hardware with AMD cpu
---
i386/i386/mp_desc.c | 15 --
i386/i386/smp.c | 114 +---
i386/i386/smp.h
This took some time to figure out.
Involves a hand-crafted 16 bit assembly instruction [1]
because it requires an immediate for the memory address
of far jump. This required self-modifying code
to inject the next instruction, therefore I added a near
jump to clear the instruction cache queue in
This allows us to init the lapic without
necessarily turning on the IOAPIC interrupts.
---
i386/i386/apic.c | 15 +--
i386/i386/apic.h | 2 ++
i386/i386/mp_desc.c | 6 +++---
i386/i386at/ioapic.c | 1 +
4 files changed, 19 insertions(+), 5 deletions(-)
diff --git
Hi all,
This patchset fixes a number of things wrong with smp
and most of all fixes the root cause of an AP startup
problem (Patch 1), which may also be affecting IPIs in
general.
In qemu with smp, I get a new panic after all modules are
loaded:
../kern/slab.c:966: kmem_cache_alloc_from_slab: \
TESTED: This works in qemu correctly
TESTED: This works on an AMD board with ACPI v2.0 correctly
---
i386/i386/apic.c | 87 +++
i386/i386/apic.h | 4 ++
i386/i386at/acpi_parse_apic.c | 35 ++
i386/i386at/acpi_parse_apic.h | 23
This was the root cause of failing to INIT.
We were clobbering remote_read_status.
And also, we need to reference the .r register
when writing the ICR regs otherwise I think
it writes all of the block.
---
i386/i386/apic.c | 8 ++--
i386/i386/apic.h | 2 +-
2 files changed, 7 insertions(+), 3
NB: Every x86 board that uses ACPI most likely has a HPET.
We can roll back to PIT in the cases where its not present,
but the PIT one shot code is definitely currently broken.
---
i386/i386/smp.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/i386/i386/smp.c
---
i386/i386/model_dep.h | 5 +
i386/i386/mp_desc.h | 5 -
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/i386/i386/model_dep.h b/i386/i386/model_dep.h
index 095eec9b..5369e288 100644
--- a/i386/i386/model_dep.h
+++ b/i386/i386/model_dep.h
@@ -28,6 +28,11 @@
#include
Wait for ICR then just assert the signal. No de-assert.
---
i386/i386/smp.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/i386/i386/smp.c b/i386/i386/smp.c
index 05e9de67..a758eea3 100644
--- a/i386/i386/smp.c
+++ b/i386/i386/smp.c
@@ -54,17 +54,11 @@ static void
This has the effect of running with one cpu only with smp,
but has the ability to enable APs in userspace with the right
processor set RPCs.
---
ddb/db_print.c | 4 +++-
kern/machine.c | 7 ++-
kern/processor.c | 30 +++---
kern/processor.h | 1 +
4 files
---
i386/i386at/kd.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/i386/i386at/kd.c b/i386/i386at/kd.c
index 984d62e3..486dea67 100644
--- a/i386/i386at/kd.c
+++ b/i386/i386at/kd.c
@@ -458,6 +458,7 @@ kdopen(
kdinit();
}
tp->t_state |= TS_CARR_ON;
+
---
configfrag.ac | 2 +-
kern/task.h | 10 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/configfrag.ac b/configfrag.ac
index f9285c9d..d059c7b9 100644
--- a/configfrag.ac
+++ b/configfrag.ac
@@ -71,7 +71,7 @@ AC_DEFINE([MACH_DEBUG], [1], [MACH_DEBUG])
---
kern/thread.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kern/thread.c b/kern/thread.c
index 38287581..de9d1982 100644
--- a/kern/thread.c
+++ b/kern/thread.c
@@ -1921,7 +1921,7 @@ Restart:
* Reset policy and priorities if needed.
*/
#if
This has the effect of running with one cpu only with smp,
but has the ability to enable APs in userspace with the right
processor set RPCs.
---
ddb/db_print.c | 10 +++---
kern/machine.c | 13 +
kern/processor.c | 3 +++
kern/processor.h | 3 +++
4 files changed, 26
This is only enabled when NCPUS > 1.
Enables some older code paths that allows userspace
to manage cpu resources via processor set RPCs.
Size of struct task is preserved while making 4 bitfields
addressable as 4 single byte fields.
---
configfrag.ac | 8 ++--
kern/task.h | 10 +-
Hi,
On 2/11/24 9:43 PM, Samuel Thibault wrote:
> Damien Zammit, le dim. 11 févr. 2024 07:09:48 +, a ecrit:
>> diff --git a/configfrag.ac b/configfrag.ac
>> index f9285c9d..d059c7b9 100644
>> --- a/configfrag.ac
>> +++ b/configfrag.ac
>> @@ -71,7 +7
---
i386/i386at/kd.c | 1 +
i386/i386at/kd_event.c | 2 --
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/i386/i386at/kd.c b/i386/i386at/kd.c
index 984d62e3..2bea3c8c 100644
--- a/i386/i386at/kd.c
+++ b/i386/i386at/kd.c
@@ -1127,6 +1127,7 @@ kdinit(void)
k_comm |=
Wait for ICR then just assert the signal.
No need for deassert. This is how Linux and NetBSD does it.
I couldn't find documentation on the correct method, however.
---
i386/i386/smp.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/i386/i386/smp.c b/i386/i386/smp.c
Hi,
On 2/11/24 10:07 PM, Samuel Thibault wrote:
> Damien Zammit, le dim. 11 févr. 2024 10:55:26 +, a ecrit:
>>>> diff --git a/kern/task.h b/kern/task.h
>>>> index dec3a530..27970620 100644
>>>> --- a/kern/task.h
>>>> +++
This refactors gsync functions so that the read lock on vm map
is only taken once and extended throughout appropriate calls.
Co-Authored-By: Sergey Bugaev
---
kern/gsync.c | 28 +++-
1 file changed, 15 insertions(+), 13 deletions(-)
diff --git a/kern/gsync.c
Authored-by: Sergey Bugaev
---
vm/vm_map.c | 32 ++--
1 file changed, 22 insertions(+), 10 deletions(-)
diff --git a/vm/vm_map.c b/vm/vm_map.c
index f221c532..e4672260 100644
--- a/vm/vm_map.c
+++ b/vm/vm_map.c
@@ -1424,8 +1424,9 @@ vm_map_pageable_scan(struct vm_map
This patchset fixes two critical deadlocks when running with SMP:
The first one is isolated to patch 1 (vm_map), the second is a combination of
patch 2 and 3 (vm_map_lookup + gsync).
When applied, these patches allow slave_pset to be entered
and gnumach source code to be compiled on 7 cores
This adds a parameter called exit_map_locked to vm_map_lookup()
that allows the function to return with the map locked.
This is to prepare for fixing a bug with gsync where the map
is locked twice by mistake.
Co-Authored-By: Sergey Bugaev
---
i386/intel/read_fault.c | 4 ++--
kern/gsync.c
Hi,
I addressed the points in review of first round.
I tested this patchset using Sergey's patch additionally but
dropped it from this set so Sergey can mail in his version instead.
It still compiles gnumach with 7 cores using slave_pset.
Thanks,
Damien
This adds a parameter called keep_map_locked to vm_map_lookup()
that allows the function to return with the map locked.
This is to prepare for fixing a bug with gsync where the map
is locked twice by mistake.
Co-Authored-By: Sergey Bugaev
---
i386/intel/read_fault.c | 4 ++--
kern/gsync.c
This will prevent calling vm_map_delete without the map locked
unless ref_count is zero.
---
vm/vm_map.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/vm/vm_map.c b/vm/vm_map.c
index e454bb2a..f221c532 100644
--- a/vm/vm_map.c
+++ b/vm/vm_map.c
@@ -551,10 +551,12 @@ void
This prevents a deadlock in smp where a read lock on the map
is taken in gsync and then the map is locked again inside
vm_map_lookup() but another thread had a pre-existing write lock,
therefore the second read lock blocks.
This is fixed by removing the initial gsync read lock on the map
but
wrote:
> Applied, thanks! Could you check with your mailer how to prevent it from
> using the quoted-printable encoding? git am often has troubles applying your
> patches, and I have to fix the patch by hand, it's really unconvenient.
> Samuel Damien Zammit, le mer. 07 févr. 2024 05
This allows the slave_pset to be used for actual tasks
with the processor_set RPCs.
---
kern/processor.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/kern/processor.c b/kern/processor.c
index f06b5d62..71bbb757 100644
--- a/kern/processor.c
+++ b/kern/processor.c
@@ -245,6 +245,7 @@ void
Hi,
This program requires master branch PLUS
a one line patch I just mailed in for gnumach.
Here is a simple test program to enable
a new task to run on slave_pset processor set
containing the rest of the processors in SMP kernel.
You can compile it as a sutil in hurd/sutils:
usage must be run
Hi,
On 2/8/24 10:28 AM, Samuel Thibault wrote:
> Could you check with your mailer how to prevent it from using the
> quoted-printable encoding? git am often has troubles applying your
> patches, and I have to fix the patch by hand, it's really inconvenient.
For others' benefit, I think I
Thank you Flavio, great job! This will be an essential part of the new system.
Damien
Sent from Proton Mail mobile
Original Message
On 16 Feb 2024, 12:18 pm, Samuel Thibault < samuel.thiba...@gnu.org> wrote:
Seems now to work fine with libraries indeed, thanks! I have uploaded
TESTED: By booting gnumach off an HP T620 with console=com0 and receiving
115200 8N1 console
on another machine connected via the serial port in minicom.
Without this patch, part of the console is garbled by mismatching com params
(9600 7N1).
---
i386/i386at/com.c | 27
Enables a 32 bit periodic HPET timer without generating interrupts.
The purpose of this is to provide a convenient udelay/mdelay in mach
since the pit one-shot mode is unreliable.
TESTED: This works in qemu correctly
TESTED: This works on an AMD board with ACPI v2.0 correctly
---
---
i386/i386/smp.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/i386/i386/smp.c b/i386/i386/smp.c
index fb43ecb6..87f59913 100644
--- a/i386/i386/smp.c
+++ b/i386/i386/smp.c
@@ -21,7 +21,6 @@
#include
#include
#include
-#include
#include
#include
Hi,
I am trying to port gnumach to HP T620 which is an AMD FAM16h board
running my port of coreboot.
With --disable-apic --enable-cpus=1 the board boots to a shell (but NIC
locks up).
Under GNU/Linux, using command line options "noapic nolapic", the same
thing happens and the NIC locks up
This enables gnumach to additionally parse the XSDT table
if the revision of ACPI is 2.
NB: I removed a few checksum checks in acpi tables where
there is no checksum present in the table.
TESTED: Still works on qemu (ACPI v1.0)
TESTED: Works on a x86 board with XSDT (ACPI v2.0)
---
Clear flag in msr for xAPIC mode.
---
i386/i386/apic.h | 3 ++-
i386/i386/cpuboot.S | 4 ++--
i386/i386at/boothdr.S | 3 ++-
3 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/i386/i386/apic.h b/i386/i386/apic.h
index b8fff2af..e410e9c6 100644
--- a/i386/i386/apic.h
+++
This took some time to figure out.
Involves a hand-crafted 16 bit assembly instruction [1]
because it requires an immediate for the memory address
of far jump. This required self-modifying code
to inject the next instruction, therefore I added a near
jump to clear the instruction cache queue in
This enables gnumach to additionally parse the XSDT table
if the revision of ACPI is 2.
TESTED: Still works on qemu (ACPI v1.0)
TESTED: Works on a x86 board with XSDT (ACPI v2.0)
---
i386/i386at/acpi_parse_apic.c | 258 ++
i386/i386at/acpi_parse_apic.h | 18 ++-
Hi Samuel,
On 1/29/24 9:20 PM, Samuel Thibault wrote:
> Damien Zammit, le lun. 29 janv. 2024 10:07:30 +, a ecrit:
>> -ljmp$BOOT_CS, $M(0f)
>> +xorl%eax, %eax
>> +mov %cs, %ax
>> +shll$4, %eax
>> +addl$M(0f), %eax
>
Move cninit() further down so that IOAPIC has a chance
to initialize before the com port interrupt is unmasked
in the IOAPIC, fixing a fault and reboot.
---
i386/i386at/model_dep.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/i386/i386at/model_dep.c
Hi,
On 1/25/24 3:41 AM, Almudena Garcia wrote:
> Maybe the next crash is in APIC step. Check if it's using xAPIC or x2APIC,
> and force xAPIC if necessary
I checked it is definitely using xAPIC mode, I also patched it to set
the right MSR bit.
But the cpu still crashes when interrupts are
TESTED: This works in qemu correctly
TESTED: This works on an AMD board with ACPI v2.0 correctly
---
i386/i386/apic.c | 97 +++
i386/i386/apic.h | 5 ++
i386/i386at/acpi_parse_apic.c | 35 ++---
i386/i386at/acpi_parse_apic.h | 23
NB: Assume every x86 board that uses ACPI has a HPET.
We can roll back to PIT in the cases where its not present,
but the PIT one shot code is currently broken.
---
i386/i386/smp.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/i386/i386/smp.c b/i386/i386/smp.c
index
This allows us to init the lapic without
necessarily turning on the IOAPIC interrupts.
---
i386/i386/apic.c | 15 +--
i386/i386/apic.h | 2 ++
i386/i386/mp_desc.c | 12 +---
i386/i386at/ioapic.c | 1 +
4 files changed, 25 insertions(+), 5 deletions(-)
diff --git
Hi,
Here are the changes from previous review.
I did not make changes to ensure pit fallback because
the pit one-shot code is broken; there is no point
making it fall back to a delay that does not work.
I tried fixing the pit code, but it resulted in strange behaviour.
We can assume every x86
To be fixed: Find a way to allocate memory below 1MiB.
Otherwise, this hardcodes 0x3000 as the starting eip.
TESTED: works in qemu
TESTED: works hardware with AMD cpu
---
i386/i386/mp_desc.c | 15 +++--
i386/i386/smp.c | 126 +---
i386/i386/smp.h
This took some time to figure out.
Involves hand-crafted 16 bit assembly instructions [1]
because GNU AS does not fully understand real-mode x86.
[1] Intel Architecture Software Developer's Manual,
Volume 2: Instruction Set Reference Manual
---
i386/i386/cpuboot.S | 32
Clear flag in msr for xAPIC mode.
---
i386/i386/apic.h | 3 ++-
i386/i386/cpuboot.S | 3 ++-
i386/i386at/boothdr.S | 3 ++-
3 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/i386/i386/apic.h b/i386/i386/apic.h
index e870dcf8..9f908159 100644
--- a/i386/i386/apic.h
+++
Previously, only IOAPIC[0] was supported.
Now this supports up to two IOAPICs.
---
i386/i386/apic.c | 13 +
i386/i386/apic.h | 6 ++-
i386/i386/locore.S| 43 +
i386/i386at/acpi_parse_apic.c | 3 ++
i386/i386at/int_init.c| 6 ++-
This is not needed because cpu_up does this when it comes online,
it calls pset_add_processor().
---
kern/processor.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/kern/processor.c b/kern/processor.c
index 33733a59..0e42fa37 100644
--- a/kern/processor.c
+++ b/kern/processor.c
@@ -76,7
During quantum adjustment, disable interrupts and call appropriate lock.
---
kern/priority.c | 4 ++--
kern/processor.c | 2 +-
kern/processor.h | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/kern/priority.c b/kern/priority.c
index fe11d0d4..7f28b3d7 100644
---
This will prevent calling vm_map_delete without the map locked
unless ref_count is zero.
---
vm/vm_map.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/vm/vm_map.c b/vm/vm_map.c
index c237afbe..7db76b7b 100644
--- a/vm/vm_map.c
+++ b/vm/vm_map.c
@@ -551,10 +551,12 @@ void
Fixes assertion errors when LDEBUG is compiled in.
---
kern/machine.c| 6 --
kern/sched_prim.c | 38 --
2 files changed, 28 insertions(+), 16 deletions(-)
diff --git a/kern/machine.c b/kern/machine.c
index f757d146..a350fad4 100644
---
---
i386/intel/pmap.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/i386/intel/pmap.c b/i386/intel/pmap.c
index e43b06c1..cf075a43 100644
--- a/i386/intel/pmap.c
+++ b/i386/intel/pmap.c
@@ -3114,6 +3114,7 @@ void process_pmap_updates(pmap_t my_pmap)
pmap_t pmap;
Wait for ICR then just assert the signal.
Linux and NetBSD does it this way, assume they know better.
---
i386/i386/smp.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/i386/i386/smp.c b/i386/i386/smp.c
index 05e9de67..a758eea3 100644
--- a/i386/i386/smp.c
+++
Hi Almu,
On 2/24/24 12:24 AM, Almudena Garcia wrote:
> I set the code as this way because it's the standard of Intel's guides.
>
> The guide explain that although most machines turn on the cpu with an unique
> SIPI, some machines could require a second SIPI. Even some older machines
> could
Use the new irqhelp library in ddekit and clean up.
---
libddekit/Makefile| 2 +-
libddekit/interrupt.c | 208 ++
2 files changed, 28 insertions(+), 182 deletions(-)
diff --git a/libddekit/Makefile b/libddekit/Makefile
index 88a0c8909..c74ec1128
Add a helper library for attaching interrupt handlers in userspace.
---
Makefile | 1 +
libirqhelp/Makefile | 28
libirqhelp/irqhelp.c | 362 +++
libirqhelp/irqhelp.h | 49 ++
4 files changed, 440 insertions(+)
create mode 100644
Hi,
I figured out that a semaphore is needed in ddekit to wait until
the thread_init(priv) is called. This was initially confusing
because I thought a semaphore was needed in the irqhelp library, but
it is not required there.
TESTED: copying a large file from hurd to linux and ifup/ifdown
a
Hi,
I have prepared this patch for inclusion into hurd, however
we may need to think of the best migration strategy:
Do we allow a soft migration where translator entries are kept as is,
but new ones are migrated only upon creation. Or do we write a
script that will migrate all translator
Replaces experimental option --x-xattr-translator-records
with --no-xattr-translator-records to allow rolling back to
previous behaviour.
NB:
- Legacy records still work with either setting.
- Adding a new record removes a legacy one.
---
ext2fs/ext2fs.c | 18 +-
Add a helper library for attaching interrupt handlers in userspace.
---
Makefile | 1 +
libirqhelp/Makefile | 28
libirqhelp/irqhelp.c | 359 +++
libirqhelp/irqhelp.h | 49 ++
4 files changed, 437 insertions(+)
create mode 100644
Hi,
I think we need to allow the irq handler to be called one more time,
because we don't know if there is a pending interrupt until we need
to handle one. Once we enable the irq one more time, it is necessary
to handle the last interrupt before quitting the handler.
I tested this behaviour and
Use the new irqhelp library in ddekit and clean up.
---
libddekit/Makefile| 2 +-
libddekit/interrupt.c | 208 ++
2 files changed, 28 insertions(+), 182 deletions(-)
diff --git a/libddekit/Makefile b/libddekit/Makefile
index 88a0c8909..c74ec1128
---
faq/smp.mdwn | 31 ++-
1 file changed, 22 insertions(+), 9 deletions(-)
diff --git a/faq/smp.mdwn b/faq/smp.mdwn
index c0133b80..ee0bf53f 100644
--- a/faq/smp.mdwn
+++ b/faq/smp.mdwn
@@ -13,21 +13,34 @@ License|/fdl]]."]]"""]]
[[!meta title="Does GNU/Hurd
Hi,
On 3/10/24 6:46 AM, Samuel Thibault wrote:
> Damien Zammit, le sam. 09 mars 2024 01:18:37 +, a ecrit:
>> So having discussed this, we allow the irq thread to be called one more time,
>> but not actually call the user irq handler if the shutdown flag is set.
&g
Add a helper library for attaching interrupt handlers in userspace.
---
Makefile | 1 +
libirqhelp/Makefile | 28
libirqhelp/irqhelp.c | 359 +++
libirqhelp/irqhelp.h | 49 ++
4 files changed, 437 insertions(+)
create mode 100644
Use the new irqhelp library in ddekit and clean up.
---
libddekit/Makefile| 2 +-
libddekit/interrupt.c | 208 ++
2 files changed, 27 insertions(+), 183 deletions(-)
diff --git a/libddekit/Makefile b/libddekit/Makefile
index 88a0c8909..c74ec1128
Hi,
This patchset adds a new library irqhelp for assisting the attachment
of irq handlers in userspace.
The previous problem was that return(NULL) was crashing netdde while
pthread_exit(NULL) works for exiting the irq thread cleanly.
The mach_msg_server thread now shuts down cleanly by setting
Add a helper library for attaching interrupt handlers in userspace.
---
Makefile | 1 +
libirqhelp/Makefile | 28
libirqhelp/irqhelp.c | 360 +++
libirqhelp/irqhelp.h | 49 ++
4 files changed, 438 insertions(+)
create mode 100644
Hi,
So having discussed this, we allow the irq thread to be called one more time,
but not actually call the user irq handler if the shutdown flag is set.
We acknowledge the interrupt has been handled, however.
I tested this behaviour and it works on netdde.static to ifup and ifdown,
and send a
Use the new irqhelp library in ddekit and clean up.
---
libddekit/Makefile| 2 +-
libddekit/interrupt.c | 208 ++
2 files changed, 28 insertions(+), 182 deletions(-)
diff --git a/libddekit/Makefile b/libddekit/Makefile
index 88a0c8909..c74ec1128
Hi,
On 24 Mar 2024, 11:05 pm, Samuel Thibault < samuel.thiba...@gnu.org> wrote:
> Ok, but there's not even a comment about it. If somebody else comes and
> changes the code a bit, they'll very easily get to the unsafe side again. And
> really, accessing local variables from nested functions is
Use the new irqhelp library in ddekit and clean up.
---
libddekit/Makefile| 2 +-
libddekit/interrupt.c | 211 --
2 files changed, 40 insertions(+), 173 deletions(-)
diff --git a/libddekit/Makefile b/libddekit/Makefile
index 88a0c8909..c74ec1128
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