Follow-up Comment #3, bug #37065 (project make):
Could you please show a short Makefile to reproduce the problem?
Thanks.
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URL:
http://savannah.gnu.org/bugs/?37069
Summary: POSIX specifies CC=c99
Project: make
Submitted by: None
Submitted on: Fri 10 Aug 2012 10:01:17 AM UTC
Severity: 3 - Normal
Item Group: Bug
In some situations, it would be very useful to be able to override
already-defined rules for a target without having GNU make complaining
about the override.
For example, when writing a library of makefiles recipes, organized as
a set of makefile fragments to be included by a master
Even with GNU make as it stands, couldn't you emit your rules in the
form of variables, override them at will, and eval() them at the end?
E.g.
define ruleA
version 1
endef
then later...
define ruleA
version 2
endef
$(eval $(call ruleA,...))
-David Boyce
On Fri, Aug 10, 2012 at 12:36 PM,
Hi David, thanks for the feedback.
On 08/10/2012 07:00 PM, David Boyce wrote:
Even with GNU make as it stands, couldn't you emit your rules in the
form of variables, override them at will, and eval() them at the end?
E.g.
define ruleA
version 1
endef
then later...
define ruleA
On Fri, Aug 10, 2012 at 2:38 PM, Stefano Lattarini
stefano.lattar...@gmail.com wrote:
I have no answer for that, lacking any knowledge about GNU make
internals; I guess the make developers here will be in a better
position to answer my question.
Yes, and I hope you get your feature. But
On 08/11/2012 01:27 AM, David Boyce wrote:
On Fri, Aug 10, 2012 at 2:38 PM, Stefano Lattarini
stefano.lattar...@gmail.com wrote:
I have no answer for that, lacking any knowledge about GNU make
internals; I guess the make developers here will be in a better
position to answer my question.
This is a different thing but I'd have had great use for a way to tell if a
target had been defined previously. Had to use variables to do it which
used a lot of memory and it was a total waste because make has the
information already.
Perhaps the ability to detect if a target is defined and
