On Mon, 18 Apr 2022 12:29:41 GMT, Erik Joelsson wrote:
>> Feilong Jiang has updated the pull request with a new target base due to a
>> merge or a rebase. The incremental webrev excludes the unrelated changes
>> brought in by the merge/rebase. The pull request contains three additional
>>
On Wed, 20 Apr 2022 02:11:54 GMT, Feilong Jiang wrote:
>> This patch adds Zero support for the 32-bit RISC-V architecture.
>>
>> Additional tests:
>>
>> - [x] Linux zero RISCV32 cross-compilation
>> - [x] Resulting binaries run on QEMU User mode without problems
>
> Feilong Jiang has updated
> This patch adds Zero support for the 32-bit RISC-V architecture.
>
> Additional tests:
>
> - [x] Linux zero RISCV32 cross-compilation
> - [x] Resulting binaries run on QEMU User mode without problems
Feilong Jiang has updated the pull request with a new target base due to a
merge or a
