Re: [casper] ddr3 cpu interface for roach2

Sorry, that is page 49 and 50. Wesley New South African SKA Project +2721 506 7300 www.ska.ac.za On Wed, Jun 15, 2016 at 11:25 AM, Wesley New wrote: > Hi Mike, > > This one got me a while back. I think you need to change the style option > in your mpd file to hdl. See page 47 of this document

Re: [casper] ddr3 cpu interface for roach2

Hi Mike, This one got me a while back. I think you need to change the style option in your mpd file to hdl. See page 47 of this document. http://www.xilinx.com/support/documentation/sw_manuals/edk10_psf_rm.pdf Regards Wesley Wesley New South African SKA Project +2721 506 7300 www.ska.ac.za

[casper] ddr3 cpu interface for roach2

Hi all, I have recently implemented a cpu interface for the ddr3 on the roach2. I am cleaning up the pcore in preparation to supply it to ska-sa for commiting into their repository after they vet the design. I based the design on the dram pcore for roach one but re-implemented the arbiter. I no